ADP3421 Analog Devices, ADP3421 Datasheet

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ADP3421

Manufacturer Part Number
ADP3421
Description
Geyserville-Enabled DC/DC Converter Controller for Mobile CPUs
Manufacturer
Analog Devices
Datasheet

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GENERAL DESCRIPTION
The ADP3421 is a hysteretic dc-dc buck converter controller
with two auxiliary linear regulator controllers. The ADP3421
provides a total power conversion control solution for a micro-
processor by delivering the core, I/O, and clock voltages. The
optimized low-voltage design is powered from the 3.3 V system
supply and draws only 10 µA maximum in shutdown. The main
output voltage is set by a 5-bit VID code. To accommodate the
transition time required by the newest processors for on-the-
fly VID changes, the ADP3421 features high-speed operation
to allow a minimized inductor size that results in the fastest change
of current to the output. To further allow for the minimum
number of output capacitors to be used, the ADP3421 features
active voltage positioning that can be optimally compensated
to ensure a superior load transient response. The main output
signal interfaces with the ADP3410 dual MOSFET driver,
which is optimized for high speed and high efficiency for driving
both the upper and lower (synchronous) MOSFETs of the
buck converter.
Converter Controller for Mobile CPUs
DACOUT
CLKDRV
CLKFB
IODRV
UVLO
IOFB
VID4
VID3
VID2
VID1
VID0
GND
LTO
VCC
LTB
LTI
SD
Geyserville-Enabled DC-DC
TRANSLATOR
CONTROLLER
CONTROLLER
MONITOR AND
CONTROLLER
CLOCK LDO
VID DAC
FUNCTIONAL BLOCK DIAGRAM
REFERENCE
UVLO BIAS
LEVEL
I/O LDO
VIN/VCC
BIAS EN
REFERENCE
BIAS AND
COMPARATOR
CORE CONTROLLER
CURRENT
COMPARATOR
LIMIT
CORE
ADP3421
EN
POWER GOOD
GENERATOR
SOFT START
TIMER
ADP3421
AND
CLSET
CS+
CS–
VHYS
REG
RAMP
OUT
SSC
SSL
CORE
PWRGD

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ADP3421 Summary of contents

Page 1

... VID changes, the ADP3421 features high-speed operation to allow a minimized inductor size that results in the fastest change of current to the output. To further allow for the minimum number of output capacitors to be used, the ADP3421 features active voltage positioning that can be optimally compensated to ensure a superior load transient response. The main output signal interfaces with the ADP3410 dual MOSFET driver, which is optimized for high speed and high effi ...

Page 2

... ADP3421–SPECIFICATIONS Parameter SUPPLY-UVLO-POWER GOOD Supply Current VCC UVLO Threshold VCC UVLO Hysteresis Battery UVLO Threshold Battery UVLO Hysteresis Shutdown Input Threshold Core Power Good Threshold PWRGD Output Voltage CORE CONVERTER SOFT-START TIMER Timing Charge Current Discharge Current Enable Threshold Termination Threshold ...

Page 3

... V I LTOH LTI 0.175 V LTOL LTI t LTPD settles within ± its steady state value. DAC = 150 Ω pull-up resistor. LTO ADP3421 Min Typ Max Unit – µA –5 +5 µA –5 µA –22 –30 –38 µA –265 – ...

Page 4

... ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the ADP3421 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality ...

Page 5

... Current Limit Negative Sense. This pin connects through a resistor to the negative node of the current sense resistor. A current flows out of the pin, as programmed at the CLSET pin. When this pin is more negative than the CS+ pin, the current limit comparator is triggered and the current flowing out of the pin is reduced to two-thirds of its previous value, producing a current limit hysteresis. ADP3421 ...

Page 6

... ADP3421–Typical Performance Characteristics 100m NORMAL OPERATING MODE 10m 1m UVLO MODE 100 SHUTDOWN MODE 100 TEMPERATURE – C 2.010 +0.85% FULL-SCALE 2.000 –0.85% 1.990 0.9375 +0.85% 0.925 ZERO-SCALE –0.85% 0.9125 100 AMBIENT TEMPERATURE – LDO V = 1.47V IOFB ...

Page 7

... UVLO for VCC provides an internally specified UVLO thresh- old for the ADP3421 to ensure that it only operates when the applied VCC is sufficient to ensure that it can operate properly. Activation of either UVLO circuit disables the reference and bias circuits in the IC except for that which is needed for UVLO detection ...

Page 8

... APPLICATION INFORMATION Overview—Combined ADP3421 and ADP3410 Power Con- troller for PC Systems The ADP3421 is a power controller that can provide a regula- tion solution for all three power rails of an Intel Pentium II or III processor. Together with the ADP3410 driver IC, these ICs form an integral part system, featuring a high-speed (< ...

Page 9

... Standard Hysteretic Control Configuration The ADP3421 can also be used as a conventional hysteretic ripple regulator where the output ripple voltage is directly pro- grammed. To achieve this conventional operation, the DAC’s output is connected directly to the REG pin and the output voltage connects through a resistor to the RAMP pin ...

Page 10

... PRINTED CIRCUIT BOARD LAYOUT CONSIDERATIONS The ADP3421 is a high-speed controller capable of providing a response time well under 100 ns. To avoid having the ADP3421 respond to noise, the first step in achieving good noise immunity is to follow the layout considerations. In some layouts it may be necessary to supplement the ADP3421 control design with additional components designed to minimize noise problems ...

Page 11

... All other control components should be grounded on that same signal ground. 13. If critical signal lines (i.e., signals from the current-sense resistor leading back to the ADP3421) must cross through power circuitry best if a signal ground plane can be interposed between those signal lines and the traces of the power circuitry ...

Page 12

... ADP3421 TYPICAL APPLICATION–GEYSERVILLE-ENABLED MOBILE VRM CONVERTER 3. ADP3421 51.1k 1 CS– 28 VHYS R10 R2 10k 2 CLSET CS+ 27 160k 3 REG 26 LTO C2 4 LTI RAMP 25 100nF C1 5 LTB VCC 24 100nF 6 VID4 OUT 23 7 VID3 GND 22 FROM 8 VID2 DACOUT 21 CPU 9 VID1 CORE 20 10 VID0 SSC 19 ...

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