CS98000-CM Cirrus Logic, Inc., CS98000-CM Datasheet
CS98000-CM
Specifications of CS98000-CM
Available stocks
Related parts for CS98000-CM
CS98000-CM Summary of contents
Page 1
... Cirrus Logic reserves the right to modify this product without notice. Copyright (All Rights Reserved) CS98100 208-pin MQFP Audio Interface PCM Out PCM In ADC IEC-958 System Sync Interrupts STC Subpicture Decoder Decoder Scaler Video Processor On-Screen Display Video/Graphics Scaling Display NTSC/PAL Encoder 3 DACs Cirrus Logic, Inc. 2002 JUL ‘02 DS552PP4 1 ...
Page 2
... SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF CIRRUS PRODUCTS IN SUCH AP- PLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER'S RISK. Cirrus Logic, Cirrus, and the Cirrus Logic logo designs are trademarks of Cirrus Logic, Inc. All other brand and product names in this document may be trademarks or service marks of their respective owners. ...
Page 3
Host Port Memory Map .................................................................................................... 23 4.3 Internal IO Space Map ..................................................................................................... 24 4.4 CS98100 Register Space ................................................................................................ 24 5. PIN DESCRIPTIONS .............................................................................................................. 37 6. PIN ASSIGNMENTS ............................................................................................................... 38 6.1 Miscellaneous Pins .......................................................................................................... 46 6.2 Serial Interface ................................................................................................................ 47 ...
Page 4
Table 14. Pin Type and Direction Legend ..................................................................................... 37 Table 15. Pin Assignments............................................................................................................ 38 Table 16. Miscellaneous Interface Pins......................................................................................... 46 Table 17. Serial Interface Pin Assignments .................................................................................. 47 Table 18. SDRAM Interface Pin Assignments............................................................................... 48 Table 19. ROM/NVRAM Interface Pin ...
Page 5
... Ambient Temperature (power applied) AMB P Total Power consumption total CAUTION: Operating beyond these Minimum and Maximum limits can result in permanent damage to the device. Cirrus Logic recommends that CS98000 devices operate at the settings described in the next table. RECOMMENDED OPERATING CONDITIONS 1.1.2 Parameter Supply Voltage, IO ...
Page 6
Parameter Input Current Input Pull up/down resistor Output Voltage, High Output Voltage, Low High-Z-state Leakage Analog Video Pins Full Scale Current Output Voltage Range 1 DAC to DAC matching Output Voltage Range Differential Gain Differential Phase Signal to Noise Chrominance ...
Page 7
AC CHARACTERISTICS (TA= 25°C; VDD_PLL=VDD_CORE=1.8 V±10%, VDD_IO=3.3 V±10%) 1.2.1 ATAPI Interface The CS98100 can interface with ATAPI-type slave loader gluelessly. transaction and a write ATAPI transaction. PIO mode 4 is implemented for sufficient data transfer rate be- tween ATAPI ...
Page 8
SDRAM Interface The CS98100 interfaces with either SDRAM or SGRAM, for high data bandwidth transfer. Table 2 show the interface pin timing. Figure 3 shows a burst read (length = 8) transaction, while action. In both Figure 3 and ...
Page 9
DR_CKO DR_A_[11:0] R0 DR_CKE DR_RAS_N DR_CAS_N DR_WE_N DR_D[31:0] DR_DQM[3:0] F Figure 3. SDRAM Burst Read Transaction DR_CKO R0 DR_A_[11:0] DR_CKE DR_RAS_N DR_CAS_N DR_WE_N DR_D[31:0] DR_DQM[3:0] F Figure 4. SDRAM Burst Write Transaction ...
Page 10
DR_RAS_N,DR_CAS_N DR_W E_N,DR_AP,DR_DQM[3:0], DR_CKE,DR_A[11: mco DR_CKO DR_D[31:0](WRITE) DR_D[31:0](READ) t msur Figure 5. CS98100 SDRAM Read and Write CS98100 t mper t t mdow mhw t mhr ...
Page 11
DVD Serial Interface Timing Figure 6 and Table 3 illustrate the signal timing for the DVD serial interface input pins. Symbol t 1 DVDS_CLK Period dsckper t 1 DVDS_CLK Low Time dsckl t 1 DVDS_CLK High Time dsckh t ...
Page 12
Digital Video Interface Timing Figure 7 illustrates the signal timing for the digital video interface pins. The clock is without a polarity to show the clock may be inverted by register programming. This also illustrates that data is clocked ...
Page 13
Digital Audio Interface Timing Figure 8 and Figure 9 illustrate the signal timing for the digital audio pins. The bi-directional AUD_XCK pin clocks at 8x the frequency of the AUD_BCK pin. The AUD_BCK pin outputs at 32x or 48x ...
Page 14
Symbol t 1 AUD_XCLK High Time (AUD_XCLK is Input/Output) 40 axch 1 AUD_XCLK Low Time (AUD_XCLK is Input/Output) 40 taxcl t AUD_XCLK period (Input/Output) axper t AUD_BCK delay from AUD_XCLK(output) active odbck edge t AUD_BCK delay from AUD_XCLK(input) active odbck ...
Page 15
ROM/NVRAM Interface Symbol t Read Cycle Time Data Setup cds Data Setup ods Address to Data Setup t ads t Address to WE setup (Write) aws setup (Write) ...
Page 16
...
Page 17
Miscellaneous Timings Symbol 1 XTLCLK period txclper trstl RST_N Low Pulse Width tgph GPIO PW High tgpl GPIO PW Low 1. XTLCLK must meet the requirement of external the video encoder for correct chroma (27 MHz ...
Page 18
TYPICAL APPLICATION Figure 13 shows an example of a complete high-end DVD solution using the CS98100. Front Panel Audio IR DVD Loader (IO Channel, ATPAI or Serial) 2.1 CS98100 Device Summary RISC-32 • Powerful 32-bit RISC processor • Optimizing ...
Page 19
DMA. • Supports block transfers for graphics bit blits. MPEG VIDEO DECODER • Supports VCD1.0, 1.1, 2.0 and 3.0, SVCD, and DVD video standards. • Supports trick features, including smooth 2x forward play. • Special anti-tearing ...
Page 20
FUNCTIONAL DESCRIPTION 3.1 RISC Processor The CS98100 includes a powerful, proprietary 32- bit RISC processor with optimizing C compiler support. The RISC has a MIPS-compatible instruc- tion set, as well as a MAC engine which performs multiply/accumulate in 2 ...
Page 21
Interrupts can be generated on specific or generic events. Infrared in- puts can be filtered of glitches or stored unfiltered into memory. Power-down control of the internal clocks is also possible. Internal PLLs are used ...
Page 22
The audio interface also includes a flexible PCM input interface, which can input a wide range of protocols from IEC-958 receiver. Another, low- cost approach for audio input is the internal sigma- delta demodulator. This module inputs a digital PWM ...
Page 23
MEMORY MAP AND REGISTERS 4.1 Processor Memory Map The CS98100 externally supports Mbytes DRAM and 16 Mbytes ROM/NVRAM. the memory map as viewed by the RISC processor, and identifies whether each segment is mapped or cacheable. ...
Page 24
Internal IO Space Map Table 11 shows how the Internal IO space is mapped between general registers, internal SRAM ports, and the RISC processor debug port. Byte address offset 0_0000 – 0_2FFF 0_3000 – 1_FFFF 2_0000 – 2_FFFF 4.4 ...
Page 25
Address Type 0 R/W 10 R/W 14 R/W 18 R/W 10C R/W 20 R/W 24 R/W 28 R/W 02C R/W 30 R/W 34 R/W 38 R/W 03C R General (Genio) 44 R/W General (Genio) 48 R/W General (Genio) ...
Page 26
Address Type 1070 R/W 1074 R/W 68 R/W 06C R/W 70 R 07C R/W 08C R/W 09C RO 0A0 R/W 0A4 WO 0A8 R/W ...
Page 27
Address Type 0D8 R/W General (Timer) 0DC R/W 0E0 R/W 0E4 R/W 0E8 R/W 0EC RO 0F0 R/W 10F0 R/W 0F4 R/W 0F8 R/W 10F8 R/W 0FC R/W 1000 R/W General (DMA) 1004 R/W General (DMA) 1008 R/W General (DMA) ...
Page 28
Address Type 108 R/W 10C R/W 110 R/W 114 RO 120 R/W 124 R/W 128 R/W 12C R/W 134 R/W 13C R/W 200 R/W 204 R/W 208 R/W 20C R/W 210 R/W 214 R/W 218 R/W 21C R/W 220-224 R/W ...
Page 29
Address Type 334 R/W 338 R/W 33C R/W 400 R/W 404 R/W 408 R/W 40C R/W 410 RO 414 RO 418 R/W 41C R/W 438 RO 440 R/W 444 RO 448 R/W 44C R/W 450 R/W 454 R/W 458 RO ...
Page 30
Address Type 54C R/W 550 R/W 600 WO 604 WO 6XX RO 700 R/W 704 R/W 708 RO 70C R/W 710 R/W 714 R/W 718 R/W 71C R/W 720 R/W 724 R/W 728 R/W 72C RO 730 R/W 734 R/W ...
Page 31
Address Type 764 R/W 768 R/W 76C R/W 770 RO 774 R/W 778 WO 77C WO 800 R/W MPEG Vid. Decoder 804 R/W MPEG Vid. Decoder 808 R/W MPEG Vid. Decoder 80C R/W MPEG Vid. Decoder 810 RO MPEG Vid. ...
Page 32
Address Type A08 R/W A0C R/W A10 R/W A14 R/W A18 R/W A1C R/W A20 R/W A24 R/W A28 R/W A2C R/W A30 R/W A34 R/W B00 R/W B04 R/W B08 R/W B0C R/W B10 R/W B14 R/W B18 R/W ...
Page 33
Address Type B48 WO Video Processor B4C WO Video Processor B50 WO Video Processor B54 WO Video Processor B58 WO Video Processor B5c WO Video Processor B60 WO Video Processor B64 WO Video Processor B68 WO Video Processor B6C WO ...
Page 34
Address Type C40 R/W C44 R/W C50 R/W C54 R/W C58 R/W D00 RO D04 R/W D08 R/W D0C R/W D10 R/W D14 R/W D18 R/W D1C R/W D20 R/W D24 R/W D28 R/W D2C R/W D30 R/W D34 R/W ...
Page 35
Address Type E18 R/W E20 R/W E24 R/W E28 R/W E2C R/W E30 R/W E34 R/W E38 RO E3C R/W E40 R/W E44 R/W E48 RO E4C R/W E50 R/W E58 R/W E5C R/W E60 R/W E64 R/W E68 R/W ...
Page 36
Address Type F60 R/W F64 R/W F68 R/W F6C R/W F70 R/W F74 R/W F78 R/W F7C R/W F80 R/W F84 R/W F88 R/W F8C R/W F90 R/W F94 R/W F98 R/W F9C R/W FA0-FFC R/W 2xxxx R/W 36 Function ...
Page 37
PIN DESCRIPTIONS . H_D[15:0] H_CS[3:0] H_A[2:0] DVD IF / ATAPI IF (27 pins) DVDS_CLK Serial DVD DVDS_DAT (4 pins) DVDS_VLD DVDS_SOS XTLCLK_I XTLCLK_O Misc. (13 pins) MFG_TST GPIO[7:0] SER_CLK SER_DO Serial I/O (8 pins) MS_SCL1 MS_SDA1 M_SCL2 M_SDA2 Table ...
Page 38
PIN ASSIGNMENTS Table 15 lists the pin number, pin name and pin type for the 208-pin CS98100 package. For signal pins, the pin direction after reset is shown. The pri- Pin Name Type Reset 1 PLL_1V8 Pwr 2 M_A11 ...
Page 39
Pin Name Type Reset 25 GPIO4 B4U I 26 GPIO5 B4U I 27 Not used 28 Not used 29 Not used 30 Not used 31 Not used 32 Not used 33 Not used 34 Not used 35 M_BS_N O8 O ...
Page 40
Pin Name Type Reset 52 M_D24 B8U I 53 M_D23 B8U I 54 M_D22 B8U I 55 M_D21 B8U I 56 GPIO6 B4U I 57 GPIO7 B4U I 58 IO_GND Gnd 59 NVM_CE_N NVM_OE_N ...
Page 41
Pin Name Type Reset 79 DIG_1V8 Pwr 80 M_D10 B8U I 81 DIG_GND Gnd 82 IO_GND Gnd 83 M_D9 B8U I 84 M_A8 M_A7 IO_3V3 Pwr 87 H_D3 H_D2 B4 I ...
Page 42
Pin Name Type Reset 106 VDAT1 B4 O 107 VDAT2 B4 O 108 VDAT3 B4 O 109 VDAT4 B4 O 110 VDAT5 B4 O 111 VDAT6 B4 O 112 VDAT7 B4 O 113 HSYNC O8 O 114 VSYNC O8 O ...
Page 43
Pin Name Type Reset 133 Not used 134 AIN_DATA B4U I 135 Not used 136 AIN_LRCK B4U I 137 IEC958_O O4 O 138 GPIO0 B4U I 139 MS_SCL1 B4SU I 140 MS_SDA1 B4SU I 141 IO_3V3 Pwr 142 M_SCL2 B4SU ...
Page 44
Pin Name Type Reset 160 H_D15 B4 I 161 DIG_1V8 Pwr 162 H_D14 B4 I 163 H_D13 B4S I 164 H_D12 B4 I 165 H_D11 B4 I 166 H_D10 B4 I 167 H_D9 B4 I 168 H_D8 B4 I 169 ...
Page 45
Pin Name Type Reset 187 V_R_YC Analog 188 DAC_3V3 Pwr 189 DAC_GND Gnd 190 COMP Analog 191 RSET Analog 192 VREF Analog 193 DAC_3V3 Pwr 194 DAC_GND Gnd 195 DAC_GND Gnd 196 DAC_3V3 Pwr 197 DAC_3V3 Pwr. 198 IO_GND Gnd ...
Page 46
Miscellaneous Pins These pins are used for used for basic functions, such as clocking, reset, and infrared receiver interface. Pin Signal Name 152 IR_IN 205 XTLCLK_I 206 XTLCLK_O 154 RST_N 125 MFG_TEST 46 Type I De-modulated infrared Input, from ...
Page 47
Serial Interface There are two 2-wire serial controllers, which sup- port industry standard protocols. One controller is a combination master/slave, and is typically used for debug (slave control a small non-volatile memory (master). The slave chip select ...
Page 48
SDRAM Interface These pins are used to interface the CS98100 with external SDRAM of various sizes. Typical config- urations are two 1 Mbyte x16-bit, or one 2 Mbyte Pin Signal Name 43, 44, 45, 46, M_D[31:0] 47, 49, 51, ...
Page 49
ROM/NVRAM Interface This interface connects to the non-volatile memory that contains the firmware. The memory could be ROM, NVRAM (FLASH), EEPROM, or any com- bination of these. This interface can also connect to SRAM that can emulate a ROM ...
Page 50
Digital Video Output Interface This interface can be used to drive CCIR- 601/CCIR-656 digital data to an external video en- coder (such as an CS4955), for example if a fourth DAC is required. The CS98100 is sync master of ...
Page 51
Audio Output/Input Interface This is the audio PCM interface that connects to an audio CODEC. The sample rate and the size of the Pin Signal Name 120 AUD_XCK 121 AUD_BCK 122 AUD_LRCK 128 AUD_DO0 130 AUD_DO1 131 AUD_DO2 132 ...
Page 52
Host Master/ATAPI Interface This 16-bit parallel host interface allows the CS98100 host master, controlling other de- vices that would be used on the same system. The interface supports a programmable protocols and speeds, including multiplexed and ...
Page 53
DVD I/O Channel Interface This interface connects to standard DVD loaders, and consists of three parts: Control, DVD Data and CD Data. This interface shares CS98100 pins with the Host Master/ATAPI interface. The pin defini- Pin Signal Name 94 ...
Page 54
DVD Serial Data Interface This interface connects to the data port of low cost DVD loaders using a 4-wire serial interface. In this case, control for the loader will typically be done using the 2-wire serial interface master. The ...
Page 55
Video Encoder Interface The video encoder interface has three DAC out- puts, and operates in one of three modes: compo- nent YUV, component RGB, and S-Video plus composite. The component modes may operate ei- Pin Signal Name 181 U_B_C ...
Page 56
General Purpose Input/Output (GPIO) The CS98100 provides a number of GPIO pins, each with individual output three-state controls. There are eight dedicated GPIO pins, which can also be used to generate internal interrupts based on edge or level events ...
Page 57
Power and Ground The CS98100 requires five different types of power supplies for the Plus, internal logic, IO pins, video DAC-digital and video DAC analog. The PLLs, in- ternal logic and video DAC digital use 1.8 V supply voltage. ...
Page 58
PIN MQFP PACKAGE SPECIFICATIONS 208 0.50±0.10 +0.10 0.15 –0.05 0.20 ±0.05 Notes: Measurement Unit = mm Figure 15. CS98100 208-Pin MQFP Package Drawing 58 30.60±0.30 28.00±0.13 157 156 105 104 WITH PLATING BASE METAL DETAIL ...
Page 59
Notes • ...
Page 60
...