AT28C64B-20JC ATMEL Corporation, AT28C64B-20JC Datasheet

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AT28C64B-20JC

Manufacturer Part Number
AT28C64B-20JC
Description
357-036-542-201 CARDEDGE 36POS DL .156 BLK LOPRO
Manufacturer
ATMEL Corporation
Datasheet
Features
Fast Read Access Time – 150 ns
Automatic Page Write Operation
– Internal Address and Data Latches for 64 Bytes
Fast Write Cycle Times
– Page Write Cycle Time: 10 ms Maximum (Standard)
2 ms Maximum (Option – Ref. AT28HC64BF Datasheet)
– 1 to 64-byte Page Write Operation
Low Power Dissipation
– 40 mA Active Current
– 100 µA CMOS Standby Current
Hardware and Software Data Protection
DATA Polling and Toggle Bit for End of Write Detection
High Reliability CMOS Technology
– Endurance: 100,000 Cycles
– Data Retention: 10 Years
Single 5V ±10% Supply
CMOS and TTL Compatible Inputs and Outputs
JEDEC Approved Byte-wide Pinout
Industrial Temperature Ranges
Green (Pb/Halide-free) Packaging Option
1. Description
The AT28C64B is a high-performance electrically-erasable and programmable read-
only memory (EEPROM). Its 64K of memory is organized as 8,192 words by 8 bits.
Manufactured with Atmel’s advanced nonvolatile CMOS technology, the device offers
access times to 150 ns with power dissipation of just 220 mW. When the device is
deselected, the CMOS standby current is less than 100 µA.
The AT28C64B is accessed like a Static RAM for the read or write cycle without the
need for external components. The device contains a 64-byte page register to allow
writing of up to 64 bytes simultaneously. During a write cycle, the addresses and 1 to
64 bytes of data are internally latched, freeing the address and data bus for other
operations. Following the initiation of a write cycle, the device will automatically write
the latched data using an internal control timer. The end of a write cycle can be
detected by DATA POLLING of I/O7. Once the end of a write cycle has been
detected, a new access for a read or write can begin.
Atmel’s AT28C64B has additional features to ensure high quality and manufacturabil-
ity. The device utilizes internal error correction for extended endurance and improved
data retention characteristics. An optional software data protection mechanism is
available to guard against inadvertent writes. The device also includes an extra
64 bytes of EEPROM for device identification or tracking.
64K (8K x 8)
Parallel
EEPROM with
Page Write and
Software Data
Protection
AT28C64B
0270K–PEEPR–10/06

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AT28C64B-20JC Summary of contents

Page 1

... When the device is deselected, the CMOS standby current is less than 100 µA. The AT28C64B is accessed like a Static RAM for the read or write cycle without the need for external components. The device contains a 64-byte page register to allow writing bytes simultaneously ...

Page 2

... GND 14 15 AT28C64B 2 2.2 32-lead PLCC Top View Note: PLCC package pins 1 and 17 are Don’t Connect. 2.3 28-lead TSOP Top View OE VCC A11 A11 VCC OE NC A10 A12 CE ...

Page 3

... Read The AT28C64B is accessed like a Static RAM. When CE and OE are low and WE is high, the data stored at the memory location determined by the address pins is asserted on the outputs. The outputs are put in the high-impedance state when either high. This dual line control gives designers flexibility in preventing bus contention in their systems ...

Page 4

... AT28C64B will be protected against inadvertent writes. It should be noted that even after SDP is enabled, the user may still perform a byte or page write to the AT28C64B by preceding the data to be written by the same 3-byte command sequence used to enable SDP. Once set, SDP remains active unless the disable command sequence is issued. Power transi- tions do not disable SDP, and SDP protects the AT28C64B during power-up and power-down conditions ...

Page 5

... CC Condition MHz OUT -400 µA OH AT28C64B WE I OUT High High Z V High Z IL Min Max Units 10 µA 10 µA 100 µA ...

Page 6

... ADDRESS VALID ACC HIGH after the address transition without impact on t ACC after the falling edge of CE without impact pF). L AT28C64B-15 Min Max 150 150 OUTPUT VALID . ACC after an address change ...

Page 7

... Input Test Waveforms and Measurement Level 12. Output Test Load 13. Pin Capacitance ( MHz 25°C Symbol Typ OUT Note: 1. This parameter is characterized and is not 100% tested. 0270K–PEEPR–10/ < Max 6 12 AT28C64B Units Conditions OUT 7 ...

Page 8

... CH t Write Pulse Width ( Data Setup Time Data, OE Hold Time DH OEH 15. AC Write Waveforms 15.1 WE Controlled OE ADDRESS CE WE DATA IN 15.2 CE Controlled OE ADDRESS WE CE DATA IN AT28C64B 8 t OES OES Min ...

Page 9

... Chip Erase Waveforms (min 12.0V ±0.5V H 0270K–PEEPR–10/06 (1)(2) t WPH VALID ADD t DS VALID DATA µs (min.) AT28C64B Min Max 100 150 50 t BLC Units µ ...

Page 10

... DATA Notes through A12 must specify the same page address during each high to low transition of WE (or CE) after the software code has been entered must be high only when WE and CE are both low. AT28C64B 10 20. Software Data Protection Disable (2) Notes: ...

Page 11

... Any address location may be used but the address should not vary. 0270K–PEEPR–10/06 (1) See “AC Read Characteristics” on page 6. t OEH t OE (1) (1)(2)( OEH OEHP AT28C64B Min Typ Max Min Typ Max 10 10 150 Units ...

Page 12

... Normalized I Graphs CC AT28C64B 12 0270K–PEEPR–10/06 ...

Page 13

... Wide, Plastic Gull Wing Small Outline (SOIC) 28T 28-lead, Plastic Thin Small Outline Package (TSOP) 0270K–PEEPR–10/06 (1) Ordering Code AT28C64B-15JI AT28C64B-15PI AT28C64B-15SI AT28C64B-15TI Ordering Code AT28C64B-15JU AT28C64B-15SU AT28C64B-15TU AT28C64B-15PU Package and Temperature Combinations JI, JU, PI, SI, SU, TI, TU, PU Package Type AT28C64B Package Operation Range 32J 28P6 Industrial 28S (-40° ...

Page 14

... Allowable protrusion is .010"(0.254 mm) per side. Dimension D1 and E1 include mold mismatch and are measured at the extreme material condition at the upper or lower parting line. 3. Lead coplanarity is 0.004" (0.102 mm) maximum. 2325 Orchard Parkway San Jose, CA 95131 R AT28C64B 14 1.14(0.045) X 45˚ PIN NO. 1 IDENTIFIER E1 E ...

Page 15

... A1 0.381 – D 36.703 – E 15.240 – E1 13.462 – B 0.356 – B1 1.041 – L 3.048 – C 0.203 – eB 15.494 – e 2.540 TYP DRAWING NO. AT28C64B MAX NOTE 4.826 – 37.338 Note 2 15.875 13.970 Note 2 0.559 1.651 3.556 0.381 17.526 09/28/01 REV. 28P6 B 15 ...

Page 16

... SOIC Dimensions in Millimeters and (Inches). Controlling dimension: Millimeters. 2325 Orchard Parkway San Jose, CA 95131 R AT28C64B 16 0.51(0.020) 0.33(0.013) 7.60(0.2992) 7.40(0.2914) PIN 1 1.27(0.50) BSC TOP VIEW 18.10(0.7125) 17.70(0.6969) 0.30(0.0118) 0.10(0.0040) 0º ~ 8º 1.27(0.050) 0.40(0.016) TITLE 28S, 28-lead, 0.300" Body, Plastic Gull Wing Small Outline (SOIC) JEDEC Standard MS-013 10 ...

Page 17

... Orchard Parkway San Jose, CA 95131 R 0270K–PEEPR–10/06 PIN SEATING PLANE A1 TITLE 28T, 28-lead (8 x 13.4 mm) Plastic Thin Small Outline Package, Type I (TSOP) AT28C64B 0º ~ 5º GAGE PLANE COMMON DIMENSIONS (Unit of Measure = mm) SYMBOL MIN NOM MAX A – ...

Page 18

... Atmel products are not suitable for, and shall not be used in, automotive applications. Atmel’s products are not intended, authorized, or warranted for use as components in applications intended to support or sustain life. © 2006 Atmel Corporation. All rights reserved. Atmel marks or trademarks of Atmel Corporation or its subsidiaries. Other terms and product names may be trademarks of others. Atmel Operations Memory ...

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