MC68HC708MP16CFU

Manufacturer Part NumberMC68HC708MP16CFU
ManufacturerFreescale Semiconductor, Inc
MC68HC708MP16CFU datasheet
 
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Page 104/398:

Clock Generator Module (CGM)

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Clock Generator Module (CGM)

8.10
8.10.1
8.10.2
8.10.3
8.10.4
8.2 Introduction
This section describes the clock generator module (CGM, Version A).
The CGM generates the crystal clock signal, CGMXCLK, which operates
at the frequency of the crystal. The CGM also generates the base clock
signal, CGMOUT, from which the system integration module (SIM)
derives the system clocks. CGMOUT is based on either the crystal clock
divided by two or the phase-locked loop (PLL) clock, CGMVCLK, divided
by two. The PLL is a frequency generator designed for use with crystals
or ceramic resonators. The PLL can generate an 8-MHz bus frequency
without using a 32-MHz crystal.
8.3 Features
Features of the CGM include the following:
Technical Data
104
Acquisition/Lock Time Specifications . . . . . . . . . . . . . . . . . . . 124
Acquisition/Lock Time Definitions . . . . . . . . . . . . . . . . . . . 124
Parametric Influences on Reaction Time . . . . . . . . . . . . . 126
Choosing a Filter Capacitor. . . . . . . . . . . . . . . . . . . . . . . . 127
Reaction Time Calculation . . . . . . . . . . . . . . . . . . . . . . . . 127
Phase-locked loop with output frequency in integer multiples of the
crystal reference
Programmable hardware voltage-controlled oscillator (VCO) for
low-jitter operation
Automatic bandwidth control mode for low-jitter operation
Automatic frequency lock detector
CPU interrupt on entry or exit from locked condition

Clock Generator Module (CGM)

MC68HC708MP16
Rev. 3.1
Freescale Semiconductor