MC68HC708MP16CFU

Manufacturer Part NumberMC68HC708MP16CFU
ManufacturerFreescale Semiconductor, Inc
MC68HC708MP16CFU datasheet
 
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Page 107/398:

Phase-Locked Loop Circuit (PLL)

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Addr.
Name
PLL Control Register
$FE0B
(PCTL)
PLL Bandwidth Control
$FE0C
Register (PBWC)
PLL Programming Register
$FE0D
(PPG)
8.4.2 Phase-Locked Loop Circuit (PLL)
The PLL is a frequency generator that can operate in either acquisition
mode or tracking mode, depending on the accuracy of the output
frequency. The PLL can change between acquisition and tracking
modes either automatically or manually.
8.4.2.1 PLL Circuits
The PLL consists of the following circuits:
•
•
•
•
•
MC68HC708MP16
Rev. 3.1
—
Freescale Semiconductor
Bit 7
6
5
Read:
PLLF
PLLIE
PLLON
Write:
Reset:
0
0
1
Read:
LOCK
AUTO
ACQ
Write:
Reset:
0
0
0
Read: MUL7
MUL6
MUL5
Write:
Reset:
0
1
1
= Unimplemented
Figure 8-2. CGM I/O Register Summary
Voltage-controlled oscillator (VCO)
Modulo VCO frequency divider
Phase detector
Loop filter
Lock detector
Clock Generator Module (CGM)
Clock Generator Module (CGM)
4
3
2
1
1
1
1
BCS
0
1
1
1
0
0
0
XLD
0
0
0
0
MUL4
VRS7
VRS6
VRS5
0
0
1
1
Technical Data
Bit 0
1
1
0
0
VRS4
0
107

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