MC68HC708MP16CFU

Manufacturer Part NumberMC68HC708MP16CFU
ManufacturerFreescale Semiconductor, Inc
MC68HC708MP16CFU datasheet
 
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Pulse Width Modulator for Motor Control (PWMMC)
9.6.3.1 Manual Correction
The IPOL1–IPOL3 bits select either the odd or the even PWM value
registers to use in the next PWM cycle.
NOTE:
The IPOLx bits are buffered so that only one PWM register is used per
PWM cycle. If an IPOLx bit changes during a PWM period, the new value
does not take effect until the next PWM period.
The IPOLx bits take effect at the end of each PWM cycle regardless of
the state of the load okay bit, LDOK.
Figure 9-20. Internal Correction Logic when ISENS[1:0] = 0X
The best time to change from one PWMVAL register to another is just
before the current zero crossing.
waveforms under high current and low current conditions. During a
Technical Data
152
Pulse Width Modulator for Motor Control (PWMMC)
Table 9-5. Top/Bottom Manual Correction
Bit
Logic state
0
PMVAL1 controls PWM1/PWM2 pair
IPOL1
1
PMVAL2 controls PWM1/PWM2 pair
0
PMVAL3 controls PWM3/PWM4 pair
IPOL2
1
PMVAL4 controls PWM3/PWM4 pair
0
PMVAL5 controls PWM5/PWM6 pair
IPOL3
1
PMVAL6 controls PWM5/PWM6 pair
PWM CONTROLLED BY
A
ODD PWMVAL REGISTER
PWM CONTROLLED BY
B
EVEN PWMVAL REGISTER
A/B
D
Q
IPOLx BIT
CLK
PWM CYCLE START
Figure 9-21
Output control
TOP PWM
DEADTIME
GENERATOR
BOTTOM PWM
shows motor voltage
MC68HC708MP16
Rev. 3.1
Freescale Semiconductor