MC68HC708MP16CFU

Manufacturer Part NumberMC68HC708MP16CFU
ManufacturerFreescale Semiconductor, Inc
MC68HC708MP16CFU datasheet
 
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Page 273/398:

MISO (Master In/Slave Out)

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13.13 I/O Signals
The SPI module has five I/O pins and shares four of them with a parallel
I/O port.
The SPI has limited inter-integrated circuit (I
software support) as a master in a single-master environment. To
communicate with I
when the SPWOM bit in the SPI control register is set. In I
communication, the MOSI and MISO pins are connected to a
bidirectional pin from the I
V
DD
13.13.1 MISO (Master In/Slave Out)
MISO is one of the two SPI module pins that transmits serial data. In full
duplex operation, the MISO pin of the master SPI module is connected
to the MISO pin of the slave SPI module. The master SPI simultaneously
receives data on its MISO pin and transmits data from its MOSI pin.
Slave output data on the MISO pin is enabled only when the SPI is
configured as a slave. The SPI is configured as a slave when its
SPMSTR bit is logic 0 and its SS pin is at logic 0. To support a multiple-
slave system, a logic 1 on the SS pin puts the MISO pin in a high-
impedance state.
When enabled, the SPI controls data direction of the MISO pin
regardless of the state of the data direction register of the shared I/O
port.
MC68HC708MP16
Rev. 3.1
Freescale Semiconductor
MISO — Data received
MOSI — Data transmitted
SPSCK — Serial clock
SS — Slave select
CGND — Clock ground
2
C peripherals, MOSI becomes an open-drain output
2
C peripheral and through a pullup resistor to
.
Serial Peripheral Interface Module (SPI)
Serial Peripheral Interface Module (SPI)
2
C) capability (requiring
2
C
Technical Data
273