PM5342-BI PMC-Sierra Inc, PM5342-BI Datasheet
PM5342-BI
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PM5342-BI Summary of contents
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... DATA SHEET PMC-1970133 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER PROPRIETARY AND CONFIDENTIAL PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 PM5342 SPECTRA-155 DATA SHEET ISSUE 5: NOVEMBER 2005 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER ...
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... ABSOLUTE MAXIMUM RATINGS................................................... 493 15 D.C. CHARACTERISTICS............................................................... 494 16 MICROPROCESSOR INTERFACE TIMING CHARACTERISTICS ....................................................................... 499 17 SPECTRA-155 TIMING CHARACTERISTICS................................. 507 18 ORDERING AND THERMAL INFORMATION.................................. 540 19 MECHANICAL INFORMATION........................................................541 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER i ...
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... REGISTER ADDRESS 14H: SPECTRA-155 OUTPUT PORT ................... 179 REGISTER ADDRESS 15H: SPECTRA-155 INPUT PORT INTERRUPT ENABLE .....................................................................180 REGISTER ADDRESS 17H: SPECTRA-155 RING CONTROL ................. 181 REGISTER 18H: TSOP CONTROL............................................................183 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER ii ...
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... REGISTER ADDRESS 35H: RASE RECEIVE K1 ...................................... 209 REGISTER ADDRESS 36H: RASE RECEIVE K2 ...................................... 210 REGISTER 37H: RASE RECEIVE Z1/S1................................................... 211 REGISTER 38H: SSTB SECTION TRACE CONTROL .............................. 212 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER iii ...
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... REGISTER 84H: SPECTRA-155 RALM[1] OUTPUT CONTROL............... 239 REGISTER 85H: SPECTRA-155 RALM[2] OUTPUT CONTROL............... 240 REGISTER 86H: SPECTRA-155 RALM[3] OUTPUT CONTROL............... 241 REGISTER 87H: SPECTRA-155 DATA MODE CONFIGURATION ........... 242 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER iv ...
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... REGISTER B5H, C5H, D5H: TPIP POINTER LSB..................................... 267 REGISTER B6H, C6H, D6H: TPIP POINTER MSB.................................... 268 REGISTER B8H, C8H, D8H: TPIP PATH BIP-8 LSB.................................. 270 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER v ...
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... STATUS ........................................................................................... 295 REGISTER EDH: SPECTRA-155 AUTO TRACE MESSAGE MODE 1/2 CONTROL .................................................................................296 REGISTER EFH: SPECTRA-155 RECEIVE CONCAT PATH AIS, RDI AND ENHANCED RDI CONTROL #1...................................... 298 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER vi ...
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... REGISTER FDH: SPECTRA-155 AUXILIARY PATH STATUS #2 .............. 325 REGISTER FEH: SPECTRA-155 AUXILIARY PATH STATUS #3 .............. 326 REGISTER 100H: SPECTRA-155 PATH/MAPPER CONFIGURATION ...........................................................................327 REGISTER 101H: SPECTRA-155 RECEIVE PATH AIS CONTROL #1.....................................................................................................329 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER vii ...
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... REGISTER 114H, 154H, 194H: RPOP POINTER INTERRUPT ENABLE...........................................................................................354 REGISTER 115H, 155H, 195H: RPOP POINTER LSB .............................. 356 REGISTER 116H, 156H, 196H: RPOP POINTER MSB ............................. 357 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER viii ...
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... REGISTER 133H, 173H, 1B3H: TPOP CURRENT POINTER LSB............ 384 REGISTER 135H, 175H, 1B5H: TPOP PAYLOAD POINTER LSB............. 385 REGISTER 137H, 177H, 1B7H: TPOP PATH TRACE................................ 387 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER ix ...
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... REGISTER 14CH, 18CH, 1CCH: SPTB EXPECTED PATH SIGNAL LABEL.............................................................................................. 411 REGISTER 14DH, 18DH, 1CDH: SPTB PATH SIGNAL LABEL STATUS ........................................................................................... 412 REGISTER ADDRESS 200H: SPECTRA-155 MASTER TEST.................. 418 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER x ...
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... PIN DIAGRAM: NIBBLE DATA MODE (SMODE[2:0]=100)................................................................ 24 FIGURE 15 - PIN DIAGRAM: SERIAL DATA MODE (SMODE[2:0]=101)................................................................ 25 FIGURE 16 - PIN DIAGRAM: SERIAL DS3 MODE (SMODE[2:0]=110) ................................................................26 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER xi ...
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... DATA ALIGNMENT (R64SEL=1) ......................................... 449 FIGURE 33 - RECEIVE SECTION/LINE DCC CLOCK AND DATA ALIGNMENT........................................................................450 FIGURE 34 - RECEIVE LINE DCC CLOCK AND DATA ALIGNMENT........................................................................451 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER xii ...
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... STS-1 (STM-0/AU3) NIBBLE MODE DROP BUS TIMING 468 FIGURE 51 - STS-1/3 (STM-0/AU3, STM-1/AU3) SERIAL MODE DROP BUS TIMING ............................................................ 469 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 456 457 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER xiii ...
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... ADD BUS TIMING ............................................................... 482 FIGURE 65 - STS-3 (STM-1/AU3) BYTE MODE ADD BUS TIMING 483 FIGURE 66 - STS-3 (STM-1/AU3) NIBBLE MODE ADD BUS TIMING 484 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER xiv ...
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... ACCESS TIMING (INTEL MODE) ....................................... 504 FIGURE 80 - MICROPROCESSOR INTERFACE WRITE ACCESS TIMING (MOTOROLA MODE) ............................. 505 FIGURE 81 RECEIVE LINE INPUT INTERFACE TIMING...................... 508 FIGURE 82 - RECEIVE LINE OUTPUT TIMING..................................... 510 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER xv ...
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... DATA MODE TRANSMIT BUS NIBBLE OUTPUT TIMING 529 FIGURE 99 - DS3 AND DATA MODE TRANSMIT BUS (SERIAL) INPUT TIMING .................................................................... 530 FIGURE 100 - TRANSMIT PATH OVERHEAD INPUT TIMING ................ 531 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER xvi ...
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... FIGURE 105 - LINE SIDE TRANSMIT INTERFACE TIMING ................... 537 FIGURE 106 - JTAG PORT INTERFACE TIMING .................................... 538 FIGURE 107 - 256 PIN SUPER BALL GRID ARRAY (B SUFFIX): ........... 541 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER xvii ...
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... TABLE. ................................................................................123 TABLE 17 - ASYNCHRONOUS DS3 MAPPING TO STS-1 (STM- 0/AU3). ................................................................................129 TABLE 18 - DS3 AIS FORMAT...............................................................130 TABLE 19 - DS3 DESYNCHRONIZER CLOCK GAPPING ALGORITHM. ......................................................................132 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER xviii ...
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... REGISTERS........................................................................419 TABLE 36 - TEST MODE 0 PRIMARY OUTPUT WRITE REGISTERS........................................................................421 TABLE 37 - JTAG INSTRUCTION REGISTER BITS ....................................................................................423 TABLE 38 - BOUNDARY SCAN REGISTER.......................................... 424 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER LENGTH - 3 xix ...
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... DATA MODE RECEIVE BUS (BYTE AND NIBBLE) OUTPUT TIMING ................................................................ 519 TABLE 57 - DS3 RECEIVE BUS INPUT TIMING................................... 521 TABLE 58 - DS3 AND DATA MODE RECEIVE BUS (SERIAL) OUTPUT TIMING ................................................................ 522 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER xx ...
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... TRANSMIT OVERHEAD OUTPUT TIMING........................ 536 TABLE 71 - LINE SIDE TRANSMIT INTERFACE TIMING ..................... 537 TABLE 72 - JTAG PORT INTERFACE ................................................... 538 TABLE 73 - ORDERING INFORMATION............................................... 540 TABLE 74 - THERMAL INFORMATION. ................................................ 540 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER xxi ...
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... Provides a generic 8-bit microprocessor bus interface for configuration, control, and status monitoring. • Low power +5 Volt CMOS. Device has PECL and TTL compatible inputs and TTL outputs. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 1 ...
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... Optionally returns line RDI in the transmit stream. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 2 ...
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... Detects received path BIP-8 and counts received path BIP-8 errors for performance monitoring purposes. BIP-8 errors are selectable to be treated PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 3 ...
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... For Telecombus interfaces, accommodates phase and frequency differences between the receive/transmit streams and the DROP/ADD busses via pointer adjustments. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 4 ...
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... STS-3 (STM-1/AU3) SPEs. • For the DS3 interface, provides optional insertion of framed DS3 AIS in both the ADD and DROP directions. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 43 +1 scrambler/descrambler 5 ...
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... ITU, Recommendation G.707 - "Network Node Interface For The Synchronous Digital Hierarchy", 1996. • ITU Recommendation G.781, - “Structure of Recommendations on Equipment for the Synchronous Digital Hierarchy (SDH)”, January, 1994. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 6 ...
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... Operating at the Primary Rate and Above”, October, 1992. • ITU Study Group XVII - Contribution D2166 - "Tandem Connection / Tandem Connection Bundle Maintenance - Working Solution", June 1992. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 7 ...
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... TRANSMIT SECTION, LINE, PATH ALARM SMODE[2:0]="000" INSERT SIGNALS PM5342 SPECTRA-155 RECEIVE MICRO BUS SECTION, LINE, FOR CONFIG, PATH ALARM STATUS DETECT SIGNALS AND CONTROL PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER Telecombus ACK Add AC1J1V1 Interface APL AD[7:0] ADP DCK DC1J1V1 Telecombus DPL ...
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... SPECTRA-155 DS3ROCLK[3:1] DS3RDAT[3:1] DS3RICLK[3:1] RECEIVE MICRO BUS SECTION, LINE, FOR CONFIG, PATH ALARM STATUS DETECT SIGNALS AND CONTROL PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 44.736 MHz* TICLK TCLK TDAT 3 * PM7345 SUNI-PDH PM8313 D3MX RCLK RDAT 44.928 MHz * For the PM7345, the 44.736 ...
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... TRANSMIT SECTION, LINE, PATH ALARM SMODE[2:0]="101" INSERT SIGNALS SDMTO CLK[3:1] SDMTICLK[3:1] SDMTDAT[3:1] PM5342 SPECTRA-155 SDMROCLK[3:1] SDMRDAT[3:1] RECEIVE MICRO BUS SECTION, LINE, FOR CO NFIG , PATH ALARM STATUS DETECT SIGNALS AND CONTROL PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER TCLK[0] TDAT[ PM7364 FREEDM RCLK[0] RDAT[0] 10 ...
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... SCLK DCK RECE IVE M ICROBUS SECTION , LINE FO R CONFIG, PATH ALAR M STATU S DETE CT SIGN ALS AND CONTRO L PM 5362 TUPP Plus PM 5342 SPECTRA-155 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 8 BIT TELECO MBUS INTERFACE PM 5362 TUPP-PLUS OD[7:0], ODP OTV 5 OTP L TPO H PM 5371 TUDX 11 ...
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... MICRO BUS SEC TION, LINE FOR CON FIG, PATH ALARM STA TU S DETECT S IGN ALS AND CONTROL Packet Over PM 5342 SAR SO NET HDLC SPECTRA-155 Processor PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER PACKET OVER SONET INTERFACE (TO BUS INTERFACE) TFCLK TCLKI TENB TD A TSO P ...
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... Rx Path O/H Rx Telecom Processor #2 Aligner #2 (RPOP #2) (RTAL #2) Rx Path O/H Rx Telecom Processor #3 Aligner #3 (RPOP #3) (RTAL #3) Transport O/H Extract Microprocessor I/F PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 3 ADD Bus PRBS Generator/ 3 Monitor DS3 Mapper Add Side #1 (D3MA #1) DS3 Mapper Add Side #2 (D3MA #2) 3 DS3 Mapper Add Side #3 ...
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... Rx Telecom Line O/H Processor #2 Aligner #2 Processor (RPOP #2) (RTAL #2) (RLOP) Rx Path O/H Rx Telecom Processor #3 Aligner #3 (RPOP #3) (RTAL #3) Transport O/H Extract PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER JTAG Test 3 Access Port ADD Bus PRBS Generator/ 3 Monitor DS3 Mapper Add Side #1 (D3MA #1) DS3 Mapper Add Side #2 (D3MA #2) 3 DS3 Mapper ...
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... Res. Output Res. Output Res. Output SDTPAIS[1] Res. Input Res. Input SDTPAIS[2] Res. Input Res. Input SDTPAIS[3] Res. Input Res. Input PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER Serial Data Serial DS3 Mode Mode SMODE=101 SMODE=110 Res. Input DS3RICLK[1] Res. Input Res. Input Res ...
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... DATA SHEET PMC-970133 2. Res. Output pins are Reserved Output pins which must be left unconnected. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 16 ...
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... DATA SHEET PMC-970133 6 DESCRIPTION The PM5342 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER (SPECTRA-155) terminates the transport and path overhead of STS-1 (STM-0/AU3) and STS-3/3c (STM-1/AU3/AU4) streams at 51.84 Mbit/s and 155.52 Mbit/s respectively. The SPECTRA-155 implements significant functions for a SONET/SDH compliant line interface. The SPECTRA-155 receives SONET/SDH frames via a bit serial interface, recovers clock and data, and terminates the SONET/SDH section (regenerator section), line (multiplexer section), and path ...
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... The SPECTRA-155 is implemented in low power, +5 Volt, CMOS technology. It has TTL and pseudo ECL (PECL) compatible inputs and outputs and is packaged in a 256 pin SBGA package. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 18 ...
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... The SPECTRA-155 is available in a 256 pin SBGA package having a body size and a ball pitch of 1.27 mm. There are seven pinout diagrams; each corresponds to a different system side mode (SMODE) configuration. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 19 ...
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... QAVD3 TAVS3 TAVD2 NC5 RAVS3 RXD+ RXD- QAVS2 TRCLK+ TAVS1 NC4 NC_F NC_C NC_D QAVD2 TRCLK- NC_E TAVS2 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER SS[32]/ A SCPO[0] TPOH[3] VSS VSS VSS DTPAIS[1] SS[33]/ B SCPO[1] TPOHCLK[3] VDD VDD VSS DTPAIS[2] SS[34]/ ...
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... QAVD3 TAVS3 TAVD2 NC5 RAVS3 RXD+ RXD- QAVS2 TRCLK+ TAVS1 NC4 NC_F NC_C NC_D QAVD2 TRCLK- NC_E TAVS2 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER SS[32]/ A SCPO[0] TPOH[3] VSS VSS VSS DTPAIS[1] SS[33]/ B SCPO[1] TPOHCLK[3] VDD VDD VSS DTPAIS[2] SS[34]/ ...
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... QAVD3 TAVS3 TAVD2 NC5 RAVS3 RXD+ RXD- QAVS2 TRCLK+ TAVS1 NC4 NC_F NC_C NC_D QAVD2 TRCLK- NC_E TAVS2 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER SS[32]/ A SCPO[0] TPOH[3] VSS VSS VSS SDTPAIS[1] SS[33]/ B SCPO[1] TPOHCLK[3] VDD VDD VSS SDTPAIS[2] SS[34]/ ...
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... TAVD2 NC5 RAVS3 RXD+ RXD- QAVS2 TRCLK+ TAVS1 NC4 NC_F NC_C NC_D QAVD2 TRCLK- NC_E TAVS2 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER SS[32]/ A SCPO[0] TPOH[3] VSS VSS VSS Res. Input SS[33]/ B SCPO[1] TPOHCLK[3] VDD VDD VSS Res. Input ...
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... TAVD2 NC5 RAVS3 RXD+ RXD- QAVS2 TRCLK+ TAVS1 NC4 NC_F NC_C NC_D QAVD2 TRCLK- NC_E TAVS2 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER SS[32]/ A SCPO[0] TPOH[3] VSS VSS VSS Res. Input SS[33]/ B SCPO[1] TPOHCLK[3] VDD VDD VSS Res. Input ...
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... TAVD2 NC5 RAVS3 RXD+ RXD- QAVS2 TRCLK+ TAVS1 NC4 NC_F NC_C NC_D QAVD2 TRCLK- NC_E TAVS2 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER SS[32]/ A SCPO[0] TPOH[3] VSS VSS VSS Res. Input SS[33]/ B SCPO[1] TPOHCLK[3] VDD VDD VSS Res. Input ...
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... QAVD3 TAVS3 TAVD2 NC5 RAVS3 RXD+ RXD- QAVS2 TRCLK+ TAVS1 NC4 NC_F NC_C NC_D QAVD2 TRCLK- NC_E TAVS2 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER SS[32]/ A SCPO[0] TPOH[3] VSS VSS VSS DS3TAIS[1] SS[33]/ B SCPO[1] TPOHCLK[3] VDD VDD VSS DS3TAIS[2] SS[34]/ ...
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... RRCLK+/- when clock recovery is disabled (the falling edge may be used by reversing RRCLK+/-). Otherwise the receive clocks are recovered from the RXD+/- bit stream. RXD+/- is expected to be NRZ encoded. Clock recovery bypass is selectable using the RBYP input signal. PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 27 ...
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... TRCLK+/-) to keep the recovered clock in range. These inputs must be DC coupled. Please refer to the Operation section for a discussion of PECL interfacing issues. PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 28 ...
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... RCLK cycles for STS-1 (STM-0/AU3). A single discontinuity in RFP position occurs if a change of frame alignment occurs. RFP can be tristated using the TRIS_OHB input and the ROH_TS bit in the SPECTRA-155 Receive Overhead Output Control register. On reset, RFP will be tristate if TRIS_OHB is low. PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 29 ...
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... The 6.48 MHz reference clock supports only STS- 1 (STM-0/AU3) operation when clock synthesis is enabled. The 19.44 MHz reference clock supports both STS-1 (STM-0/AU3) and STS-3/3c (STM- 1/AU3/AU4) operation when clock synthesis is enabled. For TTL operation, please refer to the Operations section. PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 30 ...
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... STS-1 (STM-0/AU3) mode TCLK cycles. TFP is updated on the rising edge of TCLK. TFP can be tristate using the TRIS_OHB input and the TOH_TS bit in the SPECTRA-155 Transmit Overhead Input Control register. On reset, TFP will be tristate if TRIS_OHB is low. PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 31 ...
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... Pin Name Type C1 Analog C2 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 PIN Function No. W16 The analog C1 and C2 pins are provided for Y16 connecting an external loop-filter capacitor ceramic capacitor is required. PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 32 ...
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... OOF condition as a default after a device reset to optionally provide a dedicated output pin for this alarm. Please refer to the (optionally) dedicated output pins for LOS, LOF, LAIS and LRDI for the description of these alarms. SALM is updated on the rising edge of RCLK. PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 33 ...
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... RRCPFP is updated on the falling edge of RRCPCLK. M17 The loss of frame (LOF) signal is set high when an out of frame state persists for 3 ms. LOF is set low when an in frame state persists for 3 ms. LOF is updated on the rising edge of RCLK. PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 34 ...
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... SPECTRA-155 Section/Line Control/Enable Register). RRCPCLK is nominally a 3.24 MHz, 50% duty cycle clock and is normally connected to the TRCPCLK input of a mate SPECTRA-155 in ring-based add-drop multiplexer applications. RRCPFP and RRCPDAT are updated on the falling edge of RRCPCLK. PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 35 ...
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... AIS and send line RDI bit positions, and the line REI bit positions. RRCPDAT is normally connected to the TRCPDAT input of a mate SPECTRA-155 in ring-based add-drop multiplexer applications. RRCPDAT is updated on the falling edge of RRCPCLK. PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 36 ...
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... KHz clock used to update the RSLD output. RSLDCLK is generated by gapping a 2.16 MHz clock. RSLDCLK can be tristate using the TRIS_OHB input and the RSLD_TS bit in the SPECTRA-155 Receive Overhead Output Control register. On reset, RSLDCLK will be tristate if TRIS_OHB is low. PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 37 ...
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... RLOW is updated on the falling edge of ROWCLK. N17 The receive line DCC clock (RLDCLK 576 KHz clock used to update the RLD output. RLDCLK is generated by gapping a 2.16 MHz clock. PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 38 ...
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... KHz clock used to update the ROH output. ROHCLK is generated by gapping a 144 KHz clock. ROHCLK can be tristate using the TRIS_OHB input and the ROH_TS bit in the SPECTRA-155 Receive Overhead Output Control register. On reset, ROHCLK will be tristate if TRIS_OHB is low. PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 39 ...
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... RTOH. RTOHFP is set high while bit 1 (the most significant bit) of the first framing byte (A1) is present in the RTOH stream. RTOHFP is updated on the falling edge of RTOHCLK. PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 40 ...
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... AIS and send line RDI bit positions in the TRCPDAT stream. TRCPFP is normally connected to the RRCPFP output of a mate SPECTRA-155 in ring-based add-drop multiplexer applications. TRCPFP is sampled on the rising edge of TRCPCLK. PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 41 ...
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... AIS and send line RDI bit positions, and the line REI bit positions. TRCPDAT is normally connected to the RRCPDAT output of a mate SPECTRA-155 in ring-based add-drop multiplexer applications. TRCPDAT is sampled on the rising edge of TRCPCLK. PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 42 ...
Page 65
... The transmit order wire clock (TOWCLK KHz clock used to sample the TSOW, TSUC, and TLOW inputs. If selected using the T64SEL bit in the SPECTRA-155 Transmit Overhead Input Control register, TOWCLK is generated by gapping a 72 KHz clock; otherwise, TOWCLK is not gapped. PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 43 ...
Page 66
... TLDCLK is generated by gapping a 2.16 MHz clock. R4 The transmit line DCC (TLD) signal contains the line data communications channel (D4 - D12) inserted into the outgoing stream. The TTOHEN input takes precedence over TLD. TLD is sampled on the rising edge of TLDCLK. PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 44 ...
Page 67
... K2). Selection is made using the TOHSEL bits in the SPECTRA-155 Transmit Overhead Input Control register. The TTOHEN and TPOHEN inputs take precedence over TOH. TOH is sampled on the rising edge of TOHCLK. PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 45 ...
Page 68
... TTOH. TTOHCLK is a gapped 6.48 MHz clock when accessing the transport overhead of STS-3/3c (STM-1/AU3/AU4) streams. TTOHCLK is a gapped 2.16 MHz clock when accessing the transport overhead of an STS-1 (STM-0/AU3) stream. PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 46 ...
Page 69
... J0 byte contents are sourced from the section trace buffer, regardless of the state of TTOHEN. A low level on TTOH allows the corresponding bit positions to pass through the SPECTRA-155 uncorrupted. TTOHEN is sampled on the rising edge of TTOHCLK. PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 47 ...
Page 70
... Path BIP-8 errors are detected by comparing the extracted path BIP-8 byte (B3) with the computed BIP-8 for the previous frame. In STS-3c (STM-1/AU4) mode or STS-1 (STM-0/AU3) mode, only B3E[1] is active. B3E[3:1] is updated on the falling edge of RPOHCLK. PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 48 ...
Page 71
... PRDI[1] is active in STS-3c (STM-1/AU4) and STS-1 (STM-0/AU3) modes. The path enhanced remote defect indication signal (PERDI[1]) indicates the path enhanced remote state associated with the STS-1 (STM- PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 49 ...
Page 72
... LOM[[1] is active in STS-3c (STM-1/AU4) and STS-1 (STM-0/AU3) modes. The loss of pointer concatenation and path AIS concatenation signals (LOPCON and PAISCON) are the concatenated alarms for STS-3c (STM-1/AU4) SONET/SDH stream. PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 50 ...
Page 73
... STS-1 (STM- 0/AU3 STS-3 (STM-1/AU3) SONET/SDH stream. PERDI[2] is set high when the path ERDI alarm code (bits 5,6,7) of the path status (G1) byte is set to the same alarm codepoint for five or ten consecutive frames. PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 51 ...
Page 74
... Function No. The loss of multiframe signal (LOM[2]) indicates the tributary multiframe synchronization status associated with the STS-1 (STM-0/AU3 STS-3 (STM- 1/AU3) SONET/SDH stream. LOM[2] is set high if a correct four frame sequence is not detected in eight frames. PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 52 ...
Page 75
... STS-1 (STM- 0/AU3 STS-3 (STM-1/AU3) SONET/SDH stream. PERDI[3] is set high when the path ERDI alarm code (bits 5,6,7) of the path status (G1) byte is set to the same alarm codepoint for five or ten consecutive frames. PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 53 ...
Page 76
... Function No. The loss of multiframe signal (LOM[3]) indicates the tributary multiframe synchronization status associated with the STS-1 (STM-0/AU3 STS-3 (STM- 1/AU3) SONET/SDH stream. LOM[3] is set high if a correct four frame sequence is not detected in eight frames. PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 54 ...
Page 77
... B3, C2, G1, F2, H4, Z3, Z4, and Z5) extracted from the path overhead of the corresponding STS-1 (STM-0/AU3) stream. In STS-3c (STM-1/AU4) mode or STS-1 (STM-0/AU3) mode, only RPOH[1] is active. Each RPOH signal is updated on the falling edge of the corresponding RPOHCLK signal. PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 55 ...
Page 78
... Z5 byte. RTCEN has significance only during the J1 byte positions in the RPOHCLK clock sequence and is ignored at all other times. In STS-3c (STM-1/AU4) mode or STS-1 (STM-0/AU3) mode, only RTCEN[1] is significant. RTCEN is sampled on the rising edge of the corresponding RPOHCLK signal. PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 56 ...
Page 79
... Insertion is controlled by the corresponding TPOHEN input bits in internal registers. In STS-3c (STM-1/AU4) mode or STS-1 (STM-0/AU3) mode, only TPOH[1] is significant. Each TPOH input is sampled on the rising edge of the corresponding TPOHCLK output. PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 57 ...
Page 80
... E2 corresponding path overhead stream, TPOH. In STS-3c (STM-1/AU4) mode or STS-1 (STM-0/AU3) mode, TPOHCLK[ 576kHz clock and TPOHCLK[3:2] are inactive. TPOH and TPOHEN are sampled on the rising edge of the corresponding TPOHCLK. PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 58 ...
Page 81
... STS-3c (STM-1/AU4) stream. TAFP is sampled on the rising edge of TACK. N4 The transmit alarm port clock (TACK) provides timing for transmit alarm port. TACK is nominally a 576 KHz clock. Inputs TAD and TAFP are sampled on the rising edge of TACK. PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 59 ...
Page 82
... SMODE[2:0] should be strapped to one of the codepoints below: 000 -Byte Telecombus Mode 001 -Nibble Telecombus Mode 010 -Serial Telecombus Mode 011 -Byte Data Mode 100 -Nibble Data Mode 101 -Serial Data Mode 110 -Serial DS3 Mode 111 -Reserved PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 60 ...
Page 83
... The signal descriptions are listed A16 below for the modes selected using the SMODE[2:0] inputs. C15 B15 A15 C14 D13 B14 A14 C13 D12 B13 C12 B12 A12 D11 C11 B11 A11 C10 B10 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 61 ...
Page 84
... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 PIN Function No. C8 The system (SS[34:0]) signals are used to interface the SPECTRA-155 to data sinks and A7 sources. The signal descriptions are listed B7 below for the modes selected using the SMODE[2:0] inputs PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 62 ...
Page 85
... NPI. B14 DD[7] is the most significant bit (corresponding A14 to bit 1 of each serial word, the first bit transmitted). DD[0] is the least significant bit (corresponding to bit 8 of each serial word, the last bit transmitted). DD[7:0] is updated on the rising edge of DCK. PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 63 ...
Page 86
... ADD bus and the GENERATED bus interfaces. ACK is nominally a 19.44 MHz or 6.48 MHz, 50% duty cycle clock. Inputs AD[7:0], APL, AC1J1V1, GFP and GMFP are sampled on the rising edge of ACK. Outputs GPL, GC1J1V1, and GD[1:0] are updated on the rising edge of ACK. PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 64 ...
Page 87
... APL is set high during the H3 byte to indicate a negative pointer justification event and set low during the byte following H3 to indicate a positive pointer justification event. APL is sampled on the rising edge of ACK. PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 65 ...
Page 88
... STS-1 #1) is available on the GD[1:0] bus. Note that GFP has a fixed relationship to the SONET/SDH frame; the start of the SPE is determined by the STS (AU) pointer and may change relative to GFP. GFP is sampled on the rising edge of ACK. PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 66 ...
Page 89
... GENERATED bus. Since the GENERATED bus is expected to have fixed timing relationship with the ADD bus, access modules may use GPL to locate payload timeslots in the ADD bus. GPL is updated on the rising edge of ACK. PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 67 ...
Page 90
... GENERATED bus signals. The GENERATED data bus (GD[1:0]) is always included in parity calculations. The internal register bits control the inclusion of the GPL and GC1J1V1 signals in parity calculation and the sense (odd/even) of the parity. GDP is updated on the rising edge of ACK. PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 68 ...
Page 91
... H2, and H3). Path AIS insertion can also be inserted via register access or in response to ISF code in terminating tandem connection termination equipment applications. DTPAIS[3:1] is sampled on the rising edge of DCK for DROP bus or TCLK for transmit stream Path AIS insertion. PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 69 ...
Page 92
... DD[0] is the least significant bit (corresponding to bit each serial word, the fourth or last bit received, respectively). DD[3:0] is updated on the rising edge of DCK. C14 Reserved. D13 B14 A14 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 70 ...
Page 93
... DROP bus signals. The DROP data bus (DD[3:0]) is always included in parity calculations. The internal register bits control the inclusion of the DPL and DC1J1V1 signals in parity calculation and the sense (odd/even) of the parity. DDP is updated on the rising edge of DCK. PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 71 ...
Page 94
... AD[0] is the least significant bit (corresponding to bit each serial word, the fourth or last bit transmitted, respectively). AD[3:0] is sampled on the rising edge of ACK. B11 Reserved. Should be tied low when operating in Telecombus nibble mode. A11 C10 B10 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 72 ...
Page 95
... ADD bus. Valid H1 and H2 pointer bytes must be provided on the ADD data bus (AD[3:0]) to allow the J1 position to be identified. Optionally, the H4 byte could be provided on the ADD data bus to allow the V1 position to be identified. AC1J1V1 is sampled on the rising edge of ACK. PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 73 ...
Page 96
... V1 bytes. In STS-1 (STM-0/AU3) mode, GMFP is sampled two ACK cycle after the J1 indication on GC1J1V1. In STS-3/3c (STM-1/AU3/AU4) modes, GMFP is sampled six ACK cycles after the J1 indication. GMFP is ignored at other nibble positions. GMFP is sampled on the rising edge of ACK. PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 74 ...
Page 97
... Since the GENERATED bus is expected to have fixed timing relationship with the ADD bus, access modules may use GC1J1V1 to locate the frame, payload and tributary multiframe boundaries on the ADD bus. GC1J1V1 is updated on the rising edge of ACK. PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 75 ...
Page 98
... H2, and H3). Path AIS insertion can also be inserted via register access or in response to ISF code in terminating tandem connection termination equipment applications. DTPAIS[3:1] is sampled on the rising edge of DCK for DROP bus or TCLK for transmit stream Path AIS insertion. PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 76 ...
Page 99
... DROP bus. SDFP[3:1] are sampled on the rising edge of the corresponding SDCK. Outputs SDPL, SDC1J1V1 and SDD are updated on the rising edge of the corresponding SDCK. B16 Reserved. Should be strapped low in this mode of operation. PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 77 ...
Page 100
... H1, H2 pointer bits, are set to zeros. The fixed stuff columns in a tributary mapped SPE (VC) may also be optionally set to zero or NPI. Bits are output on SDD in the order they were received from the line. SDD is updated on the rising edge of SDCK. PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 78 ...
Page 101
... SACK[3] corresponds to the STS-1 (STM-0/AU3 STS-3 A12 (STM-1/AU3) stream. SACK is nominally a 51.84 MHz, 50% duty cycle clock for serial mode operation. Inputs SAD[3:1], SAPL[3:1], and SAC1J1V1[3:1] are sampled on the rising edge of the corresponding SACK[3:1] clock. PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 79 ...
Page 102
... H1 and H2 pointer bytes must be provided on the ADD data bus (SAD) to allow the J1 position to be identified. Optionally, the H4 byte could be provided on the ADD data bus to allow the V1 position to be identified. SAC1J1V1 is sampled on the rising edge of the associated SACK[3:1]. PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 80 ...
Page 103
... H3 bits to indicate a positive pointer justification event. The SPECTRA-155 only samples SAPL at the most significant bit of a byte to determine the validity of the byte. The other samples are ignored. SAPL is sampled on the rising edge of the associated SACK. PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 81 ...
Page 104
... Note that SDFP has a fixed relationship to the SONET/SDH frame; the start of the SPE is determined by the STS (AU) pointer and may change relative to SDFP. SDFP[3:1] are sampled on the rising edge of the associated SDCK[3:1] signals. A7 Reserved PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 82 ...
Page 105
... H2, and H3). Path AIS insertion can also be inserted via register access or in response to ISF code in terminating tandem connection termination equipment applications. DTPAIS[3:1] is sampled on the rising edge of DCK for DROP bus or TCLK for transmit stream Path AIS insertion. PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 83 ...
Page 106
... MHz clock when the RDM_FSEN bit in SPECTRA-155 Data Mode Configuration register is set low. DMROCLK is nominally a 6.048 MHz clock when the RDM_FSEN bit is set high. DMRDAT[7:0] is updated on the falling edge of DMROCLK. B16 Reserved. Must be strapped low when not used. PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 84 ...
Page 107
... D12 B13 C12 The data mode transmit input (DMTICLK) clock provides timing to clock data into the SPECTRA-155 from a up stream data source. DMTICLK must be tied to DMTOCLK directly. Inputs DMTDAT[7:0] are sampled using the rising edge of DMTICLK. PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 85 ...
Page 108
... DMTDAT[0] is the least significant bit (corresponding to bit 8 of B11 each serial word, the last bit transmitted). DMTDAT[7:0] are sampled using the rising A11 edge of DMTICLK. C10 B10 B9 Reserved. Must be strapped low when not used PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 86 ...
Page 109
... MHz clock when the TDM_FSEN bit in SPECTRA-155 Data Mode Configuration register is set low. DMTOCLK is nominally a 6.048 MHz clock when the TDM_FSEN bit is set high. For correct operation, DMTOCLK must be tied to DMTICLK. B7 Reserved Reserved. Must be strapped low when not used PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 87 ...
Page 110
... DMRDAT[0] is the least significant bit (corresponding to bit each serial word, the fourth or last bit received, respectively). DMRDAT[3:0] is updated on the falling edge of DMROCLK. PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 88 ...
Page 111
... DMTDAT[0] is the least significant bit (corresponding to bit each serial word, the fourth or last bit transmitted, respectively). DMTDAT[3:0] are sampled using the rising edge of DMTICLK. PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 89 ...
Page 112
... SONET/SDH SPE byte. DMTMSN must be present for every clock cycle for correct operation. The TCLK output of SPECTRA-155 must be tied to the DMTMSN directly. DMTMSN is sampled using the rising edge of DMTICLK. PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 90 ...
Page 113
... SPECTRA-155 Data Mode Configuration register is set low. DMTOCLK is nominally a 12.096 MHz clock when the TDM_FSEN bit is set high. For correct operation, DMTOCLK must be tied to DMTICLK. B7 Reserved Reserved. Must be strapped low when not used PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 91 ...
Page 114
... When GAPFS bit in the corresponding D3MD Control register is set low, SDMROCLK is nominally a 49.536 MHz clock generated by gapping a 51.84 MHz clock. When GAPFS bit is set high, SDMROCLK is nominally a 48.384 MHz clock. SDMRDAT[3:1] are updated on the falling edge of their associated SDMROCLK[3:1] clocks. PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 92 ...
Page 115
... SDMTICLK[3] corresponds to the STS-1 (STM-0/AU3) #3 stream of an STS-3 (STM-1/AU3). SDMTICLK[3:1] must be tied to the associated SDMTOCLK[3:1]. Inputs SDMTDAT[3:1] are sampled using the rising edge of the corresponding SDMTICLK[3:1] clock. D11 Reserved. Should be strapped low in this mode of operation. C11 B11 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 93 ...
Page 116
... In addition, the SPE fixed stuff columns are optionally included using the GAPFS bit in the D3MA Control register. SDMTDAT[3:1] are sampled using the rising edge of the associated SDMTICLK[3:1] clock. B9 Reserved. Should be strapped low in this mode of operation PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 94 ...
Page 117
... MHz clock generated by gapping a 51.84 MHz clock. When GAPFS bit is set high, SDMTOCLK is nominally a 48.384 MHz clock. For proper operation, SDMTOCLK[3:1] signals must be tied to the associated SDMTICLK[3:1]. D8 Reserved Reserved. Should be strapped low in this mode of operation PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 95 ...
Page 118
... DS3ROCLK is nominally 44.736 MHz and is generated by gapping DS3RICLK when the DS3_SEL52 bit in the SPECTRA-155 Data Mode Configuration register is set low. DS3ROCLK is generated by gapping an internal 51.84 MHz recovered line clock when the DS3_SEL52 bit is set high. DS3RDAT is updated on the falling edge of DS3ROCLK. PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 96 ...
Page 119
... DS3RAIS is high, DS3 AIS is inserted on the C11 corresponding DS3RDAT output. DS3RAIS[1] corresponds to the STS-1 (STM-0/AU3) #1 stream of an STS-3 (STM-1/AU3) while B11 DS3RAIS[3] corresponds to the STS-1 (STM-0/AU3) #3 stream of an STS-3 (STM-1/AU3). DS3RAIS is sampled using the rising edge of DS3ROCLK. PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 97 ...
Page 120
... DS3 AIS is inserted on the B6 corresponding DS3TDAT input. DS3TAIS[1] corresponds to the STS-1 (STM-0/AU3) #1 stream of an STS-3 (STM-1/AU3) while C6 DS3TAIS[3] corresponds to the STS-1 (STM-0/AU3) #3 stream of an STS-3 (STM-1/AU3). DS3TAIS is sampled using the rising edge of DS3TICLK. PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 98 ...
Page 121
... WRB/RWB signal functions as RWB. When MBEB is high, the SPECTRA-155 is configured for Intel bus mode where the RDB/E signal functions as RDB. The MBEB input has an integral pull up resistor. F2 The active low chip select (CSB) signal is asserted during all register accesses. PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 99 ...
Page 122
... E edge while CSB and RWB are low. E19 The active low reset (RSTB) signal is low to provide an asynchronous reset to the SPECTRA-155. RSTB is a Schmitt triggered input with an integral pull-up resistor. The minimum reset assertion time is typically less than 100 nS. PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 100 ...
Page 123
... When the SPECTRA-155 is configured for JTAG operation, the test data input (TDI) signal carries test data into the SPECTRA-155 via the IEEE P1149.1 test access port. TDI is sampled on the rising edge of TCK. TDI has an integral pull up resistor. PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 101 ...
Page 124
... The active low test reset (TRSTB) signal provides an asynchronous SPECTRA-155 test access port reset via the IEEE P1149.1 test access port. TRSTB is a Schmitt triggered input with an integral pull up resistor. In the event that TRSTB is not used, it must be connected to RSTB. PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 102 ...
Page 125
... The power pins should be connected to a well B3, decoupled + common with the analog power pins. B18, B19, C2, C3, C18, C19, D4, D7, D10, D14, D17, G4, G17, K17, L4, P4, P17, U4, U7, U17, V2, V3, V18, V19, W2, W3, W18, W19 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 103 ...
Page 126
... Transmit analog +5V power. This pin powers the CSU and the PECL bandgap. W8 Transmit analog ground. V8 Transmit analog +5V power. This pin powers the CSU. Y7 Transmit analog ground. U10 Transmit analog +5V power. This pin powers the TRCLK+/- PECL cell. V9 Transmit analog ground. PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 104 ...
Page 127
... The power pins for the analog core. QAVD2 should be connected to analog +5V. W10 The ground pins for the analog core. QAVS2 should be connected to analog GND. V10 The power pins for the analog core. QAVD2 should be connected to analog +5V. PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 105 ...
Page 128
... Inputs TRIS_OHB, SCPI[1:0], ALE, MBEB, RSTB, TMS, TDI and TRSTB have internal pull-up resistors. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 PIN Function No. V6, Reserved. Must not be connected. V5, C17, W7, V7, U14, U11, Y12, Y11, Y8, Y13 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 106 ...
Page 129
... Refer to the Power Sequencing description in the Operations section. 13. Reserved Input pins must be strapped low. Failure to connect these pins may cause malfunction or damage to the SPECTRA-155. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 107 ...
Page 130
... In serial datacom mode, SDMTICLK must be shorted to SDMTOCLK. The external capacitance must not exceed 30pF. 17. In nibble datacom mode, TCLK must be shorted to DMTMSN. The external capacitance must not exceed 30pF. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 108 ...
Page 131
... The total loop dynamics of the clock recovery PLL yield a jitter tolerance which exceeds the minimum tolerance proposed for SONET equipment by GR-253-CORE as shown below. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 109 ...
Page 132
... The Serial to Parallel Converter (SIPO) converts the received bit serial SONET/SDH stream to a byte serial stream. The SIPO searches for the PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 100 1000 10000 Frequency (Hz) Template PM5342 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 100000 1000000 10000000 110 ...
Page 133
... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 111 ...
Page 134
... When programmed for 64 byte PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER -3 BER, the first algorithm ...
Page 135
... B2 bytes. Line BIP-8 errors are accumulated in an internal counter. Registers are provided that allow accumulated line BIP-8 errors to be read out at intervals one second duration. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 113 ...
Page 136
... These ports are useful in ring-based add drop multiplexer applications where alarm status and maintenance signal insertion control must be passed between separate PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 114 ...
Page 137
... The Receive Path Overhead Processor (RPOP) provides pointer interpretation, extraction of path overhead, extraction of the synchronous payload envelope (virtual container), and path level alarm and performance monitoring. In tandem PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 115 ...
Page 138
... LOP_state. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 116 ...
Page 139
... AIS_ind, and not inc_ind and not dec_ind) PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE eq_new_point NDF_enable NORM eq_new_point AIS_ind 3 x AIS_ind 8 x inv_point PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 3 x eq_new_point NDF_enable AIS 117 ...
Page 140
... I and D bits positive or negative justification indication, after making the requested justification, the received pointer continues to be interpretable as a pointer justification. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 118 ...
Page 141
... Transmit Path Overhead Processor in the local SPECTRA-155 to insert a path RDI indication. Alternatively, if in-band error reporting is enabled, the path RDI bit in PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 119 ...
Page 142
... NDF_enable indications. Illegal pointer changes may be optionally disabled via register bits. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 120 ...
Page 143
... The Enhanced RDI alarm is removed when the enhanced RDI code in PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 121 ...
Page 144
... It contains two pages of trace message memory. One is designated the capture page and the other the expected page. Path trace identifier data PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 122 ...
Page 145
... The accepted PSL is compared with the provisioned value. The PSL match/mismatch state is determined as follows: Table 16 - Path Signal Label match/mismatch state table. Expected PSL 00 00 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 Accepted PSL 00 01 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER PSLM State Match Mismatch 123 ...
Page 146
... RTAL block may indicate network synchronization failure. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 Accepted PSL X ≠ ≠ PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER PSLM State Mismatch Mismatch Match Match Mismatch Match Match Mismatch 124 ...
Page 147
... The algorithm can be modeled by a finite state machine. Within the pointer generator algorithm, five states are defined as shown below: NORM_state (NORM) AIS_state (AIS) PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 125 ...
Page 148
... Receive Path Overhead Processor block. The transitions from INC, DEC, and NDF states to the NORM state occur autonomously with the generation of special pointer patterns. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 126 ...
Page 149
... ES filling is above the upper threshold + previous inc_ind, dec_ind or NDF_enable more than three frames ago. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 PI_AIS dec_ind ES_lowerT NORM PI_LOP FO_discont PI_AIS PI_NORM PI_AIS PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER DEC ES_upperT NDF_enable NDF 127 ...
Page 150
... AIS is only inserted after detecting ISF in three consecutive frames. Similarly, path AIS is removed after three consecutive frames where ISF is not present. When filtering is disabled, path AIS is PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 128 ...
Page 151
... CCRRRRRR CCRRRRRR CCRRRRRR CCRRRRRR CCRRRRRR PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER CCRROORS CCRROORS CCRROORS ...
Page 152
... (0) F ( (0) F ( (0) F ( (0) F ( PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER F (0) C ( (0) C ( (0) C ( (0) C ( ...
Page 153
... The faster pattern is used to drain the elastic store to avoid overflows. The slower pattern is used to allow the elastic store to fill to avoid underflows. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 131 ...
Page 154
... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 Run Faster 621 621 622 621 621 622 621 621 622 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER Run Slower 621 621 621 621 622 622 621 621 622 621 ...
Page 155
... Please refer to the D3MD functional description section for a description of the DS3 AIS frame. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 Run Faster PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER Run Slower ...
Page 156
... The Elastic Store block performs rate adaptation between the ADD bus and the transmit stream. The entire ADD bus payload, including path overhead bytes, is PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 134 ...
Page 157
... SPECTRA-155 toggles in and out of the ISF state. However, in real systems, this behaviour should not be observed because the PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 135 ...
Page 158
... Path BIP-8 errors are accumulated between transmit G1 bytes, the accumulation counter is decremented by eight, and the remaining path REIs are transmitted at the next opportunity. Alternatively, path REI can be PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 136 ...
Page 159
... TPOH causes the corresponding bit in the byte to be inverted. A low level on TPOH causes the corresponding bit in the byte to be processed normally without corruption. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 137 ...
Page 160
... Discontinuous pointer offset events can still occur in any frame. Positive and negative pointer justifications are provided primarily for diagnostic purposes. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 138 ...
Page 161
... TLOP and is inserted into the line overhead. Errors may be inserted in the B2 code for diagnostic purposes. A byte serial stream, along with a frame position indicator is passed to the Transmit Section Overhead Processor. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 139 ...
Page 162
... The Transmit Line Interface block performs clock synthesis and performs parallel to serial conversion. The clock synthesis unit can be bypassed using primary inputs to allow operation with an external line rate clock source. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 140 ...
Page 163
... DROP bus configured for byte Telecombus or nibble Telecombus operation. In addition the three streams can be independently provided to the DROP bus configured for serial Telecombus operation. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 141 ...
Page 164
... A byte or a nibble stream is provided directly to the corresponding TTAL. A serial stream is deserialize and provided to the corresponding TTAL. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 142 ...
Page 165
... J1 and V1 positions DPL DC1J1V1 DPL marks payload DC1J1V1 marks C1, bytes J1 and V1 positions DPL marks payload DC1J1V1 marks C1 bytes and J1 positions only PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER Comments TPIP block is bypassed. TPIP block interprets pointers for J1/V1 TPIP block interprets pointers for J1/V1 TPIP block interprets pointers for J1/V1 ...
Page 166
... For applications which drive a T3 line interface, the desynchronised DS-3 streams must be de-jittered externally before it can be connected to the line interface. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE descrambler scrambler. PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 144 ...
Page 167
... SPECTRA-155 while the test mode registers are used to enhance the testability of the SPECTRA-155. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE test sequence (ITU O.151 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 145 ...
Page 168
... RLOP Line REI Error Count #2 RLOP Line REI Error Count #3 RSOP Control RSOP Interrupt Status RSOP B1 Error Count #1 RSOP B1 Error Count #2 SPECTRA-155 Output Port SPECTRA-155 Input Port Interrupt Enable SPECTRA-155 Reserved SPECTRA-155 Ring Control TSOP Control TSOP Diagnostic PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 146 ...
Page 169
... RASE SF Clearing Threshold RASE SF Clearing Threshold RASE SD Accumulation Period RASE SD Accumulation Period RASE SD Accumulation Period RASE SD Saturation Threshold RASE SD Saturation Threshold RASE SD Declaring Threshold RASE SD Declaring Threshold RASE SD Clearing Threshold RASE SD Clearing Threshold RASE Receive K1 RASE Receive K2 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 147 ...
Page 170
... SPECTRA-155 Section Alarm Output Control SPECTRA-155 Path RALM[1] Output Control SPECTRA-155 Path RALM[2] Output Control SPECTRA-155 Path RALM[3] Output Control SPECTRA-155 Data Mode Configuration SPECTRA-155 Path and DS3 Receive AIS Control #1 SPECTRA-155 Path and DS3 Receive AIS Control #2 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 148 ...
Page 171
... TPIP #1 Pointer Interrupt Enable TPIP #1 Pointer LSB TPIP #1 Pointer MSB TPIP #1 Reserved TPIP #1 Path BIP-8 Count LSB TPIP #1 Path BIP-8 Count MSB TPIP #1 Reserved TPIP #1 Reserved TPIP #1 Tributary Multiframe Status and Control TPIP #1 BIP Control PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 149 ...
Page 172
... Enhanced RDI Control #1 SPECTRA-155 Receive Path AIS Control #2 SPECTRA-155 Receive Path AIS Control #3 SPECTRA-155 Path REI/RDI Control #2 SPECTRA-155 Path REI/RDI Control #3 SPECTRA-155 Enhanced Path RDI Control #1 SPECTRA-155 Enhanced Path RDI Control #2 SPECTRA-155 Enhanced Path RDI Control #3 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 150 ...
Page 173
... RPOP #1, Status and Control RPOP #1, Alarm Interrupt Status RPOP #1, Pointer Interrupt Status RPOP #1, Alarm Interrupt Enable RPOP #1, Pointer Interrupt Enable RPOP #1, Pointer LSB RPOP #1, Pointer MSB RPOP #1, Path Signal Label RPOP #1, Path BIP-8 Count LSB PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 151 ...
Page 174
... TPOP #1, Reserved TPOP #1, Current Pointer LSB TPOP #1, Current Pointer MSB TPOP #1, Payload Pointer LSB TPOP #1, Payload Pointer MSB TPOP #1, Path Trace TPOP #1, Path Signal Label TPOP #1, Path Status TPOP #1, Path User Channel TPOP #1, Path Growth #1 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 152 ...
Page 175
... SPTB #1, Indirect Data SPTB #1, Expected Path Signal Label SPTB #1, Path Signal Label Status Reserved RPOP #2 Registers PMON #2 Registers RTAL #2 Registers Reserved TPOP #2 Registers TTAL #2 Registers Reserved SPTB #2 Registers RPOP #3 Registers PMON #3 Registers RTAL #3 Registers Reserved TPOP #3 Registers PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 153 ...
Page 176
... Writing to reserved registers should be avoided. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 Register TTAL #3 Registers Reserved SPTB #3 Registers Reserved Master Test Reserved for Test PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 154 ...
Page 177
... Note, PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 Function Default TMODE[1] 1 TMODE[0] 0 STEN 0 LLE 0 DLE 0 LTE 0 RMODE[1] 1 RMODE[0] 0 MODE STS-1 (STM-0/AU3) Reserved STS-3 (STM-1/AU3) STS-3c (STM-1/AU4) PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 155 ...
Page 178
... The TMODE[1:0] bus selects the transmit line side operating mode of the SPECTRA-155. Table 25 - Transmit SONET/SDH mode setting. TMODE[1: PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 MODE STS-1 (STM-0/AU3) Reserved STS-3 (STM-1/AU3) STS-3c (STM-1/AU4) PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 156 ...
Page 179
... CRSI Clock Recovery Control/Status/Interrupt register is set. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 Function Default RCP 0 Z0INS 0 CSPIE 0 RASEE 0 CRSIE 0 RSOPE 0 SSTBE 0 RLOPE 0 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 157 ...
Page 180
... RCP is a logic one, the ring control ports are enabled, and alarm status and maintenance signal insertion control is provided by the RRCPCLK, RRCPFP, and RRCPDAT outputs and the TRCPCLK, TRCPFP, and TRCPDAT inputs. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 158 ...
Page 181
... RSOP Interrupt Status Register. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 Function Default Unused X Unused X CSPII X RASEI X CRSII X RSOPI X SSTBI X RLOPI X PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 159 ...
Page 182
... Clock Synthesis or the Parallel to Serial Converter block has been activated. This register bit remains high until the interrupt is acknowledged by reading the CSPI Clock Synthesis Control, Status and Interrupt register. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 160 ...
Page 183
... PRSM). In addition, the following top level registers are also reset: 80H-8AH, E0H, E1H, EFH, F0H, 100H-109H. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 Function Default RESET 0 RESET_PATH 0 Unused X ID[4] 0 ID[3] 0 ID[2] 0 ID[1] 1 ID[0] 0 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 161 ...
Page 184
... SPECTRA-155 is reset. When RESET is a logic zero, the reset is removed. The RESET bit must be explicitly set and cleared by writing the corresponding logic value to this register. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 162 ...
Page 185
... Transmit K1 Register and the TLOP Transmit K2 Register. Reserved: The Reserved bits must be set low for proper operation of SPECTRA-155. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 Function Default Reserved 0 Reserved 0 APSREG 0 Reserved 0 Reserved 0 Reserved 0 Reserved 0 LRDI 0 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 163 ...
Page 186
... BIP-8 bytes (B2 bytes). When DB2 is set high, each bit of every B2 byte is inverted. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 Function Default Unused X Unused X Unused X Unused X Unused X Unused X Unused X DB2 0 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 164 ...
Page 187
... Transmit K2 Register are inserted in the SONET/SDH stream starting at the next frame boundary. Successive writes to this register must be spaced at least two frames (250 µs) apart. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 Function Default K1[7] 0 K1[6] 0 K1[5] 0 K1[4] 0 K1[3] 0 K1[2] 0 K1[1] 0 K1[0] 0 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 165 ...
Page 188
... K2 APS code value to this register before writing the TLOP Transmit K1 Register. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 Function Default K2[7] 0 K2[6] 0 K2[5] 0 K2[4] 0 K2[3] 0 K2[2] 0 K2[1] 0 K2[0] 0 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 166 ...
Page 189
... N=1,3). The REI counter is not incremented for invalid REI codewords. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 Function Default BLKBIP 0 ALLONES 0 LAISDET 0 LRDIDET 0 BLKBIPO 0 BLKREI 0 LAISV X LRDIV X PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 167 ...
Page 190
... SONET/SDH frame is forced to logic one immediately when the line AIS alarm is declared. When line AIS is removed, the SONET/SDH frame is immediately returned to carrying the receive stream. When ALLONES is set PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 168 ...
Page 191
... B2 error event counter is incremented for each B2 bit error that occurs during that frame (the counter can be incremented up to 8xN times per frame, for N=1 or 3). PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 169 ...
Page 192
... The LAIS interrupt enable is an interrupt mask for line AIS. When LAISE is a logic one, a line interrupt is generated when line AIS is declared or removed. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 Function Default LREIE 0 BIPEE 0 LAISE 0 LRDIE 0 LREII X BIPEI X LAISI X LRDII X PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 170 ...
Page 193
... The line remote error indication interrupt enable is an interrupt mask for line REI events. When LREIE is a logic one, a line interrupt is generated when a line REI indication is detected. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 171 ...
Page 194
... RLOP B2 Error Count Registers may be read. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 Function Default BE[7] X BE[6] X BE[5] X BE[4] X BE[3] X BE[2] X BE[1] X BE[0] X Function Default BE[15] X BE[14] X BE[13] X BE[12] X BE[11] X BE[10] X BE[9] X BE[8] X Function Default Unused X Unused X Unused X Unused X BE[19] X BE[18] X BE[17] X BE[16] X PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 172 ...
Page 195
... REI Error Count Registers may be read. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 Function Default FE[7] X FE[6] X FE[5] X FE[4] X FE[3] X FE[2] X FE[1] X FE[0] X Function Default FE[15] X FE[14] X FE[13] X FE[12] X FE[11] X FE[10] X FE[9] X FE[8] X Function Default Unused X Unused X Unused X Unused X FE[19] X FE[18] X FE[17] X FE[16] X PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 173 ...
Page 196
... A1 framing byte and the first 4 bits of the last A2 framing byte (12 bits total) are examined. This algorithm examines only 12 bits of the PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 Function Default BLKBIP 0 DDS 0 FOOF X ALGO2 0 BIPEE 0 LOSE 0 LOFE 0 OOFE 0 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 174 ...
Page 197
... BIP-8 byte result in a single error accumulated in the B1 error counter. When a logic zero is written to the BLKBIP bit position, all errors in the B1 byte are accumulated in the B1 error counter. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 175 ...
Page 198
... The OOFI bit is set high when out of frame is declared or removed. This bit is cleared when the RSOP Interrupt Status Register is read. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 Function Default Unused X BIPEI X LOSI X LOFI X OOFI X LOSV X LOFV X OOFV X PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 176 ...
Page 199
... RSOP Interrupt Status Register is read. BIPEI: The BIPEI bit is set high when a section BIP error is detected. This bit is cleared when the RSOP Interrupt Status Register is read. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 177 ...
Page 200
... After the 7µs period has elapsed, the RSOP B1 Error Count Registers may be read. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 5 Function Default BE[7] X BE[6] X BE[5] X BE[4] X BE[3] X BE[2] X BE[1] X BE[0] X Function Default BE[15] X BE[14] X BE[13] X BE[12] X BE[11] X BE[10] X BE[9] X BE[8] X PM5342 SPECTRA-155 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER 178 ...