AT24C164 ATMEL Corporation, AT24C164 Datasheet
AT24C164
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AT24C164 Summary of contents
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... The device is optimized for use in many industrial and commercial applications where low power and low voltage operation are essential. The AT24C164 is available in space saving 8-lead PDIP and 8-lead JEDEC SOIC packages and is accessed via a two- wire serial interface ...
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... Voltage on Any Pin with Respect to Ground .................................... –1.0V to +7.0V Maximum Operating Voltage .......................................... 6.25V DC Output Current........................................................ 5.0 mA Figure 1. Block Diagram WP AT24C164 2 *NOTICE: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent dam- age to the device. This is a stress rating only and functional operation of the device at these or any ...
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... WRITE PROTECT (WP): The write protect input, when tied low to GND, allows normal write operations. When WP is tied to V The AT24C164 is internally organized with 256 pages of 8 bytes each. Random word addressing requires an 11 bit data word address ...
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... Output Low Level V = 3.0V OL2 CC V Output Low Level V = 1.8V OL1 CC Note min and V max are reference only and are not tested AT24C164 4 = 25° 1.0 MHz SCL 40°C to +85°C, V – AI Test Condition READ at 100 kHz WRITE at 100 kHz ...
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Table 4. AC Characteristics Applicable over recommended operating range from T 100 pF (unless otherwise noted). Symbol Parameter f Clock Frequency, SCL SCL t Clock Pulse Width Low LOW t Clock Pulse Width High HIGH t Noise Suppression Time I ...
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... EEPROM in 8-bit words. The EEPROM sends a zero to acknowledge that it has received each word. This happens during the ninth clock cycle. STANDBY MODE: The AT24C164 features a low power standby mode which is enabled: a) upon power-up and b) after the receipt of the STOP bit and the completion of any internal operations ...
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Figure 2. Bus Timing SCL: Serial Clock, SDA: Serial Data I/O Figure 3. Write Cycle Timing SCL: Serial Clock, SDA: Serial Data I/O SCL SDA 8th BIT WORDn Note: 1. The write cycle time t is the time from a ...
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... Figure 5. Start and Stop Definition Figure 6. Output Acknowledge AT24C164 8 0105J–SEEPR–12/06 ...
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... All inputs are disabled during this write cycle and the EEPROM will not respond until the write is complete (see Figure 8 on page 11). PAGE WRITE: The AT24C164 is capable of a 16-byte page write. A page write is initi- ated the same as a byte write, but the microcontroller does not send a stop condition after the first data word is clocked in ...
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... Read Operations AT24C164 10 Read operations are initiated the same way as write operations with the exception that the read/write select bit in the device address word is set to one. There are three read operations: current address read, random address read and sequential read. CURRENT ADDRESS READ: The internal data word address counter maintains the last address accessed during the last read or write operation, incremented by one ...
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Figure 8. Byte Write Figure 9. Page Write Figure 10. Current Address Read Figure 11. Random Read 0105J–SEEPR–12/06 11 ...
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... Figure 12. Sequential Read AT24C164 12 0105J–SEEPR–12/06 ...
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... AT24C164-10PU-1.8 (2) AT24C164-10SU-2.7 (2) AT24C164-10SU-1.8 (3) AT24C164-W2.7-11 (3) AT24C164-W1.8-11 Notes: 1. Not recommended for new design; Please refer to AT24C16B datasheet. For 2.7V devices used in the 4.5V to 5.5V range, please refer to performance values in the AC and DC characteristics tables. 2. “U” designates Green package + RoHS compliant. 3. Available in waffle pack and wafer form. Bumped die available upon request. Please contact Serial EEPROM Marketing. ...
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... E and eA measured with the leads constrained to be perpendicular to datum. 5. Pointed or rounded lead tips are preferred to ease insertion and b3 maximum dimensions do not include Dambar protrusions. Dambar protrusions shall not exceed 0.010 (0.25 mm). 2325 Orchard Parkway San Jose, CA 95131 R AT24C164 ...
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JEDEC SOIC e Side View Note: These drawings are for general information only. Refer to JEDEC Drawing MS-012, Variation AA for proper dimensions, tolerances, datums, etc. 1150 E. Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 R 0105J–SEEPR–12/06 1 ...
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... Comments 0105J Added note to 1st page; ‘Not recommended for new design; please refer to AT24C16B datasheet. For cascadability features of the AT24C164 (A0-A2), please move to the AT24C32C device which allows up to eight devices that may be addressed on a single bus system.’ 0105J–SEEPR–12/06 ...
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... Atmel does not make any commitment to update the information contained herein. Atmel’s products are not intended, authorized, or warranted for use as components in applications intended to support or sustain life. © 2006 Atmel Corporation. All rights reserved. Atmel marks or trademarks of Atmel Corporation or its subsidiaries. Other terms and product names may be trademarks of others. Atmel Operations Memory ...