CS4239-KQ Cirrus Logic, Inc., CS4239-KQ Datasheet

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CS4239-KQ

Manufacturer Part Number
CS4239-KQ
Description
Manufacturer
Cirrus Logic, Inc.
Datasheet

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DACK<A:C>
DRQ<A:C>
IRQ<A:G>
IOCHRDY
SA<12:15)
SA<11:0>
(CDROM)
SD<7:0>
FEATURES
IOW
AEN
DEC ‘97
IOR
Compatible with Sound Blaster™, Sound Blaster
Pro™, and Windows Sound System™
Integrated CrystalClear™ 3D Stereo
Enhancement
Enhanced Stereo Full Duplex Operation
Dual Type-F DMA Support
Industry Leading Delta-Sigma Data Converters
(86 dB FS A)
Default Internal PnP Resources
3.3 V or 5 V ISA Bus Operation
APM and ACPI Compliant Power Management
Asynchronous Digital Serial Interface (ZVPORT)
CS4610 Audio Accelerator Interface
CS9236 Wavetable Interface
CS4236B/CS4237B/CS4238B Register
Compatible
XTALI
OSCILLATOR
Upper Address Bits
INTERFACE
CODEC
Decode
PLUG
PLAY
CD-ROM or
BUS
AND
Logic
REG
ISA
XTALO
I/F
Config
DMA
IRQ
IO
BRESET
VREF
VREF
FIFO
FIFO
JOYSTICK
JOYSTICK
ANALOG
LOGIC
Synthesizer
FM
SERIAL PORT
CS4610/
CS9236
SERIAL
PORT
Copyright
(All Rights Reserved)
Stereo
DAC1
INTERFACE
Stereo
ADC1
ZVPORT
ZVPORT
Stereo
DAC2
Cirrus Logic, Inc. 1997
DESCRIPTION
The CS4239 is a single chip multimedia audio system
that is a pin-compatible upgrade to the CS423xB for
many designs. The product includes an integrated FM
synthesizer and a Plug-and-Play interface. In addition,
the CS4239 includes hardware master volume control
pins as well as extensive power management and 3D
sound technology. The CS4239 adds a Zoom-Video
asynchronous digital serial interface to the industry
standard CS423xB. The CS4239 is compatible with the
Microsoft
run software written to the Sound Blaster and Sound
Blaster Pro interfaces. The CS4239 is fully compliant
with Microsoft’s PC ’97 and PC ’98 audio requirements.
ORDERING INFO
CS4239-JQ
CS4239-KQ 100 pin TQFP, 14x14x1.4mm
Portable ISA Audio System
INPUT MIXER
MPU-401
®
FIFOS
UART
MIDI
with
Windows Sound System standard and will
OUTPUT MIXER
CrystalClear™
Advanced Product Databook
100 pin TQFP, 14x14x1.4mm
Registers
SBPRO
WSS
Enhancement
SCL
EEPROM
Interface
3D
SDA
CS4239
Volume Control
Hardware
ATTN
GAIN
GAIN
ATTN
GAIN
DS253PP2
L/RAUX1
L/RAUX2
CMAUX2
MIN
L/ROUT
UP
DOWN
MUTE
MIC

Related parts for CS4239-KQ

CS4239-KQ Summary of contents

Page 1

... CS423xB. The CS4239 is compatible with the Microsoft run software written to the Sound Blaster and Sound Blaster Pro interfaces. The CS4239 is fully compliant with Microsoft’s PC ’97 and PC ’98 audio requirements. ORDERING INFO CS4239-JQ CS4239-KQ 100 pin TQFP, 14x14x1.4mm Stereo ADC1 Stereo DAC1 FM Synthesizer ...

Page 2

... CS4239 PERFORMANCE SPECIFICATIONS ... 3 GENERAL DESCRIPTION ................................. 13 ISA Bus Interface............................................. 14 PLUG AND PLAY ............................................... 16 PnP Data ......................................................... 17 Loading Resource Data................................... 17 Loading Firmware Patch Data......................... 19 The Crystal Key ............................................... 19 Bypassing Plug and Play................................. 20 Crystal Key 2 ................................................... 21 Hardware Configuration Data .......................... 21 Hostload Procedure ......................................... 25 2 External E PROM............................................ 26 WINDOWS SOUND SYSTEM CODEC .............. 27 Enhanced Functions (MODEs) ...

Page 3

... AUX1, AUX2 DR - -80 (Note 2) MIC - -75 - -66 (Note 2) MIC THD+N - -66 Left to Right - -80 - -80 - -80 AUX1, AUX2 - MIC - 0 dB Gain - 0.25 0.28 2.5 2.8 2.5 2.8 - 100 MIC (Note CrystalClear Portable ISA Audio System CS4239-KQ Max Min Typ Max - - 0.5 0 19000 - -80 - -72 - -75 - -72 - -70 - ...

Page 4

... Typ (Note (Note -86 THD+N - -80 (Notes 1,3) - -90 - 0.1 2.0 2.2 - 100 (Notes 1,4) 90 94.5 1.3 1.5 1.0 1 (Note 3) 2.5 2.8 (Note 1) - 100 (Note (Note (Note 100 - - 40 - CS4239 TM CS4239-KQ Max Min Typ Max Units - 0.5 0 19000 - -80 - -75 - -80 - 0.5 0.1 0.5 2.5 2.0 2.2 2.5 400 - 100 400 - 90 94.5 - 1.7 1.3 1.5 1.7 2.0 1.0 1 3.3 2.5 2.8 3 ...

Page 5

... Volts. DS253PP2 CS4239-JQ Symbol Min Typ Max AUX1, AUX2 - MIC - Hardware Master - DAC1, DAC2 - MIC, AUX1, AUX2 - Hardware Master - - DAC1, DAC2 FR - (Notes 1,3) (Notes 1, (Notes 1,3) THD+N - Symbol (Note 5) VDF1-VDF3 TM CrystalClear Portable ISA Audio System CS4239-KQ Min Typ Max - - 94 1.3 1.5 1 1.6 2 ...

Page 6

... Inputs) (High-Z Digital Outputs) TM CrystalClear Portable ISA Audio System Min Max -0.3 6.0 -0.3 6.0 VA -0.3 6.0 1 -10.0 +10.0 -50 +50 -0.3 VA+0.3 -0.3 VD1+0.3 -0.3 VDF+0.3 -55 +125 -65 +150 Min Max 2.0 IH VDF-1.0 0.8 IL 2.4 VD1 VDF 2.4 VDF 0.4 0.4 0.4 -10 10 -10 10 CS4239 Units °C °C Units DS253PP2 ...

Page 7

... CrystalClear Portable ISA Audio System (Note 1) Min Typ Max 0 0.40xFs -1.0 +0.5 0.1 0.40xFs 0.60xFs 0.60xFs 74 10/Fs 0.0 0.1/Fs Min Max 0 3.5 AA 4.0 4.7 4.0 4.7 0 250 300 F 4 slrd 32 slrs 22 sclkl sdh CS4239 Units Units ...

Page 8

... SCL t SU:STA SDA (IN) SDA (OUT) ZLRCK ZSCLK ZSDATA 8 t HSCL t LSCL HD:STA t HD:DAT PROM 2-Wire Interface Timing t slrs t slrd t sdlrs ZV-Port Input Timing TM CrystalClear Portable ISA Audio System t SU:DAT sclkh t sclkl t sdh CS4239 SU:STO DS253PP2 ...

Page 9

... H1 TM CrystalClear Portable ISA Audio System Min Max - 190 16.92 16. 3.918 CS4239 Units MHz ns ns kHz ...

Page 10

... CS4610 DSP Serial Port Timing t t DKSUa DRHD t STW t RDDV 8-Bit Mono DMA Read/Capture Cycle t RESDRV t t INIT EEPROM EEPROM read Reset Timing TM CrystalClear Portable ISA Audio System t h1 MSB, Left MSB, Left t DKHDb t DHD1 Codec responds to ISA activity CS4239 DS253PP2 ...

Page 11

... DRHD t STW 8-Bit Mono DMA Write/Playback Cycle t BWDN LEFT/LOW BYTE 8-Bit Stereo or 16-Bit Mono DMA Cycle t BWDN LEFT/LOW LEFT/HIGH BYTE BYTE 16-Bit Stereo DMA Cycle TM CrystalClear Portable ISA Audio System t DKHDa t t DHD2 WDSU RIGHT/HIGH BYTE RIGHT/LOW RIGHT/HIGH BYTE BYTE CS4239 11 ...

Page 12

... DRQ<> t SUDK1 DACK<> IOR SD<> SA<> AEN DRQ<> t SUDK1 DACK<> IOW SD<> SA<> AEN 12 CrystalClear Portable ISA Audio System t SUDK2 t t RDDV t ADSU I/O Read Cycle t SUDK2 t STW t t WDSU t ADSU I/O Write Cycle CS4239 TM DHD1 t ADHD DHD2 t ADHD DS253PP2 ...

Page 13

... Pro- grammed I/O (PIO) access, and DMA access. A number of configuration registers must be pro- grammed prior to any accesses by the host computer. The configuration registers are pro- grammed via a Plug-and-Play configuration sequence or via configuration software provided by Cirrus Logic. CS4239 13 ...

Page 14

... Down section). If the CDROM is needed, the circuit shown in Figure 2 can replace the SA12 through SA15 pins and provide the same func- tionality. Four cascaded OR gates, using a 74ALS32, can replace the ALS138 in Figure 2, but causes a greater delay in address decoding. CS4239 TM Logical Device 4 CDROM: I/O: CDbase ...

Page 15

... WSS Codec and the Sound Blaster Pro compatible de- vices, and the other for the MPU401 device. Interrupts are also supported for the FM Synthe- sizer, Control, and CDROM devices, but are typically not used. TM CrystalClear Portable ISA Audio System CS4239 15 ...

Page 16

... The configuration sequence is as follows: 1. Host sends a software key which places all PnP cards in the sleep state (or Plug-and- Play mode). 2. The CS4239 is isolated from the system using an isolation sequence unique identifier (handle) is assigned to the part and the resource data is read. ...

Page 17

... The first nine bytes of the PnP resource data are the Plug-and-Play ID, which uniquely identifies the CS4239 from other PnP devices. The PnP ID is broken down as follows: 0Eh, 63h - Crystal ID - ’CSC’ in compressed ASCII. (See the PnP Spec for more information) 42h - Oem ID ...

Page 18

... EISA ID = CSC0001 200h 208h 8/8 8/8 EISA ID = CSC0010 120-FF8h 8/8 ---- EISA ID = CSC0003 330h 330-360h 2/8 2/8 9 9,11,12,15 CS4239 TM 2 PROM interface. If the first 2 PROM port read 55h and 2 PROM data is 2 PROM is assumed not 2 PROM is required to ensure Sub optimal Sub optimal Choice 1 Choice 2 ANSI ID = WSS/SB 534-FFCh 4/4 ...

Page 19

... The Crystal Key NOTE: The Crystal Key cannot differentiate be- tween multiple Cirrus ISA Audio Codecs in a system; therefore, ONLY ONE CS4239 is al- lowed in systems using the Crystal Key. To allow multiple parts in a system, the Plug-and- Play isolation sequence must be used since it supports multiple parts via the serial identifier used in the isolation sequence ...

Page 20

... SYNbase = 0x388 042h, 002h, 020h ; SBbase = 0x220 022h, 005h 02Ah, 001h 025h, 003h 033h, 001h 015h, 001h 047h, 002h, 000h ; GAMEbase = 0x200 033h, 001h CS4239 TM ; CSN=1 ; LOGICAL DEVICE 0 ; WSS & SB IRQ = 5 ; WSS & SB DMA0 = 1 ; WSS capture DMA1 = 3 ; activate logical device 0 ; LOGICAL DEVICE 1 ...

Page 21

... Crystal Key uses custom commands and is write-only; whereas, CK2 places the part in a PnP Configuration state and uses standard PnP commands to access PnP configuration registers. Since CK2 is unique to the CS4239, the PnP iso- lation sequence is bypassed. DS253PP2 TM CrystalClear Portable ISA Audio System CK2 differs from normal PnP in that the RDP is read/write instead of read-only ...

Page 22

... IRQ E/F Selection: Lower nibble = E, Upper nibble = F. DMA A/B Selection: Lower nibble = A, Upper nibble = B. and the 7th IRQ pin - IRQ G 2 PROM and are not used in the Hostload mode. Table 2. Hardware Configuration Data TM CrystalClear Portable ISA Audio System 2 PROM exists. 2 PROM 2 PROM CS4239 DS253PP2 ...

Page 23

... CB5 CB4 CB3 CB2 Code Base Byte. Determines the code 2 base located in the E PROM. If not correct, the Firmware code after the PnP resource data is not loaded. 2 0x05 - CS4239 E PROM Load 0x06 - CS4239 Host Load CS4239 D1 D0 res res D1 D0 CB1 CB0 23 ...

Page 24

... Sound Enable. When set, 3D sound is enabled on L/ROUT. AUX1 Remap. When set, writes to I18/19 (DAC2 volume) also control the AUX1 volume. When clear, I18/19 control DAC2 volume and I2/3 control AUX1 volume. This bit provides some backwards compatibil- CS4239 D1 D0 EC1 EC0 D1 D0 ZVEN ...

Page 25

... First, send the 32-byte Crystal key to I/O address port (AP). Second, configure logical device 2 base address, CTRLbase, by writing to AP (15h, 02h, 47h, xxh, xxh, 33h, 01h, 79h). Note: The two xxh represent the base_ad- dress_high and base_address_low respectively. The default is: 01h, 20h. CS4239 2 PROM 25 ...

Page 26

... Serial Identifier as being a user de- 2 fined serial number. The E change the user section of the identifier, store default resource data for PnP, Hardware Con- figuration data specific to the CS4239, and firmware patches to upgrade the core processor functionality. 2 The E PROM interface uses an industry standard 2-wire interface consisting of a bi-directional data line and a clock line driven from the part ...

Page 27

... WSS Codec and Sound Blaster device are mutually exclusive, the two devices share the same interrupt and DMA playback channel. Bank Part Read Start Address Address Acknowledge Figure 3. EEPROM Format CS4239 TM 2 PROM resource data format. 2 PROM data in successive bits to 2 PROM data sheet for- No Acknowledge Acknowledge ...

Page 28

... WSS Codec to drive data on the ISA data bus lines. Write cycles require the host to assert data on the ISA data bus lines and strobe the IOW signal. The WSS Codec will latch data into the PIO register on the rising edge of the IOW strobe. CS4239 DS253PP2 ...

Page 29

... The playback of audio data will occur on the playback channel exactly as dual channel opera- tion; however, the capture audio channel is now diverted to the playback channel. Alternatively stated, the capture DMA request occurs on DMA channel select 0 for the WSS Codec. (In MODEs 2 and 3, the capture data format is al- CS4239 TM 29 ...

Page 30

... Alternate Feature Status I25 Compatibility ID I26 Mono Input Control I27 Left Master Output Volume I28 Capture Data Format I29 Right Master Output Volume I30 Capture Upper Base Count I31 Capture Lower Base Count Table 4. WSS Codec Indirect Registers CS4239 Register Name DS253PP2 ...

Page 31

... WSS Codec Initialization: This bit is read as 1 when the Codec state in which it cannot respond to parallel interface cycles. This bit is read-only ID5 ID4 ID3 ID2 Indexed Data register: These bits are the indirect register referenced by the Indexed Address register (R0). CS4239 D1 D0 ID1 ID0 31 ...

Page 32

... Capture Left/Right Sample: This bit indicates whether the capture data waiting is for the Left channel or Right channel Right 1 - Left or Mono Capture Upper/Lower Byte: This bit indicates whether the capture data ready is for the upper or lower byte of the channel Lower available 1 - Upper or 8-bit available CS4239 DS253PP2 ...

Page 33

... This bit is identical to the MGE bit in I0. It controls the 20 dB gain boost for the MIC analog input. Right output loopback. Setting these bits to 11 enables the right output loopback into the input mixer. Other bit combinations disable the loop- back. CS4239 D1 D0 rbc rbc D1 D0 rbc ...

Page 34

... XRAE XA4 - MIA3 MIA2 MIA1 LOG3 LOG2 LOG1 - - - ROG3 ROG2 ROG1 CUB3 CUB2 CUB1 CLB3 CLB2 CLB1 CS4239 D0 IA0 ID0 INT CD0/PD0 LX1G0 RX1G0 LX2G0 RX2G0 LD1A0 RD1A0 C2SL PEN - ORL0 0 - PUB0 PLB0 DACZ HPF LD2A0 RD2A0 CR0 ...

Page 35

... X 189 5.600 5.600 16 X 190 5.570 5.570 5.541 16 X 191 5.541 5.512 16 X 192 5.512 5.512 16 X 192 5.483 16 X 192 5.512 5.455 . . . 16 X 192 5.512 4.150 CS4239 MIC 22.5 dB 21.0 dB 19.5 dB 18 4.5 dB 3 -19.5 dB -21.0 dB -22.5 dB muted DAC Divider 353 529 ...

Page 36

... Auxiliary #2 input, RAUX2, to the output mixer is muted significant bit represents -1.5 dB, with 000000 = 0 dB. The total range -94.5 dB. See Table 6. Left DAC1 Output Mute. When set, the left DAC1 to the output mixer is muted. CS4239 DS253PP2 ...

Page 37

... DRQ and respond to DACK signal when this bit is en- abled and PPIO=0. If PPIO=1, PEN enables PIO playback mode. PEN may be set and reset without setting the MCE bit Playback Disabled (playback DRQ and PIO inactive Playback Enabled CS4239 D1 D0 CEN PEN 37 ...

Page 38

... DIV5-DIV0 and CS2 (I22) determine the current sample rate of the WSS Codec when SRE = 1. Note that these bits can be disabled by setting IFSE in X11 kHz < > 24 kHz kHz 11 - reserved CS4239 DTM IEN res 24 kHz DS253PP2 ...

Page 39

... Codec Mode Select bits: Enables the Extended registers and functions of the part MODE Reserved 10 - MODE MODE rbc rbc rbc rbc Reserved, backwards compatible. Reserved. Must write 0. Could read CS4239 res rbc 39 ...

Page 40

... I8 TEST TEST TEST rbc res High Pass Filter: This bit enables a DC-blocking high-pass filter in the digital filter of the ADC. This filter forces the ADC offset disabled 1 - enabled CS4239 D1 D0 rbc HPF DS253PP2 ...

Page 41

... Note that the part uses only one crystal to generate both clock base frequencies. This bit can be disabled by setting IFSE in X11 24.576 MHz base 1 - 16.9344 MHz base CS4239 D1 D0 CR1 CR0 D1 D0 RE1 ...

Page 42

... In this condition, the bit is set and the last valid byte is read by the host. Playback Interrupt: Indicates an interrupt is pending from the play- back DMA count registers. Capture Interrupt: Indicates an interrupt is pending from the capture DMA count registers. CS4239 DS253PP2 ...

Page 43

... This register is fixed to indicate code compatibility with the CS4236. X25 or C1 should be used to further differentiate between parts that are compatible with the CS4236. All Chips: 00011 - CS4236, CS423xB, CS4239 00010 - CS4232/CS4232A 00000 - CS4231/CS4231A V2-V0 Version number. As enhancements are made to the part, the version ...

Page 44

... CLB4 CLB3 CLB2 Lower Base Bits: This register is the lower byte which represents the 8 least significant bits of the 16-bit Capture Base register. Reads from this register returns the same value which was written. CS4239 D1 D0 CUB1 CUB0 D1 D0 CLB1 CLB0 DS253PP2 ...

Page 45

... Space Control X24 (C8) Wavetable & Volume Control X25 Chip Version and ID X26 (Cb+0) Joystick Control 2 X27 (Cb+1) E PROM Interface X28 (Cb+2) Power Down Control 1 X29 (C9) Power Down Control 2 X30 (Cb+7) Global Status X31 Reserved Table 12. WSS Extended Registers CS4239 Register Name XA4 res rbc 45 ...

Page 46

... DSPD1 PSH ZVEN - - - - - - - - - - - - - - - WTEN VCEN DMCLK CID3 CID2 CID1 - - JR1 - DIN/EEN DOUT ADC DAC PROC - MIXCD DAC2 IMPU WDT IMV - - - CS4239 D0 IA0 ID0 - MG0 MG0 - - - - - - - - SRAD0 SRDA0 - - - - DLEN - - - - - BRES CID0 JR0 CLK FM SPORT ZVA - DS253PP2 ...

Page 47

CS9236 or CS4610 SERIAL PORT DSP Port Enable I16 Wavetable Enable C8 DSPD1 Enable X18 Loop Enable X18 Atten. I6L DAC1 I7R Mute X16L Mute X8L X17R X9R Gain I18L DAC2 I19R ZVPort Enable X18 Mute X6L FM Syn. Enable ...

Page 48

... Hardware Configuration data in the EEPROM. Left Input Mixer Summer Attenuator. This attenuates the inputs to the left input mixer to enable overload pro- tection when multiple input sources are utilized - -18 dB CS4239 D1 D0 MG1 MG0 D1 D0 res res DS253PP2 ...

Page 49

... I10 (OSM1,0), and I22 are ignored. X12 and X13 cannot be modified un- less this bit is set to 1. Right DAC1 Input Mixer Mute. When set to 1, the output from the Right DAC1 is muted to the Right in- put mixer. See Figure 4. CS4239 D1 D0 rbc rbc D1 D0 ...

Page 50

... L/ROUT. This bit is also controlled through C3. AUX1 Remap. When set, writes to I18/19 (DAC2 volume) also control the AUX1 volume. When clear, I18/19 control DAC2 volume and I2/3 control AUX1 volume. This bit provides some backwards compatibil- CS4239 D1 D0 rbc rbc D1 D0 DLEN ...

Page 51

... Hardware Configuration data, Misc. Configuration Byte. Wavetable Serial Port Enable. When, set, the CS9236 Single-Chip Wave- table Music Synthesizer serial port pins are enabled. WTEN can be in- 2 itialized in the E PROM Hardware Configuration data, Global Configura- tion byte. CS4239 D0 res res ...

Page 52

... Chip Identification. Distinguishes between this chip and other codec chips that support this register set. This register is identical to C1 and replaces the ID register in I25. 11110 - CS4239 V2-V0 Version Number. As enhancements are made, the version number is changed so software can distinguish between the different versions of the same chip ...

Page 53

... Blaster interrupt pending when set to 1. Control Logical Device 2 Interrupt status. A context switch interrupt is pending when set to 1. Context - WSS. Indicates the current context Sound Blaster Emulation 1 - Windows Sound System res res res res res Reserved. Could read CS4239 D1 D0 res res 53 ...

Page 54

... Right FM Status Port Mixer Register Address Mixer Data Port Reset FM Status Port FM Register port FM Data Port Read Data Port Command/Write Data Write Buffer Status (Bit 7) Data Available Status (Bit 7) CS4239 TM Type Read Write Write Only Read Write Write Only Write Only Read/Write ...

Page 55

... RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED Table 15. SBPro Compatible Mixer Interface TM CrystalClear Portable ISA Audio System VOICE VOLUME RIGHT X MIC MIXING INPUT SELECT X X VSTC MASTER VOLUME RIGHT FM VOLUME RIGHT CD VOLUME RIGHT LINE VOLUME RIGHT CS4239 ...

Page 56

... JAB2 JAB1 JBCY JACX Joystick A, Coordinate X (pin 3) JACY Joystick A, Coordinate Y (pin 6) JBCX Joystick B, Coordinate X (pin 11) JBCY Joystick B, Coordinate Y (pin 13) JAB1 Joystick A, Button 1 (pin 2) JAB2 Joystick A, Button 2 (pin 7) JBB1 Joystick B, Button 1 (pin 10) JBB2 Joystick B, Button 2 (pin 14) CS4239 JBCX JACY JACX DS253PP2 ...

Page 57

... X/Y coordinates must have a 5.6 nF capacitor to ground and a 2.2 k resistor to the appropriate joystick connector pin. Figure 5 illustrates the schematic to the joystick connector. VDF 2 5.6 nF 2.2 k 2.2 k 5.6 nF 5.6 nF Figure 5. Joystick Logic CS4239 ...

Page 58

... PROM Interface CTRLbase+1, Default = 1xxxx000 D7 D6 ICH rbc CLK rbc JR1 JR0 DOUT DIN/EEN ICH CS4239 TM Register Joystick Control 2 E PROM Interface Block Power Down Control Indirect Address Reg. Control Indirect Data Register Control/RAM Access RAM Access End Global Status D5 D4 ...

Page 59

... Commands are followed by address and data information. 0x55 - Disable PnP Key 0x56 - Disable Crystal Key 0x53 - Disable Crystal Key 2 0x5A - Update Hardware Configura- tion Data. 0xAA - Download RAM. Address followed by data. (Stopped by writ- ing 0 to CTRLbase+6) CS4239 D1 D0 CA1 CA0 D1 D0 CD1 CD0 D1 ...

Page 60

... Reserved, backwards compatible. Register Name Control Indirect Address Control Indirect Data Register Name Reserved Version / Chip ID 3D Space Control 3D Enable Reserved Reserved Reserved Reserved Wavetable & Volume Control Power Management Table 18. Control Indirect Registers CS4239 D1 D0 rbc rbc DS253PP2 ...

Page 61

... Chip Identification. Distinguishes between this chip and other codec chips that support this register set. This register is identical to the WSS X25 register. 11110 - CS4239 V2-V0 Version number. As enhancements are made, the version number is changed so software can distinguish between the different versions of the same chip ...

Page 62

... When this bit goes from software RESDRV is initiated caus- ing the entire chip to be reset and placed in its default power-up con- figuration. Access to all registers on this chip will be lost, including this one, since the power-up state for PnP is all resources unassigned. CS4239 D0 SPORT DS253PP2 ...

Page 63

... CS5 CS4 CS3 CS2 D0-D5 are the 6 LSBs of the last command written to this port. Transmit Buffer Status Flag Transmit buffer not full 1 - Transmit buffer full Receive Buffer Status Flag 0 - Data in Receive buffer 1 - Receive buffer empty CS4239 D1 D0 CS1 CS0 D1 D0 CS1 CS0 63 ...

Page 64

... To enable the internal FM synthesis engine, the IFM bit in the Hardware Configuration data, byte 8 (Global Configuration Byte) must be set. This bit is also available in WSS register X4. Volume control for the internal FM synthesizer is supported through I18 and I19 in the WSS ex- tended register space. CS4239 DS253PP2 ...

Page 65

... DAC channels. The first format - SPF0, shown in Figure 6, is called 64-bit enhanced. This format has 64 SCLKs per frame with a one bit period wide FSYNC that precedes the frame. The first 16 bits occupy the left word and the second 16 bits oc- CS4239 TM 65 ...

Page 66

... Figure 8. 32-bit Mode (SF1,0 = 10) TM CrystalClear Portable ISA Audio System ... 7 zeros INT CEN PEN OVR 32 Bits INT = Interrupt Bit CEN = Capture Enable PEN = Playback Enable OVR = Left Overrange or Right Overrange ... ... 0 16 Clocks Right Data 32 No-Clock bit periods 0 ... CS4239 13 zeros Left Data DS253PP2 ...

Page 67

... Hardware Configuration data. The hardware connections to the CS9236 are illustrated in Figure 11. ... DAC 16 Clocks ... DAC 16 Clocks ADC 16 Clocks Figure 9. ADC/DAC Mode (SF1,0 = 11) TM CrystalClear Portable ISA Audio System ... ... 0 ... ... DAC 16 Clocks Right Data CS4239 ...

Page 68

... CTRLbase+7 (or X30 in WSS space) MIDI_IN which is high when activity exists on the XTAL3I ZVPORT. When the ZVPORT is enabled (ZVEN = 1), the CS4239 automatically detects a clock on the ZLRCK pin and switches to the Midi Out ZVPORT interface when the clock is present. When the ZLRCK is not present, the CS4239 automatically switches back to FM/Wavetable ...

Page 69

... This is the longest calibration mode and takes 450 sample periods at 44.1 kHz to complete. The calibration sequence is as fol- lows: All outputs are muted (DACs and mixer) The mixer is calibrated The ADCs are calibrated The DACs are calibrated All outputs are unmuted CS4239 69 ...

Page 70

... The WSS Codec always orders the left channel data before the right channel. Note that these definitions apply regardless of the specific for- mat of the data. For example, the left sample always comes first in the data stream regardless of whether the sample is 16-bit or 8-bit in size. CS4239 DS253PP2 ...

Page 71

... Symbolically: DMA Base register = Where N is the number of samples transferred S between interrupts and the "DMA Base regis- ter " consists of the concatenation of the upper 16 and lower DMA Base registers. Figure 12. Linear Transfer Functions CS4239 71 ...

Page 72

... RIGHT CrystalClear Portable ISA Audio System 32-bit Word Time sample 2 sample 1 MONO 32-bit Word Time sample 1 sample 1 LEFT 32-bit Word Time sample 2 sample 1 MONO 32-bit Word Time sample 1 sample 1 LEFT CS4239 DS253PP2 ...

Page 73

... DIGITAL HARDWARE DESCRIPTION The best example of hardware connection for the different sections of this part is the Reference Design Data Sheet. The Reference Design Data Sheet contains all the schematics, layout plots and a Bill of Materials; thereby providing a com- plete example. CS4239 73 ...

Page 74

... An external CMOS clock may be connected to the crystal input XTALI in lieu of the crystal. TM CrystalClear Portable ISA Audio System Up Down Mute GND VCF1 = 0 VCF1 = 1 Figure 18. Volume Control Formats CS4239 DS253PP2 ...

Page 75

... MCLK and SDOUT which have internal 100 The state of MCLK at the time RESDRV is brought low determines the function of the CDROM interface pins. If MCLK is sampled high, then CDCS, CDACK, CDINT, CDRQ are CS4239 pullups to pullups to 75 ...

Page 76

... Since the better the resistors match, the better the common-mode attenuation, one percent resistors are recommended. If CMAUX2 is not used, it should be connected through an AC cap to ana- log ground. (All resistors 1%) 6.8 k 3.4 k 2.0 F 6.8 k 6.8 k 3.4 k Figure 20. Differential CDROM In CS4239 RMS 1 1 6.8 k 1.0 F RAUX2 CMAUX2 LAUX2 1.0 F 6.8 k ...

Page 77

... Figure 25 shows the rec- ommended positioning of the decoupling capacitors. The capacitors must be on the same layer as, and close to, the part. The vias shown TM CrystalClear Portable ISA Audio System +5VA (Low Noise) or AGND - if CMOS Source 4 MIN 0.1 F 2.7 nF Figure 22. Mono Input CS4239 77 ...

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... Digital Digital Ground Noise Ground Figure 23. Suggested Motherboard Layout TM CrystalClear Portable ISA Audio System Analog Crystal Ground Part 1 Power Connector CS4239 DS253PP2 ...

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... Digital Ground Figure 24. Suggested Add-In Card Layout PIN 80 AGND PIN PIN 81 SGND3 Analog Digital = vias through to power/ground plane PIN 45 VD1 TM Crystal Part PIN 79 REFFLT .1 F PIN 71 TEST PIN 66 SGND2 .1 F PIN 65 VDF2 PIN 53 SGND4 PIN 46 DGND1 .1 F CS4239 79 ...

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... Input Frequency ( x Fs) Figure 26. ADC Filter Response 0 -10 -20 - -80 -90 -100 0.30 0.35 0.40 0.45 0. CrystalClear Portable ISA Audio System 0.7 0.8 0.9 1 Input Frequency ( x Fs) Figure 28. ADC Transition Band CS4239 DS253PP2 ...

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... Input Frequency ( x Fs) Figure 31. DAC Transition Band DS253PP2 0.2 0.1 0.0 -0.1 -0 -0.4 -0.5 -0.6 -0.7 -0.8 0.6 0.7 0.8 0.9 1.0 0.00 2.0 1.5 1.0 0 -1.5 -2.0 0. CrystalClear Portable ISA Audio System 0.05 0.10 0.15 0.20 0.25 0.30 0.35 Input Frequency ( x Fs) Figure 30. DAC Passband Ripple 0.05 0.10 0.15 0.20 0.25 0.30 0.35 Input Frequency ( x Fs) Figure 32. Deviation from Linear Phase CS4239 0.40 0.45 0.50 0.40 0.45 0.50 81 ...

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... VIEW ) TM CrystalClear Portable ISA Audio System 75 LAUX1 74 RAUX1 73 LOUT 72 71 TEST 70 JAB1 69 JBB1 68 JACX 67 JBCX 66 SGND2 65 VDF2 64 JBCY 63 JACY 62 JBB2 61 JAB2 60 MIDOUT 59 MIDIN 58 DACKA (DACK0*) 57 DACKC (DACK3*) 56 DACKB (DACK1*) 55 DRQA (DRQ0*) 54 IRQG (INT10) 53 SGND4 52 DRQC (DRQ3*) 51 DRQB (DRQ1*) CS4239 DS253PP2 ...

Page 83

... The DRQ<A,B,C> outputs must be connected to 8-bit DMA channel request signals only. The defaults on the ISA bus are DRQA = DRQ0, DRQB = DRQ1, and DRQC = DRQ3. The defaults can be changed by modifying the Hardware Resource data. DS253PP2 TM CrystalClear Portable ISA Audio System CS4239 83 ...

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... Plug and Play configuration sequence. The defaults on the ISA bus are IRQA = INT5, IRQB = INT7, IRQC = INT9, IRQD = INT11, IRQE = INT12, IRQF = INT15. IRQG is new to the CS4239 and defaults to unconnected for compatibility reasons. For new designs, IRQG is typically connected to IRQ10. The defaults ...

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... VREF - Voltage Reference, Output All analog inputs and outputs are centered around VREF which is nominally 2.1 Volts. This pin may be used to level shift external circuitry, although any AC loads should be buffered. DS253PP2 TM CrystalClear Portable ISA Audio System max centered around RMS max centered around RMS CS4239 85 ...

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... This active low signal goes low whenever the RESDRV pin goes high. This pin is also software controllable through the BRES bit in register C8 in the Control Logical Device space. BRES provides a software power down and reset control over devices connected to the CS4239 such as the CS9236 Single-Chip Wavetable Music Synthesizer. ...

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... When the serial port is enabled, SPE = 1 in I16, this pin is the serial data input. DS253PP2 TM CrystalClear Portable ISA Audio System resistor to the joystick connector pins 11 and 13, pullup) that, when pulled low with pullup) that, when pulled low with CS4239 87 ...

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... CS9236 interface is not available (SPE takes precedence over WTEN). SDATA - Wavetable Serial Audio Data, Input This input supplies the serial audio PCM data to be mixed on the CS4239. The data consists of left and right channel 16-bit data delineated by LRCLK. This pin should be connected to the SOUT output pin on the CS9236 ...

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... ISA bus DRQ line. CDACK- CDROM DMA Acknowledge, Output drive This pin can be used to output the ISA bus-generated DMA acknowledge signal to the CDROM interface. DS253PP2 TM CrystalClear Portable ISA Audio System resistor must be tied between MCLK/SCLK CS4239 resistor must 89 ...

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... Address Port changes to address 308h. When SCL is sampled low, the Address Port changes to 388h. Add-in cards should leave APSEL unconnected. TEST - Test This pin must be tied to ground for proper operation CrystalClear Portable ISA Audio System series resistor CS4239 DS253PP2 ...

Page 91

... These pins should be filtered, using a ferrite bead, from VD1. SGND1, SGND2, SGND3, SGND4 - Internal Digital Ground Ground reference for the internal digital section of the codec. Optimum layout is achieved by placing SGND1/2/3/4 on the digital ground plane with the DGND pin as shown in Figure 25. DS253PP2 TM CrystalClear Portable ISA Audio System CS4239 91 ...

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... Detailed information on audio testing and paths can be found in Personal Computer Audio Quality Measurements document by Dr. Steven Harris and Clif Sanchez, located at the following web address: http://www.cirrus.com/products/papers/meas/meas.html CrystalClear Portable ISA Audio System . For outputs, the tested channel is fed digital CS4239 DS253PP2 ...

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... A TM CrystalClear Portable ISA Audio System Description MIN Lead Count Overall Height Stand Off 0.00 b Lead Width 0.14 c Lead Thickness 0.077 Terminal Dimension 15.70 Package Body Terminal Dimension 15.70 Package Body Lead Pitch 0.40 Foot Length 0.30 T Lead Angle 0.0° CS4239 NOM MAX 100 1.66 0.20 0.26 0.127 0.177 16.00 16.30 14.0 16.00 16.30 14.0 0.50 0.60 0.50 0.70 12.0° 93 ...

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... DB 02AH, 00BH, 028H DB 022H, 0A0H, 09AH 94 TM CrystalClear Portable ISA Audio System ; EEPROM Validation Bytes: CS4239 ; EEPROM data length upper byte ; lower byte, Listed Size = 276 ; ACDbase Addr. Mask Length = 1 bytes ; ; MCB: IHCD ; GCB1: IFM ; Code Base Byte ...

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... End of DF for Logical Device Best Choice ; DF Acceptable Choice 1 ; End of DF for Logical Device Best Choice ; IRQ: 9 Interrupt Select Acceptable Choice 1 ; IRQ: 9,11,12,15 Interrupt Select Suboptimal Choice 1 ; End of DF for Logical Device 3 ; End of Resource Data, Resource Size = 280 CS4239 95 ...

Page 96

... Only two modes of Hardware Volume Control are supported: 2-button, and 3-button with momen- tary mute. In addition capacitor to ground is required for switch debounce on the CS4239. 13. Pullup resistors for the Joystick buttons, Hardware Volume Control pins, and the MIDIN pin are no longer required as they are internal to the CS4239 ...

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Notes • ...

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