MX29F080TC-90 Macronix International Co., MX29F080TC-90 Datasheet

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MX29F080TC-90

Manufacturer Part Number
MX29F080TC-90
Description
Manufacturer
Macronix International Co.
Datasheet

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Part Number:
MX29F080TC-90
Manufacturer:
MXIC
Quantity:
4 300
Part Number:
MX29F080TC-90
Manufacturer:
MXIC
Quantity:
4 300
FEATURES
GENERAL DESCRIPTION
The MX29F080 is a 8-mega bit Flash memory organized
as 1024K bytes of 8 bits. MXIC's Flash memories offer
the most cost-effective and reliable read/write non-vola-
tile random access memory. The MX29F080 is pack-
aged in 40-pin TSOP or 44-pin SOP. It is designed to be
reprogrammed and erased in system or in standard
EPROM programmers.
The standard MX29F080 offers access time as fast as
70ns, allowing operation of high-speed microprocessors
without wait states. To eliminate bus contention, the
MX29F080 has separate chip enable (CE) and output
enable (OE ) controls.
MXIC's Flash memories augment EPROM functionality
with in-circuit electrical erasure and programming. The
MX29F080 uses a command register to manage this
functionality. The command register allows for 100%
P/N:PM0579
1,048,576 x 8 byte mode only
Single power supply operation
- 5.0V only operation for read, erase and program
operation
Fast access time: 70/90/120ns
Low power consumption
- 30mA maximum active current
- 0.2uA typical standby current
Command register architecture
- Byte Programming (7us typical)
- Sector Erase of 16 equal sector with 64K-Byte each
Auto Erase (chip & sector) and Auto Program
- Automatically erase any combination of sectors with
Erase Suspend capability.
- Automatically program and verify data at specified
address
Erase suspend/Erase Resume
- Suspends sector erase operation to read data from,
or program data to, another sector that is not being
erased, then resumes the erase.
8M-BIT [1024K x 8] CMOS EQUAL SECTOR FLASH MEMORY
1
TTL level control inputs and fixed power supply levels
during erase and programming, while maintaining maxi-
mum EPROM compatibility.
MXIC Flash technology reliably stores memory contents
even after 10,000 erase and program cycles. The MXIC
cell is designed to optimize the erase and program
mechanisms. In addition, the combination of advanced
tunnel oxide processing and low internal electric fields
for erase and programming operations produces reliable
cycling. The MX29F080 uses a 5.0V±10% VCC supply
to perform the High Reliability Erase and auto Program/
Erase algorithms.
The highest degree of latch-up protection is achieved
with MXIC's proprietary non-epi process. Latch-up pro-
tection is proved for stresses up to 100 milliamps on
address and data pin from -1V to VCC + 1V.
Status Reply
- Data polling & Toggle bit for detection of program
and erase operation completion.
Ready/Busy (RY/BY)
- Provides a hardware method of detecting program
and erase operation completion.
Sector Group protect/chip unprotect for 5V/12V sys-
tem.
Sector Group protection
- Hardware protect method for each group which con-
sists of two adjacent sectors
- Temporary sector group unprotect allows code
changes in previously locked sectors
10,000 minimum erase/program cycles
Latch-up protected to 100mA from -1V to VCC+1V
Low VCC write inhibit is equal to or less than 3.2V
Package type:
- 40-pin TSOP or 44-pin SOP
Compatibility with JEDEC standard
- Pinout and software compatible with single-power
supply Flash
MX29F080
PRELIMINARY
REV. 1.6, NOV, 21, 2002

Related parts for MX29F080TC-90

MX29F080TC-90 Summary of contents

Page 1

FEATURES • 1,048,576 x 8 byte mode only • Single power supply operation - 5.0V only operation for read, erase and program operation • Fast access time: 70/90/120ns • Low power consumption - 30mA maximum active current - 0.2uA typical ...

Page 2

PIN CONFIGURATIONS 40 TSOP (Standard Type) (10mm x 20mm) 1 A19 2 A18 3 A17 4 A16 5 A15 6 A14 7 A13 8 A12 VCC MX29F080 RESET 13 A11 14 A10 15 A9 ...

Page 3

SECTOR STRUCTURE MX29F080 SECTOR ADDRESS TABLE Sector Group Sector SGA0 SA0 SGA0 SA1 SGA1 SA2 SGA1 SA3 SGA2 SA4 SGA2 SA5 SGA3 SA6 SGA3 SA7 SGA4 SA8 SGA4 SA9 SGA5 SA10 SGA5 SA11 SGA6 SA12 SGA6 SA13 SGA7 SA14 SGA7 ...

Page 4

BLOCK DIAGRAM CONTROL CE INPUT OE LOGIC WE ADDRESS LATCH A0-A19 AND BUFFER Q0-Q7 P/N:PM0579 MX29F080 PROGRAM/ERASE HIGH VOLTAGE MX29F080 FLASH ARRAY ARRAY SOURCE HV Y-PASS GATE PGM SENSE DATA AMPLIFIER HV PROGRAM DATA LATCH I/O BUFFER 4 WRITE STATE ...

Page 5

AUTOMATIC PROGRAMMING The MX29F080 is byte programmable using the Auto- matic Programming algorithm. The Automatic Program- ming algorithm makes the external system do not need to have time out sequence nor to verify the data pro- grammed. The typical chip ...

Page 6

TABLE 1. SOFTWARE COMMAND DEFINITIONS First Bus Command Bus Cycle Cycle Addr Reset 1 XXXH F0H Read 1 RA Read Silicon ID 4 555H Sector Group 4 555H Protect Verify Program 4 555H Chip Erase 6 555H Sector Erase 6 ...

Page 7

TABLE 2. MX29F080 BUS OPERATION Pins Mode Read Silicon ID Manufacturer Code(1) Read Silicon ID Device Code(1) Read Standby Output Disable Write Sector Group Protect (6) Chip Unprotect(6) Verify Sector Protect Reset NOTES: 1. Manufacturer and device codes may also ...

Page 8

READ/RESET COMMAND The read or reset operation is initiated by writing the read/reset command sequence into the command reg- ister. Microprocessor read cycles retrieve array data. The device remains enabled for reads until the command register contents are altered. If ...

Page 9

SECTOR ERASE COMMANDS The Automatic Sector Erase does not require the device to be entirely pre-programmed prior to executing the Automatic Set-up Sector Erase command and Automatic Sector Erase command. Upon executing the Automatic Sector Erase command, the device will ...

Page 10

ERASE SUSPEND This command only has meaning while the state ma- chine is executing Automatic Sector Erase operation, and therefore will only be responded during Automatic Sector Erase operation. When the Erase Suspend com- mand is written during a sector ...

Page 11

Q6:Toggle BIT I Toggle Bit indicates whether an Automatic Pro- gram or Erase algorithm is in progress or complete, or whether the device has entered the Erase Suspend mode. Toggle Bit I may be read at any ...

Page 12

Q5 Exceeded Timing Limits Q5 will indicate if the program or erase time has exceeded the specified limits (internal pulse count). Under these conditions Q5 will produce a "1". This time-out condition indicates that the program or erase cycle was ...

Page 13

POWER SUPPLY DECOUPLING In order to reduce power switching effect, each device should have a 0.1uF ceramic capacitor connected be- tween its VCC and GND. SECTOR GROUP PROTECTION The MX29F080 features hardware sector group protec- tion. This feature will disable ...

Page 14

CAPACITANCE ( 1.0 MHz) SYMBOL PARAMETER CIN1 Input Capacitance CIN2 Control Pin Capacitance COUT Output Capacitance READ OPERATION DC CHARACTERISTICS ( ° SYMBOL PARAMETER ILI Input Leakage Current ILO ...

Page 15

ABSOLUTE MAXIMUM RATINGS RATING Ambient Operating Temperature Storage Temperature Applied Input Voltage Applied Output Voltage VCC to Ground Potential A9 & OE READ TIMING WAVEFORMS VIH Addresses VIL VIH CE VIL VIH WE VIL VIH OE VIL VOH HIGH Z ...

Page 16

AC CHARACTERISTICS SYMBOL PARAMETER tOES OE setup time tCWC Command programming cycle tCEP WE programming pulse width tCEPH1 WE programming pulse width High tCEPH2 WE programming pulse width High tAS Address setup time tAH Address hold time ...

Page 17

SWITCHING TEST CIRCUITS DEVICE UNDER TEST SWITCHING TEST WAVEFORMS 2.4V 0.45V AC TESTING: Inputs are driven at 2.4V for a logic "1" and 0.45V for a logic "0". Input pulse rise and fall times are <20ns. COMMAND WRITE TIMING WAVEFORM ...

Page 18

AUTOMATIC PROGRAMMING TIMING WAVEFORM One byte data is programmed. Verify in fast algorithm and additional programming by external control are not required because these operations are executed auto- matically by internal control circuit. Programming completion can be verified by DATA ...

Page 19

AUTOMATIC PROGRAMMING ALGORITHM FLOWCHART Write Data AAH Address 555H Write Data 55H Address 2AAH Write Data A0H Address 555H Write Program Data/Address NO Invalid Command P/N:PM0579 START NO Toggle Bit Checking Q6 not Toggled YES Verify Byte Ok YES Auto ...

Page 20

AUTOMATIC CHIP ERASE TIMING WAVEFORM All data in chip are erased. External erase verification is not required because data is erased automatically by internal control circuit. Erasure completion can be verified by DATA polling and toggle bit checking after AUTOMATIC ...

Page 21

AUTOMATIC CHIP ERASE ALGORITHM FLOWCHART Write Data AAH Address 555H Write Data 55H Address 2AAH Write Data 80H Address 555H Write Data AAH Address 555H Write Data 55H Address 2AAH Write Data 10H Address 555H NO Invalid Command Auto Chip ...

Page 22

AUTOMATIC SECTOR ERASE TIMING WAVEFORM Block data indicated by A16 to A19 are erased. External erase verify is not required because data are erased automatically by internal control circuit. Erasure comple- tion can be verified by DATA polling and toggle ...

Page 23

AUTOMATIC SECTOR ERASE ALGORITHM FLOWCHART Write Data AAH Address 555H Write Data 55H Address 2AAH Write Data 80H Address 555H Write Data AAH Address 555H Write Data 55H Address 2AAH Write Data 30H Sector Address Toggle Bit Checking Q6 Toggled ...

Page 24

ERASE SUSPEND/ERASE RESUME FLOWCHART P/N:PM0579 MX29F080 START Write Data B0H NO Toggle Bit checking Q6 not toggled YES Read Array or Program Reading or NO Programming End YES Write Data 30H Continue Erase . Another NO Erase Suspend ? YES ...

Page 25

TIMING WAVEFORM FOR SECTOR GROUP PROTECTION A1 A6 12V 5V A9 tVLHT 12V 5V OE tVLHT WE CE Data A19-A17 P/N:PM0579 tWPP 1 tOESP Sector Address 25 MX29F080 Verify tVLHT 01H F0H tOE REV. 1.6, NOV. 21, 2002 ...

Page 26

TIMING WAVEFORM FOR CHIP UNPROTECTION A1 12V 5V A9 tVLHT A6 12V 5V OE tVLHT WE CE Data A19-A17 P/N:PM0579 tWPP 2 tOESP 26 MX29F080 Verify tVLHT 00H F0H tOE Sector Address REV. 1.6, NOV. 21, 2002 ...

Page 27

SECTOR GROUP PROTECTION ALGORITHM No PLSCNT=32? Yes Device Failed P/N:PM0579 START Set Up Sector Group Addr (A19, A18, A17) PLSCNT=1 OE=VID,A9=VID,CE=VIL A6=VIL Activate WE Pulse Time Out 10us Set WE=VIH, CE=OE=VIL A9 should remain VID Read from Sector Group Addr=SGA, ...

Page 28

CHIP UNPROTECTION ALGORITHM Increment Sector Addr * It is recommended before unprotect the whole chip, all sectors should be protected in advance. P/N:PM0579 START Protect All Sectors PLSCNT=1 Set OE=A9=VID CE=VIL,A6=1 Activate WE Pulse Time Out 12ms Set OE=CE=VIL A9=VID,A1=1 ...

Page 29

AC CHARACTERISTICS Parameter Std Description tREADY1 RESET PIN Low (During Automatic Algorithms) to Read or Write (See Note) tREADY2 RESET PIN Low (NOT During Automatic Algorithms) to Read or Write (See Note) tRP1 RESET Pulse Width (During Automatic Algorithms) tRP2 ...

Page 30

TEMPORARY SECTOR UNPROTECT Parameter Std. Description tVIDR VID Rise and Fall Time (See Note) tRSP RESET Setup Time for Temporary Sector Unprotect Note: Not 100% tested TEMPORARY SECTOR GROUP UNPROTECT TIMING WAVEFORM 12V RESET tVIDR CE WE ...

Page 31

TEMPORARY SECTOR GROUP UNPROTECT ALGORITHM Temporary Sector Group Unprotect Completed(Note 2) Note : 1. All protected sectors are temporary unprotected. P/N:PM0579 Start RESET = VID (Note 1) Perform Erase or Program Operation Operation Completed RESET = VIH VID=11.5V~12.5V 2. All ...

Page 32

ID CODE READ TIMING WAVEFORM VCC 5V VID ADD VIH A9 VIL VIH ADD A0 VIL tACC A1 VIH VIL ADD VIH A2-A8 A10-A19 VIL CE VIH VIL VIH WE VIL VIH OE VIL VIH DATA Q0-Q7 VIL P/N:PM0579 tACC ...

Page 33

ERASE AND PROGRAMMING PERFORMANCE (1) PARAMETER Sector Erase Time Chip Erase Time Byte Programming Time Chip Programming Time Erase/Program Cycles Note: 1. Not 100% Tested, Excludes external system level over head. 2. Typical values measured at 25° C,5V. LATCH-UP CHARACTERISTICS ...

Page 34

... ORDERING INFORMATION PLASTIC PACKAGE PART NO. ACCESS TIME (ns) MX29F080TC-70 70 MX29F080TC-90 90 MX29F080TC-12 120 MX29F080MC-70 70 MX29F080MC-90 90 MX29F080MC-12 120 P/N:PM0579 OPERATING CURRENT STANDBY CURRENT MAX.(mA) MAX. (uA MX29F080 PACKAGE 40 Pin TSOP (Normal Type) 40 Pin TSOP (Normal Type) 40 Pin TSOP ...

Page 35

PACKAGE INFORMATION P/N:PM0579 MX29F080 35 REV. 1.6, NOV. 21, 2002 ...

Page 36

P/N:PM0579 MX29F080 36 REV. 1.6, NOV. 21, 2002 ...

Page 37

REVISION HISTORY Revision Description 1.1 Add erase suspend ready max. 100us in ERASE SUSPEND's section at page10 1.2 Modify Package Information 40-pin TSOP 1.3 To modify "Package Information" Modify "Chip Unprotection Algorithm" 1.4 To modify Package Information--40-TSOP(10x20mm) 1.5 To corrected ...

Page 38

... TEL:+65-348-8385 FAX:+65-348-8096 TAIPEI OFFICE: TEL:+886-2-2509-3300 FAX:+886-2-2509-2200 ACRONIX MERICA, NC. TEL:+1-408-453-8088 FAX:+1-408-453-8488 CHICAGO OFFICE: TEL:+1-847-963-1900 FAX:+1-847-963-1909 http : //www.macronix.com C L O., TD. MACRONIX INTERNATIONAL CO., LTD. reserves the right to change product and specifications without notice. 38 MX29F080 ...

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