MT9126AE Zarlink Semiconductor, MT9126AE Datasheet
MT9126AE
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MT9126AE Summary of contents
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... Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc. Copyright 2002-2005, Zarlink Semiconductor Inc. All Rights Reserved. Quad ADPCM Transcoder MT9126AE MT9126AS MT9126ASR MT9126AE1 MT9126AS1 MT9126ASR1 Description The Quad ADPCM Transcoder is a low power, CMOS device capable of four encode and four decode functions per frame ...
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... C2o 4 MS4 25 5 BCLK ADPCMo 24 PCMo1 6 ADPCMi 23 PCMi1 7 VDD 22 8 MS3 VSS 21 9 MS2 LINEAR 20 10 MS1 19 ENB2/F0od ENB1 PCMo2 12 17 PWRDN 13 PCMi2 FORMAT 16 14 SEL A/µ 15 Figure 2 - Pin Connections Description SS for ST-BUS operation Zarlink Semiconductor Inc. Data Sheet . ...
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... MT9126 Description the PCM I/O ports (PCM1,PCM2) are 16 See Figures 5 & transparent bypass of the ST-BUS D- and C- SS the ST-BUS D-channel and C-channel output Zarlink Semiconductor Inc. Data Sheet ...
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... ADPCM 1 1 ADPCM Bypass for 32 kbit/s and 24 kbit ADPCM Bypass for 16 kbit PCM Bypass (64 kbit/s) to PCM1 if SEL=0, PCM2 if SEL Algorithm reset (ITU-T optional reset PCMo1/2 disable 4 Zarlink Semiconductor Inc. Data Sheet in EN1/ENB1 when SEL=0 in EN2/ENB2 when SEL=1 ...
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... During SSI operation the BCLK, ENB1 and ENB2/F0od inputs become active. The C2o, EN1, and EN2 outputs are forced to a high-impedance state except during LINEAR operation during which the EN1 output remains active. (See Figures 4, 5 & 6.) MT9126 the transcoder will assume SSI operation. Pin SS . (See Figures 7, 8 & 9 Zarlink Semiconductor Inc. Data Sheet ...
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... ADPCMo. In the same manner, the B1, B2, B3 and B4 channels from ADPCMi are transparently passed, with a two frame delay, to the same channels on PCMo1 and PCMo2 pins. Bits are don’t care. This feature allows two voice terminals, which utilize ADPCM MT9126 6 Zarlink Semiconductor Inc. Data Sheet ...
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... ADPCMo remain active if ENB1 is set ENB1 is brought high then PCMo1 and ADPCMo are fully tri-stated. B) SSI mode: When used in the 16-bit linear mode, only the EN1 output remains active. For complete chip power down see PWRDN. MT9126 7 Zarlink Semiconductor Inc. Data Sheet ...
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... ITU-T (G.711) Sign- Magnitude A/µ (A/µ (A/µ 1111 1111 1000 0000 1010 1010 1000 0000 1111 1111 1101 0101 0000 0000 0111 1111 0101 0101 0111 1111 0000 0000 0010 1010 Table 1 - Companded PCM 8 Zarlink Semiconductor Inc. Data Sheet ...
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... ADPCMo concurrent with the rising edge of BCLK. BCLK may be any rate between 128 kHz and 4096 kHz. For ST- BUS operation BCLK is ignored (tie to V MT9126 - 25%t (see Figure 3). For example, a system producing C4P C4P 512 t - 25%t Minimum C4P C4P Figure 3 - MCLK Minimum Requirement ) and the bit rate is internally set to 2048 kbit/ Zarlink Semiconductor Inc. Data Sheet ...
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... SEL = 0 SEL = 1 10 Zarlink Semiconductor Inc. Data Sheet B4 SEL for 16 kb/s only ...
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... B1 B2 SSS SEL = 1 11 Zarlink Semiconductor Inc. Data Sheet SSS 1234 1234 B3 B4 123x 123x ...
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... SEL = Zarlink Semiconductor Inc. Data Sheet SSI PCM Bypass 32 kb/s using bits kb/s where bit SSI ADPCM Bypass 16 kb/s ...
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... In 24 kb/s, bit 4 becomes “X” kb SEL operates for 16 kb/s only 13 Zarlink Semiconductor Inc. Data Sheet ...
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... SSS 1234 1234 1234 1234 SEL = 0 SEL = 1 SEL operated for 16kb/s only 14 Zarlink Semiconductor Inc. Data Sheet SSS ...
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... Zarlink Semiconductor Inc. Data Sheet ...
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... ADPCM array is distributed over the complete 2048 kbit bandwidth. If the DSP has a second serial port then access MT9126 frame n PCM Byte "X" processed according to MSn input states latched during frame n 24 kb/s Figure 10 - Data Throughput 16 Zarlink Semiconductor Inc. Data Sheet frame n+1 ADPCM Word "X" output from device during frame n+1 Word "x" 32 kb/s ...
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... Figure 11 - ISDN Line Card with 32 kbit/s ADPCM MT9126 F0i LIN+ LIN- F0i F0b LOUT- MCLK C4b LOUT+ ADPCMi DSTo ADPCMo DSTi F0od F0od F0i F0od 8 17 Zarlink Semiconductor Inc. Data Sheet C4i F0i MT8980 F0i DX ST1i ST1o C4i ST2o ST2i ...
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... MT9126 Figure 12 - Pair Gain Remote Terminal Utilizing Zarlink Components 18 Zarlink Semiconductor Inc. Data Sheet ...
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... DR PCmi2 EN1 DX MT9126 C2o PCMo1 PCmo2 PCMi1 PCMi2 EN1 MT9126 C2o PCMo1 PCMo2 PCMi1 PCMi2 EN1 19 Zarlink Semiconductor Inc. Data Sheet System 4.096MHz C2o F0i MCLK (C4i) PCMo1 PCMo2 ADPCMo ADPCMi PCMi1 PCMi2 +5v LINEAR EN1 ENB2/F0od F0i MCLK (C4i) ADPCMo ADPCMi ...
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... ILC 3 1.3 20 Zarlink Semiconductor Inc. Data Sheet Min. Max. Units -0 ±20 mA °C -65 150 500 mW Units Test Conditions V V 400 mV noise margin V 400 mV noise margin V V °C Units Test Conditions µ ...
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... F0iH x100 t 60 DFD t 244 DFW t 61 244.2 C4P t 95 DSD t 50 DSH t 50 DSS 21 Zarlink Semiconductor Inc. Data Sheet Units Test Conditions =150pF//R = =150pF//R = =150pF//R = ...
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... MCLK F0iH U S F0i t F0iS F0od MT9126 t BCH t BCL t t DIS DIH t DSS t DSH Figure 14 - Serial Port Timing 22 Zarlink Semiconductor Inc. Data Sheet SSH AHZ DSD V IHC V ILC t ...
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... Min. Typ. Max. t 100 D1 t 100 † Sym. Min. Typ. Max. t 500 SU t 500 HOLD HOLD 23 Zarlink Semiconductor Inc. Data Sheet Units Test Conditions ns 150pF//1K Load ns 150pF//1K Load IHC V ILC Units Test Conditions ns ...
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... MS1 to MS6 MCLK F0i Refer to Figure 14 for ST-BUS F0i timing. Figure 17 - ST-BUS Mode Select Set-up and Hold Timing MT9126 t t HOLD SU 24 Zarlink Semiconductor Inc. Data Sheet ...
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... Zarlink Semiconductor 2005. All rights reserved. ISSUE ACN DATE APPRD. Package Code Previous package codes ...
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... For more information about all Zarlink products Information relating to products and services furnished herein by Zarlink Semiconductor Inc. or its subsidiaries (collectively “Zarlink”) is believed to be reliable. However, Zarlink assumes no liability for errors that may appear in this publication, or for liability otherwise arising from the application or use of any such information, product or service or for any infringement of patents or other intellectual property rights owned by third parties which may result from such application or use ...