MC14555B ON Semiconductor, MC14555B Datasheet

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MC14555B

Manufacturer Part Number
MC14555B
Description
Manufacturer
ON Semiconductor
Datasheet

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MC14555B, MC14556B
Dual Binary to 1−of−4
Decoder/Demultiplexer
complementary MOS (CMOS) enhancement mode devices. Each
Decoder/Demultiplexer has two select inputs (A and B), an active low
Enable input (E), and four mutually exclusive outputs (Q0, Q1, Q2,
Q3). The MC14555B has the selected output go to the “high” state,
and the MC14556B has the selected output go to the “low” state.
Expanded decoding such as binary−to−hexadecimal (1−of−16), etc.,
can be achieved by using other MC14555B or MC14556B devices.
selection control, and demultiplexing (using the Enable input as a data
input) in digital data transmission systems.
Features
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Temperature Derating: Plastic “P and D/DW”
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high−impedance circuit. For proper operation, V
to the range V
(e.g., either V
*For additional information on our Pb−Free strategy and soldering details, please
MAXIMUM RATINGS
© Semiconductor Components Industries, LLC, 2006
June, 2006 − Rev. 8
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
DC Supply Voltage Range
Input or Output Voltage Range
(DC or Transient)
Input or Output Current (DC or Transient)
per Pin
Power Dissipation, per Package (Note 1)
Ambient Temperature Range
Storage Temperature Range
Lead Temperature (8−Second Soldering)
The MC14555B and MC14556B are constructed with
Applications include code conversion, address decoding, memory
This device contains protection circuitry to guard against damage due to high
Unused inputs must always be tied to an appropriate logic voltage level
Schottky TTL Load Over the Rated Temperature Range
Diode Protection on All Inputs
Active High or Active Low Outputs
Expandable
Supply Voltage Range = 3.0 Vdc to 18 Vdc
All Outputs Buffered
Capable of Driving Two Low−Power TTL Loads or One Low−Power
Pb−Free Packages are Available*
Packages: – 7.0 mW/°C From 65°C To 125°C
SS
SS
or V
Parameter
v (V
DD
in
). Unused outputs must be left open.
or V
(Voltages Referenced to V
out
) v V
DD
.
Symbol
V
in
I
in
in
V
T
and V
P
, V
, I
T
T
stg
DD
A
D
L
out
out
SS
out
)
−0.5 to +18.0
should be constrained
−55 to +125
−65 to +150
−0.5 to V
Value
+ 0.5
± 10
500
260
DD
1
Unit
mW
mA
°C
°C
°C
V
V
Q0
Q1
Q2
Q3
V
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
E
A
B
SS
1
A
A
A
A
A
A
A
1
MC14555B
1
2
3
4
5
6
7
8
1
ORDERING INFORMATION
x
A
WL, L
YY, Y
WW, W = Work Week
G
PIN ASSIGNMENTS
http://onsemi.com
16
15
14
13
12
11
10
9
CASE 751B
SOEIAJ−16
CASE 648
CASE 966
P SUFFIX
D SUFFIX
F SUFFIX
PDIP−16
SOIC−16
= 5 or 6
= Assembly Location
= Wafer Lot
= Year
= Pb−Free Package
E
V
A
B
Q0
Q1
Q2
Q3
B
DD
B
B
B
B
B
B
Publication Order Number:
Q0
Q1
Q2
Q3
V
E
A
B
SS
A
A
A
A
A
A
A
16
16
16
1
1
1
MC14556B
1
2
3
4
5
6
7
8
MC1455xBCP
DIAGRAMS
AWLYYWWG
MARKING
MC1455xB
AWLYWW
1455xBG
MC14555B/D
ALYWG
16
15
14
13
12
10
11
9
E
V
A
B
Q0
Q1
Q2
Q3
B
DD
B
B
B
B
B
B

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MC14555B Summary of contents

Page 1

... Decoder/Demultiplexer has two select inputs (A and B), an active low Enable input (E), and four mutually exclusive outputs (Q0, Q1, Q2, Q3). The MC14555B has the selected output go to the “high” state, and the MC14556B has the selected output go to the “low” state. ...

Page 2

... Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance. 3. The formulas given are for the typical characteristics only at 25° calculate total supply current at loads other than 50 pF – volts kHz is input frequency, and k = 0.002 MC14555B, MC14556B MC14555B MC14556B ...

Page 3

... INPUT E LOW INPUTS 1 (50% DUTY CYCLE INPUTS (50% DUTY CYCLE) OUTPUT Q1 All 8 outputs connect to respective respect to a system clock. Figure 1. Dynamic Power Dissipation Signal Waveforms *Eliminated for MC14555B MC14555B, MC14556B (Note pF 25° Symbol TLH t 5.0 ...

Page 4

... MC14556BD MC14556BDR2 MC14556BDR2G MC14556BF MC14556BFEL MC14556BFELG †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. MC14555B, MC14556B Package PDIP−16 PDIP−16 (Pb−Free) SOIC−16 SOIC−16 (Pb−Free) SOIC− ...

Page 5

... M −A− −B− −T− SEATING PLANE 0.25 (0.010 MC14555B, MC14556B PACKAGE DIMENSIONS PDIP−16 CASE 648−08 ISSUE T L SEATING −T− PLANE SOIC−16 CASE 751B−05 ISSUE 0.25 (0.010) ...

Page 6

... Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: orderlit@onsemi.com MC14555B, MC14556B PACKAGE DIMENSIONS SOEIAJ−16 CASE 966−01 ISSUE A ...

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