K6X8008C2B-TF55 Samsung, K6X8008C2B-TF55 Datasheet
K6X8008C2B-TF55
Specifications of K6X8008C2B-TF55
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K6X8008C2B-TF55 Summary of contents
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... K6X8008C2B Family Document Title 1Mx8 bit Low Power and Low Voltage CMOS Static RAM Revision History Revision No. History 0.0 Initial draft 0.1 Revised - Deleted 44-TSOP2-400R package type. - Added Commercial product. 1.0 Finalized - Changed I from 10mA to 6mA CC - Changed I 1 from 10mA to 7mA CC - Changed I 2 from 50mA to 35mA ...
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... SAMSUNG ELECTRONICS CO., LTD. reserves the right to change products and specifications without notice. GENERAL DESCRIPTION The K6X8008C2B families are fabricated by SAMSUNG s advanced full CMOS process technology. The families sup- port various operating temperature range for user flexibility of system design. The families also support low data retention voltage for battery back-up operation with low data retention current ...
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... Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. Functional operation should be restricted to recommended operating condition. Exposure to absolute maximum rating conditions for extended periods may affect reliability. Industrial Products(-40~85 C) Part Name Function K6X8008C2B-TF55 44-TSOP2-F, 55ns, LL K6X8008C2B-TF70 44-TSOP2-F, 70ns ...
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... K6X8008C2B Family RECOMMENDED DC OPERATING CONDITIONS Item Symbol Supply voltage Vcc Ground Vss Input high voltage V IH Input low voltage V IL Note: 1. Commercial Product otherwise specified. A Industrial Product otherwise specified. A Automotive Product: T =-40 to 125 C, otherwise specified Overshoot ...
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... K6X8008C2B Family AC OPERATING CONDITIONS TEST CONDITIONS (Test Load and Input/Output Reference) Input pulse level: 0.8 to 2.4V Input rising and falling time: 5ns Input and output reference voltage: 1.5V Output load(see right): C =100pF+1TTL L C =50pF+1TTL L AC CHARACTERISTICS (V =4.5~5.5V, Commercial product Industrial product Parameter List ...
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... K6X8008C2B Family TIMING DIAGRAMS TIMING WAVEFORM OF READ CYCLE(1) Address Data Out Previous Data Valid TIMING WAVEFORM OF READ CYCLE(2) Address High-Z Data out NOTES (READ CYCLE and are defined as the time at which the outputs achieve the open circuit conditions and are not referenced to output voltage ...
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... K6X8008C2B Family TIMING WAVEFORM OF WRITE CYCLE(1) Address Data in Data Undefined Data out TIMING WAVEFORM OF WRITE CYCLE(2) Address Data in Data out (WE Controlled CW( CW(2) t WP(1) t AS( Data Valid t WHZ (CS Controlled CW(2) AS( WP( Data Valid ...
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... K6X8008C2B Family TIMING WAVEFORM OF WRITE CYCLE(3) Address Data in Data out NOTES (WRITE CYCLE write occurs during the overlap of a low CS CS going high and WE going low : A write end at the earliest transition among measured from the begining of write to the end of write. ...
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... K6X8008C2B Family PACKAGE DIMENSIONS 44 PIN THIN SMALL OUTLINE PACKAGE TYPE II (400F) #44 #1 18.81 MAX. 0.741 18.41 0.10 0.725 0.004 0.35 0.805 0. 0.032 0.014 0.004 #23 11.76 0.20 0.463 0.008 #22 1.00 0.10 0.039 0.004 1.20 MAX. 0.047 0.10 MAX 0.004 0.80 0.0315 9 CMOS SRAM Unit: millimeters(inches) 0~8 0. 0.010 0.45 ~0.75 0.018 ~ 0.030 0. 0.020 Revision 1.0 September 2003 ...