GAL22V10D-5LJ Lattice Semiconductor Corp., GAL22V10D-5LJ Datasheet

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GAL22V10D-5LJ

Manufacturer Part Number
GAL22V10D-5LJ
Description
High Performance E2CMOS PLD, 5ns, low power
Manufacturer
Lattice Semiconductor Corp.
Datasheet

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• HIGH PERFORMANCE E
• ACTIVE PULL-UPS ON ALL PINS
• COMPATIBLE WITH STANDARD 22V10 DEVICES
• 50% to 75% REDUCTION IN POWER VERSUS BIPOLAR
• E
• TEN OUTPUT LOGIC MACROCELLS
• PRELOAD AND POWER-ON RESET OF REGISTERS
• APPLICATIONS INCLUDE:
• ELECTRONIC SIGNATURE FOR IDENTIFICATION
• LEAD-FREE PACKAGE OPTIONS
ESCRIPTION
The GAL22V10, at 4ns maximum propagation delay time, combines
a high performance CMOS process with Electrically Erasable (E
floating gate technology to provide the highest performance avail-
able of any 22V10 device on the market. CMOS circuitry allows
the GAL22V10 to consume much less power when compared to
bipolar 22V10 devices. E
erase times, providing the ability to reprogram or reconfigure the
device quickly and efficiently.
The generic architecture provides maximum design flexibility by
allowing the Output Logic Macrocell (OLMC) to be configured by
the user. The GAL22V10 is fully function/fuse map/parametric com-
patible with standard bipolar and CMOS 22V10 devices.
Unique test circuitry and reprogrammable cells allow complete AC,
DC, and functional testing during manufacture. As a result, Lat-
tice Semiconductor delivers 100% field programmability and func-
tionality of all GAL products. In addition, 100 erase/write cycles and
data retention in excess of 20 years are specified.
Copyright © 2006 Lattice Semiconductor Corp. All brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject
to change without notice.
LATTICE SEMICONDUCTOR CORP., 5555 Northeast Moore Ct., Hillsboro, Oregon 97124, U.S.A.
Tel. (503) 268-8000; 1-800-LATTICE; FAX (503) 268-8556; http://www.latticesemi.com
22v10_12
Features
Description
— 4 ns Maximum Propagation Delay
— Fmax = 250 MHz
— 3.5 ns Maximum from Clock Input to Data Output
— UltraMOS
— Fully Function/Fuse-Map/Parametric Compatible
— 90mA Typical Icc on Low Power Device
— 45mA Typical Icc on Quarter Power Device
— Reconfigurable Logic
— Reprogrammable Cells
— 100% Tested/100% Yields
— High Speed Electrical Erasure (<100ms)
— 20 Year Data Retention
— Maximum Flexibility for Complex Logic Designs
— 100% Functional Testability
— DMA Control
— State Machine Control
— High Speed Graphics Processing
— Standard Logic Speed Upgrade
2
CELL TECHNOLOGY
with Bipolar and UVCMOS 22V10 Devices
®
Advanced CMOS Technology
2
technology offers high speed (<100ms)
2
CMOS
®
TECHNOLOGY
2
)
1
Functional Block Diagram
Pin Configuration
NC
I
I
I
I
I
I
I/CLK
11
5
7
9
12
4
I
I
I
I
I
I
I
I
I
I
I
GAL22V10
GAL22V10
Specifications GAL22V10
Top View
Top View
SOIC
14
PLCC
2
High Performance E
28
16
26
18
25
23
21
19
I/O/Q
I/O/Q
I/O/Q
NC
I/O/Q
I/O/Q
I/O/Q
Generic Array Logic™
GAL22V10
PRESET
RESET
10
12
14
16
16
12
10
14
I/CLK
8
GND
8
OLMC
OLMC
OLMC
OLMC
OLMC
OLMC
OLMC
OLMC
OLMC
OLMC
I
I
I
I
I
I
I
I
I
I
1
6
12
December 2006
22V10
2
DIP
GAL
CMOS PLD
I/O/Q
I/O/Q
I/O/Q
I/O/Q
I/O/Q
I/O/Q
I/O/Q
I/O/Q
I/O/Q
I/O/Q
24
13
18
Vcc
I/O/Q
I/O/Q
I/O/Q
I/O/Q
I/O/Q
I/O/Q
I/O/Q
I/O/Q
I/O/Q
I
I/O/Q

Related parts for GAL22V10D-5LJ

GAL22V10D-5LJ Summary of contents

Page 1

... GAL products. In addition, 100 erase/write cycles and data retention in excess of 20 years are specified. Copyright © 2006 Lattice Semiconductor Corp. All brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice. ...

Page 2

GAL22V10 Ordering Information Conventional Packaging Commercial Grade Specifications ...

Page 3

... Part Number Description GAL22V10D Device Name Speed (ns Low Power Power Q = Quarter Power ) ...

Page 4

Output Logic Macrocell (OLMC) The GAL22V10 has a variable number of product terms per OLMC. Of the ten available OLMCs, two OLMCs have access to eight product terms (pins 14 and 23, DIP pinout), two have ten product terms (pins ...

Page 5

Registered Mode ACTIVE LOW Combinatorial Mode ACTIVE LOW Specifications GAL22V10 ...

Page 6

GAL22V10 Logic Diagram / JEDEC Fuse Map 1 ( 0000 0044 . . . 0396 0440 . . . . 0880 2 (3) 0924 . . . . . 1452 3 (4) 1496 . . . . ...

Page 7

... The leakage current is due to the internal pull-up on all pins. See Input Buffer section for more information. 2) One output at a time for a maximum duration of one second. Vout = 0.5V was selected to avoid test problems caused by tester ground degradation. Characterized but not 100% tested. 3) Typical values are at Vcc = 5V and T Specifications GAL22V10D Recommended Operating Conditions 1 Commercial Devices: ...

Page 8

... Refer to fmax Description section. Characterized initially and after any design or process changes that may affect these parameters. Capacitance ( ° 1.0 MHz) A SYMBOL PARAMETER C Input Capacitance I C I/O Capacitance I/O *Characterized but not 100% tested. Specifications GAL22V10D Specifications GAL22V10 Over Recommended Operating Conditions DESCRIPTION MAXIMUM* UNITS COM COM COM/IND - MIN. MAX. ...

Page 9

... Calculated from fmax with internal feedback. Refer to fmax Description section. 3) Refer to fmax Description section. Capacitance ( ° 1.0 MHz) A SYMBOL PARAMETER C Input Capacitance I C I/O Capacitance I/O *Characterized but not 100% tested. Specifications GAL22V10D Specifications GAL22V10 Over Recommended Operating Conditions COM / IND -10 MIN. MAX — 2.5 6 — 0 — ...

Page 10

Switching Waveforms INPUT or I/O FEEDBACK COMBINATORIAL OUTPUT Combinatorial Output INPUT or I/O FEEDBACK t dis OUTPUT Input or I/O to Output Enable/Disable CLK (w/o fdbk) Clock Width INPUT or I/O ...

Page 11

Descriptions max with External Feedback 1/( Note: fmax with external feedback is cal- culated from ...

Page 12

... C Active High ∞ Active Low 300Ω + FROM OUTPUT (O/Q) UNDER TEST INCLUDES TEST FIXTURE AND PROBE CAPACITANCE L GAL22V10D-4 Output Load Conditions (see figure below) GND to 3.0V 1.5ns 10% – 90% Test Condition 2.0ns 10% – 90% A 1.5V B 1.5V See Figure 390Ω ...

Page 13

Electronic Signature An electronic signature (ES) is provided in every GAL22V10 device. It contains 64 bits of reprogrammable memory that can contain user-defined data. Some uses include user ID codes, revision numbers, or inventory control. The signature data is always ...

Page 14

Power-Up Reset INTERNAL REGISTER Q - OUTPUT ACTIVE LOW OUTPUT REGISTER ACTIVE HIGH OUTPUT REGISTER Circuitry within the GAL22V10 provides a reset signal to all reg- isters during power-up. All internal registers will have their Q out- puts set low ...

Page 15

... GAL22V10D-4/-5/-7/-10L (PLCC): Typical AC and DC Characteristic Diagrams Normalized Tpd vs Vcc 1.1 1.05 RISE FALL 1 0.95 0.9 4.5 4.75 5 5.25 Supply Voltage (V) Normalized Tpd vs Temp 1.3 1.2 RISE FALL 1.1 1 0.9 0.8 -55 - 100 Temperature (deg. C) Delta Tpd Outputs 0 -0.1 -0.2 -0 Number of Outputs Switching Delta Tpd vs Output Loading 12 RISE 8 FALL ...

Page 16

... GAL22V10D-4/-5/-7/-10L (PLCC): Typical AC and DC Characteristic Diagrams Vol vs Iol 0.6 0.4 0 Iol (mA) Normalized Icc vs Vcc 1.2 1.1 1 0.9 0.8 4.5 4.75 5 5.25 Supply Voltage (V) Delta Icc vs Vin (1 input 0.5 1 1.5 2 2.5 3 3.5 4 4.5 Vin (V) Specifications GAL22V10 Voh vs Ioh ...

Page 17

... GAL22V10D-7/10L (PDIP): Typical AC and DC Characteristic Diagrams Normalized Tpd vs Vcc 1.1 1.05 RISE FALL 1 0.95 0.9 4.5 4.75 5 5.25 5.5 Supply Voltage (V) Normalized Tpd vs Temp 1.3 RISE 1.2 FALL 1.1 1 0.9 0.8 -55 - 100 125 Temperature (deg. C) Delta Tpd Outputs 0 -0.1 -0.2 -0.3 -0.4 -0.5 -0.6 -0.7 -0.8 -0 Number of Outputs Switching Delta Tpd vs Output Loading ...

Page 18

... GAL22V10D-7/10L (PDIP): Typical AC and DC Characteristic Diagrams Vol vs Iol 0.5 0.4 0.3 0.2 0 Iol (mA) Normalized Icc vs Vcc 1.15 1.1 1.05 1 0.95 0.9 0.85 4.5 4.75 5 5.25 Supply Voltage (V) Delta Isb vs Vin (1 input 0.5 1 1.5 2 2.5 3 3.5 4 4.5 Vin (V) Voh vs Ioh Ioh (mA) Normalized Icc vs Temp 1 ...

Page 19

... GAL22V10D-10Q and Slower (L & Q): Typical AC and DC Characteristic Diagrams Normalized Tpd vs Vcc 1.1 RISE 1.05 FALL 1 0.95 0.9 4.5 4.75 5 5.25 5.5 Supply Voltage (V) Normalized Tpd vs Temp 1.3 RISE 1.2 FALL 1.1 1 0.9 0.8 -55 - 100 125 Temperature (deg. C) Delta Tpd Outputs 0 -0.4 -0.8 -1 Number of Outputs Switching Delta Tpd vs Output Loading ...

Page 20

... GAL22V10D-10Q and Slower (L & Q): Typical AC and DC Characteristic Diagrams Vol vs Iol 0.6 0.4 0 Iol (mA) Normalized Icc vs Vcc 1.2 1.1 1 0.9 0.8 4.5 4.75 5 5.25 Supply Voltage (V) Delta Icc vs Vin (1 input 0.5 1 1.5 2 2.5 3 3.5 4 4.5 Vin (V) Specifications GAL22V10 Voh vs Ioh 4.5 4 3.5 3 2.5 2 1 Ioh (mA) Normalized Icc vs Temp 1 ...

Page 21

Revision History Date Version - 22v10_08 August 2004 22v10_09 July 2006 22v10_10 August 2006 22v10_11 December 2006 22v10_12 Specifications GAL22V10 Change Summary Previous Lattice release. Added lead-free package options. Corrected SOIC pin configuration diagram. Pin 13. Updated for lead-free package ...

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