PACVGA100 California Micro Devices Corporation, PACVGA100 Datasheet

no-image

PACVGA100

Manufacturer Part Number
PACVGA100
Description
Manufacturer
California Micro Devices Corporation
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PACVGA100
Manufacturer:
CMD
Quantity:
5 510
Part Number:
PACVGA100
Manufacturer:
CMD
Quantity:
5 510
Part Number:
PACVGA100Q
Manufacturer:
CMD
Quantity:
20 000
Company:
Part Number:
PACVGA100Q
Quantity:
922
02/14/02
Features
Applications
© 2002 California Micro Devices Corp. All rights reserved.
Typical Application Circuit
R1, R2 required
only for VGA101
Note 1: For best ESD protection, minimize R/G/B trace lengths
Seven channel ESD protection
+
side (HBM)
+
per channel, connector side (IEC 61000-4-2 Level
4 standard)
Low loading capacitance—4.5pF typical
16-pin QSOP package
ESD protection and termination resistors for VGA
(video) port interfaces
Desktop PCs
Notebook computers
LCD monitors
15 kV ESD protection per channel, connector
8 kV contact, 15 kV air discharge ESD protection
DDC_Data
DDC_Clk
215 Topaz Street, Milpitas, California 95035
H-Sync
V-Sync
between the PACVGA100/101 device and the video
connector.
Blue
Red
Grn
R1 R2
V
CC
VGA Port ESD Protection and Termination Network
11
14
2
3
5
7
9
1
4
8
(See Note 1)
V
13
CC
16
C
10
12
15
6
BYPASS
0.2uF
L Tel: (408) 263-3214
R
G
H-Sync
V-Sync
DDC_Data
DDC_Clk
B
Simplified Electrical Schematic
Product Description
The PACVGA100/101 functions as a transmission line
termination and ESD protection device for video appli-
cations. It provides 75 ohm parallel terminations for
video R, G, and B lines and series terminations for the
Horizontal Sync, Vertical Sync and the two DDC lines
which serve as Plug and Play logic signals. In addition,
all interface lines provide Level 4 ESD protection per
the IEC 61000-4-2 contact discharge specification. The
PACVGA100 provides internal pull-up resistors (R3) for
the two DDC lines whereas the PACVGA101 omits
these internal pull-ups so that different pull-up resistor
values can be added externally.
L Fax: (408) 263-7846 L www.calmicro.com
* R3 omitted for PACVGA101
R3 = 2.2KΩ (for PACVGA100 only)
R1 = 75Ω, R2 = 33Ω
PACVGA100/101
1

Related parts for PACVGA100

PACVGA100 Summary of contents

Page 1

... DDC_Data 14 DDC_Clk 4 Note 1: For best ESD protection, minimize R/G/B trace lengths between the PACVGA100/101 device and the video connector. © 2002 California Micro Devices Corp. All rights reserved. 215 Topaz Street, Milpitas, California 95035 02/14/02 Product Description The PACVGA100/101 functions as a transmission line termination and ESD protection device for video appli- cations ...

Page 2

... DDC_Data serial line). DDC Signal Input 2. Connects to the VGA Controller side of one of the DDC signals (for example, the bidirectional DDC_Clk). DDC Signal Output 2. Connects to the connector side of one of the DDC signals (for example, the bidirectional DDC_Clk). PACVGA100/101 VCC DDC2_CONN DDC2_CTLR VSS ...

Page 3

... Topaz Street, Milpitas, California 95035 02/14/02 PART NUMBERING INFORMATION Package Ordering Part Number QSOP PACVGA100 QSOP PACVGA101 ABSOLUTE MAXIMUM RATINGS STANDARD OPERATING CONDITIONS ) L Tel: (408) 263-3214 PACVGA100/101 1 Part Marking PACVGA100Q PACVGA101Q RATING 6.0 20 -40 to +85 -65 to +150 ( 800 RATING -40 to +85 5.0 3 ...

Page 4

... IN 2 applies Note 3 Notes 2,4 Notes 2,5 Note 6 Notes 2,4 @15kV ESD HBM; Notes 2 & 4 =25°C unless otherwise noted. A only; V bypassed to V with 0.2µF ceramic capacitor 100pF, R Discharge = 150pF 330Ω, V Discharge Discharge PACVGA100/101 1 MIN TYP MAX +5 +5 +10 +200 0.65 0.95 17.0 25.0 +0.1 +1.0 4.5 6 =0V 13.0 ...

Page 5

... Mechanical Details QSOP Mechanical Specifications PACVGA100/101 devices are packaged in 16-pin QSOP packages. Dimensions are presented below. For complete information on the QSOP-16 package, see the California Micro Devices QSOP Package Infor- mation document. PACKAGE DIMENSIONS Package QSOP (JEDEC name is SSOP) Pins Millimeters ...

Related keywords