UPD75P3116GC-AB8 Renesas Electronics Corporation., UPD75P3116GC-AB8 Datasheet
UPD75P3116GC-AB8
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UPD75P3116GC-AB8 Summary of contents
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SINGLE-CHIP MICROCONTROLLER The µ PD75P3116 replaces the µ PD753108’s internal mask ROM with a one-time PROM, and features expanded ROM capacity. Because the µ PD75P3116 supports programming by users suitable for use in evaluation of systems in ...
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FUNCTION OUTLINE Item Instruction execution time Internal memory PROM RAM General-purpose registers I/O ports CMOS input CMOS I/O N-ch open-drain I/O Total LCD controller/driver Timers Serial interface Bit sequential buffer (BSB) Clock output (PCL) Buzzer output (BUZ) Vectored interrupts Test ...
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PIN CONFIGURATION (TOP VIEW) ................................................................................................. 2. BLOCK DIAGRAM ............................................................................................................................ 3. PIN FUNCTIONS ............................................................................................................................... 3.1 Port Pins ................................................................................................................................................... 3.2 Non-Port Pins ........................................................................................................................................... 3.3 Pin I/O Circuits ......................................................................................................................................... 11 3.4 Recommended Connection of Unused Pins ......................................................................................... AND ...
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PIN CONFIGURATION (TOP VIEW) µ PD75P3116GC-AB8 • 64-pin plastic QFP (14 × 14): • 64-pin plastic LQFP (12 × 12): µ PD75P3116GK-8A8 • 64-pin plastic LQFP (14 × 14): µ PD75P3116GC-8BS, 75P3116GC-8BS ...
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PIN IDENTIFICATIONS P00 to P03: Port 0 P10 to P13: Port 1 P20 to P23: Port 2 P30 to P33: Port 3 P50 to P53: Port 5 P60 to P63: Port 6 P80 to P83: Port 8 P90 to P93: ...
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BLOCK DIAGRAM Watch BUZ/P23 timer INTW f LCD Basic counter (14) interval timer/ watchdog timer INTBT TI0/P13 8-bit timer/event PTO0/P20 counter #0 INTT0 TOUT0 INTT1 TI1/TI2/ 8-bit P12/INT2 Cascaded timer/event 16-bit PTO1/P21 counter #1 timer/ PTO2/ 8-bit event 16384 ...
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PIN FUNCTIONS 3.1 Port Pins (1/2) Pin Name I/O Alternate Function P00 Input INT4 P01 SCK P02 SO/SB0 P03 SI/SB1 P10 Input INT0 P11 INT1 P12 TI1/TI2/INT2 P13 TI0 P20 I/O PTO0 P21 PTO1 P22 PCL/PTO2 P23 BUZ P30 ...
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Port Pins (2/2) Pin Name I/O Alternate Function P60 I/O KR0/D0 P61 KR1/D1 P62 KR2/D2 P63 KR3/D3 P80 I/O S23 P81 S22 P82 S21 P83 S20 P90 I/O S19 P91 S18 P92 S17 P93 S16 Notes 1. Circuit types ...
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Non-Port Pins (1/2) Pin Name I/O Alternate Function TI0 Input P13 TI1 P12/INT2/TI2 TI2 P12/INT2/TI1 PTO0 Output P20 PTO1 P21 PTO2 P22/PCL PCL P22/PTO2 BUZ P23 SCK I/O P01 SO/SB0 P02 SI/SB1 P03 INT4 Input P00 INT0 Input P10 ...
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Non-Port Pins (2/2) Pin Name I/O Alternate Function S0 to S15 Output — S16 to S19 Output P93 to P90 S20 to S23 Output P83 to P80 COM0 to COM3 Output — — — LC0 LC2 ...
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Pin I/O Circuits The I/O circuits for the µ PD75P3116’s pins are shown in abbreviated form below. Type P-ch IN N-ch CMOS standard input buffer Type B IN Schmitt-triggered input with hysteresis characteristics. Type B-C V ...
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Type F-B P.U.R. enable Output V disable (P) Data Output disable Output disable (N) P.U.R. : Pull-Up Resistor Type G-A P-ch V LC0 N-ch P-ch V LC1 N-ch P-ch SEG data P-ch V LC2 N-ch N-ch Type G-B P-ch V ...
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Recommended Connection of Unused Pins Table 3-1. List of Unused Pin Connections Pin P00/INT4 P01/SCK P02/SO/SB0 P03/SI/SB1 P10/INT0 and P11/INT1 P12/TI1/TI2/INT2 P13/TI0 P20/PTO0 P21/PTO1 P22/PTO2/PCL P23/BUZ P30/LCDCL/MD0 P31/SYNC/MD1 P32/MD2 P33/MD3 P50/D4 to P53/D7 P60/KR0/D0 to P63/KR3/ S15 ...
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Mk I AND Mk II MODE SELECTION FUNCTION Setting the stack bank selection (SBS) register for the µ PD75P3116 enables the program memory to be switched between the Mk I mode and Mk II mode. This function is applicable ...
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Setting of Stack Bank Selection (SBS) Register Use the stack bank selection register to switch between the Mk I mode and Mk II mode. Figure 4-1 shows the format of the stack bank selection register. The stack bank selection ...
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DIFFERENCES BETWEEN µ PD75P3116 AND µ PD753104, 753106, 753108 The µ PD75P3116 replaces the internal mask ROM in the µ PD753104, 753106, and 753108 with a one-time PROM and features expanded ROM capacity. The µ PD75P3116’ mode ...
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MEMORY CONFIGURATION 0000H MBE RBE Internal reset start address (higher 6 bits) Internal reset start address (lower 8 bits) 0002H MBE RBE INTBT/INT4 start address (higher 6 bits) INTBT/INT4 start address (lower 8 bits) 0004H MBE ...
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General-purpose register area Note Stack area Data area static RAM (512 × 4) Display data memory Peripheral hardware area Note Memory bank can be selected as the stack area. 18 Figure 6-2. Data Memory Map Data memory ...
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INSTRUCTION SET (1) Representation and coding formats for operands In the instruction’s operand area, use the following coding format to describe operands corresponding to the instruction’s operand representations (for further details, refer to the RA75X Assembler Package Language User’s ...
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Operation conventions A: A register; 4-bit accumulator B: B register C: C register D: D register E: E register H: H register L: L register X: X register XA: Register pair (XA); 8-bit accumulator BC: Register pair (BC) DE: ...
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Description of symbols used in addressing area MB = MBE • MBS *1 MBS = MBE = (000H to 07FH (F80H to FFFH) *3 MBE ...
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Instruction Mnemonic Operand Group Transfer MOV A, #n4 reg1, #n4 XA, #n8 HL, #n8 rp2, #n8 A, @HL A, @HL+ A, @HL– A, @rpa1 XA, @HL @HL, A @HL mem XA, mem mem, A mem reg ...
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Instruction Mnemonic Operand Group Bit transfer MOV1 CY, fmem.bit CY, pmem.@L CY, @H+mem.bit fmem.bit, CY pmem.@L, CY @H+mem.bit, CY Arithmetic ADDS A, #n4 XA, #n8 A, @HL XA, rp’ rp’1, XA ADDC A, @HL XA, rp’ rp’1, XA SUBS A, ...
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Instruction Mnemonic Operand Group Comparison SKE reg, #n4 @HL, #n4 A, @HL XA, @HL A, reg XA, rp’ Carry flag SET1 CY manipulation CLR1 CY SKT CY NOT1 CY Memory bit SET1 mem.bit manipulation fmem.bit pmem.@L @H+mem.bit CLR1 mem.bit fmem.bit ...
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Instruction Mnemonic Operand Group Branch BR Note 1 addr addr1 !addr $addr $addr1 PCDE PCXA BCDE BCXA BRA Note 1 !addr1 BRCB !caddr Notes 1. The sections in double boxes are only supported in the Mk II mode. The other ...
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Instruction Mnemonic Operand Group Subroutine CALLA Note !addr1 stack control CALL Note !addr CALLF Note !faddr RET Note RETS Note RETI Note Note The sections in double boxes are only supported in the Mk II mode. The other sections are ...
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Instruction Mnemonic Operand Group Subroutine PUSH rp stack control BS POP rp BS Interrupt EI control IE××× DI IE××× Note 1 I PORTn XA, PORTn OUT Note 1 PORTn, A PORTn, XA CPU control HALT STOP NOP Special ...
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ONE-TIME PROM (PROGRAM MEMORY) WRITE AND VERIFY The program memory contained in the µ PD75P3116 is a 16384 × 8-bit one-time PROM that can be electrically written one time only. The pins listed in the table below are used ...
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Program Memory Write Procedure Program memory can be written at high speed using the following procedure. (1) Pull down unused pins to Vss via resistors. Set the X1 pin to low. (2) Supply the V and ...
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Program Memory Read Procedure The µ PD75P3116 can read program memory contents using the following procedure. (1) Pull down unused pins to V via resistors. Set the X1 pin to low. SS (2) Supply the V ...
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One-Time PROM Screening Due to its structure, the one-time PROM cannot be fully tested before shipment by NEC Electronics. Therefore, NEC Electronics recommends that after the required data is written and the PROM is stored under the temperature and ...
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ELECTRICAL SPECIFICATIONS Absolute Maximum Ratings (T = 25˚C) A Parameter Symbol Power supply voltage V DD PROM power supply V PP voltage Input voltage V Except port Port 5 (N-ch open drain) I2 Output voltage V ...
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Main System Clock Oscillator Characteristics (T Resonator Recommended Constant Ceramic X1 X2 resonator Crystal X2 X1 resonator External X1 X2 clock Notes 1. Indicates only oscillator characteristics. Refer to AC Characteristics for ...
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Subsystem Clock Oscillator Characteristics (T Resonator Recommended Constant Crystal XT2 XT1 R resonator External XT1 XT2 clock Notes 1. Indicates only oscillator characteristics. Refer to AC Characteristics for instruction execution time. 2. The oscillation stabilization time ...
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DC Characteristics (T = –40 to +85˚ Parameter Symbol Output current, low I Per pin OL Total of all pins Input voltage, high V Ports and 9 IH1 V Ports RESET IH2 ...
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DC Characteristics (T = –40 to +85˚ Parameter Symbol LCD drive voltage V VAC0 = 0 LCD VAC0 = 1 VAC current Note 1 I VAC0 = 1, V VAC lo = ±1.0 µ A LCD output voltage ...
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AC Characteristics (T = –40 to +85˚ Parameter Symbol CPU clock cycle t Operating on CY Note 1 time main system clock (Min. instruction execution Operating on subsystem clock time = 1 machine cycle) TI0, TI1, TI2 input ...
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Serial Transfer Operation 2-wire and 3-wire serial I/O mode (SCK...Internal clock output): (T Parameter Symbol SCK cycle time 2.7 to 5.5 V KCY1 1 SCK high-/low-level ...
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SBI mode (SCK...Internal clock output (master)): (T Parameter Symbol SCK cycle time 2.7 to 5.5 V KCY3 1 SCK high-/low-level 2.7 to 5.5 V KL3 ...
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AC Timing Test Points (Excluding X1, XT1 Input Clock Timing X1 input XT1 input TI0, TI1, TI2 Timing TI0, TI1, TI2 40 (MIN.) V (MIN.) IH (MAX.) V (MAX.) IL (MIN.) V ...
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Serial Transfer Timing 3-wire serial I/O mode SCK SI t KSO1 2-wire serial I/O mode SCK SB0 KCY1 KL1, 2 KH1 SIK1, 2 KSI1, 2 Input data Output data t ...
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Serial Transfer Timing Bus release signal transfer SCK t t KSB SBL SB0, 1 Command signal transfer SCK t KSB SB0, 1 Interrupt input timing INT0 KR0 to 7 RESET input timing RESET 42 t KCY3, 4 ...
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Data Memory Stop Mode Low Supply Voltage Data Retention Characteristics (T Parameter Symbol Release signal set time t SREL Oscillation stabilization t Release by RESET WAIT wait time Note 1 Release by interrupt request Notes 1. The oscillation stabilization wait ...
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Data Retention Timing (STOP Mode Release by RESET STOP instruction execution RESET Data Retention Timing (Standby Release Signal: STOP Mode Release by Interrupt Signal STOP instruction execution Standby release signal (Interrupt request) 44 Internal reset operation ...
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DC Programming Characteristics (T Parameter Symbol Input voltage, high V IH1 V IH2 Input voltage, low V IL1 V IL2 Input leakage current I LI Output voltage, high V OH Output voltage, low power supply current I ...
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Program Memory Write Timing t VPS VDS D0/P60 to D3/P60 Data input D4/P50 to D7/P53 MD0/P30 t PW ...
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CHARACTERISTIC CURVES (REFERENCE VALUES 5.0 1.0 0.5 0.1 0.05 0.01 0.005 0.001 0 1 (Main System Clock: 6.0 MHz Crystal Resonator Crystal resonator 6.0 MHz ...
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5.0 1.0 0.5 0.1 0.05 0.01 0.005 0.001 (Main System Clock: 4.19 MHz Crystal Resonator) DD PCC = 0011 PCC = 0010 PCC = 0001 PCC = 0000 Main system clock ...
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PACKAGE DRAWINGS 64-PIN PLASTIC QFP (14x14 NOTE Each lead centerline is located within 0. its true position (T.P.) at maximum material condition ...
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PLASTIC LQFP (12x12 NOTE Each lead centerline is located within 0. its true position (T.P.) at maximum material condition ...
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PLASTIC LQFP (14x14 NOTE Each lead centerline is located within 0. its true position (T.P.) at maximum material condition ...
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RECOMMENDED SOLDERING CONDITIONS The µ PD75P3116 should be soldered and mounted under the following recommended conditions. For technical information, see the following website. Semiconductor Device Mount Manual (http://www.necel.com/pkg/en/mount/index.html) Table 12-1. Surface Mounting Type Soldering Conditions (1/2) (1) µ PD75P3116GC-AB8: ...
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Table 12-1. Surface Mounting Type Soldering Conditions (2/2) (3) µ PD75P3116GC-8BS: 64-pin plastic LQFP (14 × 14) Soldering Method Infrared reflow Package peak temperature: 235°C, Time: 30 seconds max. (at 210°C or higher), Count: Twice or less VPS Package peak ...
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Table 12-1. Surface Mounting Type Soldering Conditions (2/2) (3) µ PD75P3116GC-8BS: 64-pin plastic LQFP (14 × 14) Soldering Method Infrared reflow Package peak temperature: 235°C, Time: 30 seconds max. (at 210°C or higher), Count: Twice or less VPS Package peak ...
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APPENDIX A. LIST OF µ PD75308B, 753108, AND 75P3116 FUNCTIONS Parameter Program memory Mask ROM 0000H to 1F7FH (8064 × 8 bits) Data memory CPU 75X Standard 0.95, 1.91, 15.3 µ s Instruction When main system execution clock is selected ...
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Parameter Φ, 524, 262, 65.5 kHz Clock output (PCL) (Main system clock: during 4.19 MHz operation) • Φ, 750, 375, 93.8 kHz BUZ output (BUZ) 2 kHz (Main system clock: during 4.19 MHz operation) Serial interface 3 modes are available ...
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APPENDIX B. DEVELOPMENT TOOLS The following development tools have been provided for system development using the µ PD75P3116. In the 75XL Series, a common relocatable assembler is used in combination with a device file dedicated to each model. RA75X relocatable ...
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PROM Write Tools Hardware PG-1500 This is a PROM writer that can program a single-chip microcontroller with PROM in stand-alone mode or under the control of a host machine when connected with the supplied accessory board and optional programmer adapter. ...
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Debugging Tools An in-circuit emulator (IE-75001-R) is provided as a program debugging tool for the µ PD75P3116. The system configuration using this in-circuit emulator is shown below. Hardware IE-75001-R The IE-75001 in-circuit emulator to be used for hardware ...
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OS for IBM PCs The following operating systems for IBM PCs are supported. OS Version TM PC DOS Ver.3.1 to 6.3 J6.1/V Note to J6.3/V Note MS-DOS Ver.5.0 to 6.2 5.0/V Note to 6.2/V Note TM Note IBM DOS J5.02/V ...
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Package Drawing and Recommended Footprint of Conversion Socket (EV-9200GC-64) Figure B-1. EV-9200GC-64 Package Drawing (For Reference Only EV-9200GC-64 1 No.1 pin index EV-9200GC-64-G0E ITEM MILLIMETERS A 18.8 B 14.1 ...
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Figure B-2. EV-9200GC-64 Recommended Footprint (For Reference Only) ITEM MILLIMETERS A 19.5 B 14.8 0.8 ± 0.02 × 15=12.0 ± 0.05 C 0.8 ± 0.02 × 15=12.0 ± 0. 14.8 F 19.5 6.00 ± 0.08 G 6.00 ± ...
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Package Drawing of Conversion Adapter (TGK-064SBW) Figure B-3. TGK-064SBW Package Drawing (For Reference Only ITEM ...
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Notes on Target System Design The following shows a diagram of the connection conditions between the emulation probe, conversion connector and conversion socket or conversion adapter. Design your system making allowances for conditions such as the form of parts mounted ...
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Figure B-6. Connection Conditions of Target System (1) In-circuit emulator IE-75001-R External sense clips Conversion socket EV-9200GC-64 Figure B-7. Connection Conditions of Target System (2) In-circuit emulator IE-75001-R External sense clips Ground clip 35 mm 18.5 mm Target system Ground ...
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APPENDIX C. RELATED DOCUMENTS The related documents indicated in this publication may include preliminary versions. However, preliminary versions are not marked as such. Documents Related to Devices Document Name µ PD753104, 753106, 753108 Data Sheet µ PD75P3116 Data Sheet µ ...
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Other Related Documents Document Name SEMICONDUCTOR SELECTION GUIDE – Products & Packages – Semiconductor Device Mounting Technology Manual Quality Grades on NEC Semiconductor Devices NEC Semiconductor Device Reliability/Quality Control System Guide to Prevent Damage for Semiconductor Devices by Electrostatic Discharge ...
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VOLTAGE APPLICATION WAVEFORM AT INPUT PIN Waveform distortion due to input noise or a reflected wave may cause malfunction. If the input of the CMOS device stays in the area between V malfunction. Take care to prevent chattering noise ...
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Regional Information Some information contained in this document may vary from country to country. Before using any NEC Electronics product in your application, pIease contact the NEC Electronics office in your country to obtain a list of authorized representatives and ...
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QTOP is a trademark of NEC Electronics Corporation. MS-DOS is either a registered trademark or a trademark of Microsoft Corporation in the United States and/or other countries. IBM DOS, PC/AT, and PC DOS are trademarks of International Business Machines Corporation. ...