MB15C02 Fujitsu, MB15C02 Datasheet
MB15C02
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MB15C02 Summary of contents
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... On-Chip prescaler MB15C02 DESCRIPTION The Fujitsu MB15C02 is a serial input Phase Locked Loop (PLL) frequency synthesizer with a prescaler. A 64/65 division is available for the prescaler that enables pulse swallow operation. This operates with a supply voltage of 1.0 V (min.). MB15C02 is suitable for mobile communications, such as paging systems. ...
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... MB15C02 PIN ASSIGNMENTS SSOP-20 pin SSOP-16 pin OSC Clock Data OSC 4 17 OUT Top LE TEST 16 5 View fin (FPT-20P-M03 Clock OSC OSC ...
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... R = “L” level “L” level “L” level High impedance fr < “H” level High impedance When FC = “H” fr > “H” level High impedance “L” level High impedance fr < “L” level “L” level MB15C02 (Continued) 3 ...
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... MB15C02 (Continued) Pin no. Pin I/O SSOP SSOP name OSC O OUT – – OSC – Descriptions Oscillator output. Connection for an external crystal. No connection Programmable reference divider input. Oscillator input. Clock can be input to OSC from outside. In the case, please leave OSC ...
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... Binary 14-bit reference counter 14 14-bit latch fr comparator fp 14 18-bit shift register 18 18-bit latch 6 12 Binary 6-bit Binary 12-bit swallow programma- counter ble counter Control circuit MB15C02 Crystal oscillator V SS circuit OSC IN OSC OUT Phase TEST FC Output P control circuit Output control R circuit ...
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... MB15C02 ABSOLUTE MAXIMUM RATINGS Parameter Power supply voltage Input voltage Output voltage Output current Storage temperature WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings. RECOMMENDED OPERATING CONDITIONS Parameter Symbol ...
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... GND to V OFF1 OUT OFF2 OUT DD and TEST are grounded, Outputs are opened. IN and Vp at operating state under conditions Supply current (P .20). DD and TEST are grounded, Outputs are opened. IN MB15C02 Value Unit Min. Typ. *3 Max. *4 – 0.6 1.2 – 1.0 1.8 mA – 1.3 2.2 – ...
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... Consequently , the output frequency from the VCO (f Applying the intermittent operation by alternating the active and power saving modes, and also forcing the phases of fr and fp to synchronize when it switches from stand by to active modes, the MB15C02 can keep the power dissipation of its entire circuitry to the minimum. ...
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... Prescaler : M = 64, M+1=65 Swallow counter : Programmable counter : 4095 The MB15C02 uses the pulse swallow method; consequently, the divide rations of the swallow and programmable counters must satisfy the relationship N>A. The total divide ratio of the programmable divider is calculated as follows: Total divide ratio = ( When N is set within 5< ...
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... MB15C02 (b) Charge pump The charge pump is available in two forms: internal external. Internal charge pump output (Do) External charge pump outputs ( R, P) (c) Phase comparator input/output waveforms The phase comparator outputs logic levels summarized in Table 1, according to the phase error between fr and fp. Note that Nch open drain output. The pulse width of the phase comparator outputs are identical and equal to the phase error between fr and fp as shown in Figure 1 ...
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... The lock detector detects the lock and unlock states of the PLL. The lock detector outputs “H” when the PLL enters the lock state and outputs “L” when the PLL enters the unlock state as shown in Figure 2. When PS = “L”, the lock detector outputs “H” compulsorily Figure 2. Phase comparator input/output waveforms (Lock detector) MB15C02 11 ...
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... MB15C02 4. Setting the Divide Ratio (1) Serial data format The format of the serial data is shown is Figure 3. The serial data is composed of a control bit and divide ratio setting data. The control bit selects the programmable divider or programmable reference divider. In case of the programmable divider, serial data consists of 18 bits(6 bits for the swallow counter and 12 bits for the programmable counter) and 1 control bit as shown in Figure 3 ...
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... Figure 4. The flow of serial data Table2.2 Programmable counter divider N Divide ratio ( 4095 MB15C02 Programmable reference divider 12 Programmable divider * : Control register ...
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... When more bits of serial data than defined for the target divider are received, only the last valid serial data bits are effective. To set the divide ratio for the MB15C02 dividers necessary to supply the Data, Clock, and LE signals at the timing shown in Figure 5. ...
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... Since the divide rations are unpredictable when the MB15C02 is turned on necessary to initialize the divide ratio for both dividers at power-on time. As shown in Figure 6, after setting the divide ratio for one of the dividers (e.g., programmable reference divider), set LE to “H” level before setting the divide ratio for the other dividers (e.g., programmable divider) ...
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... MB15C02 TYPICAL CHARACTERISTICS 1. fin Input Sensitivity 20.0 10.0 0.0 10.0 20.0 30.0 40.0 50.0 60.0 0 100 2. OSC Input Sensitivity IN 20.0 10.0 0.0 10.0 20.0 30.0 40.0 50.0 60 fin input frequency vs. Input sensitivity 200 300 400 500 600 700 fin input frequency (MHz) OSC input frequency vs. Input sensitivity IN 100 150 200 250 300 350 OSC input frequency (MHz) ...
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... OSC Power Supply Voltage IN 500 Vfin = 2.0 (dBm) 450 400 350 300 250 200 150 100 50 0 0.9 1.0 Power supply voltage vs. fin input frequency 1.1 1.2 1.3 1.4 1.5 Power supply voltage (V) Power supply voltage vs. OSC input frequency IN 1.1 1.2 1.3 1.4 1.5 Power supply voltage (V) MB15C02 Ta = +25 C 1.6 1.7 1 +25 C 1.6 1.7 1.8 17 ...
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... MB15C02 5. I Power Supply Current DD 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 Input frequency vs. power supply current 100 200 300 400 500 600 700 Input frequency (MHz + 800 900 1000 ...
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... Do (Charge Pump) Power Supply Voltage 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 0.8 0.9 1.0 –5.0 –4.5 –4.0 –3.5 –3.0 –2.5 –2.0 –1.5 –1.0 –0.5 0.0 0.8 0 1.1 1.2 1.3 1.4 1 – 0 1.1 1.2 1.3 1.4 1.5 V (V) DD MB15C02 Ta = +25 C 1.6 1.7 1 +25 C 1.6 1.7 1.8 19 ...
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... MB15C02 7. Spectrum Wave Form ATTEN dBm MKR 25.0 kHz D 85. CENTER 286.0000 MHz *RBW 1.0 kHz ATTEN dBm MKR 800 Hz D 53. CENTER 286.00000 MHz *RBW 100 Hz • Test circuit D O 6800 pF 20 UAUG 16 MKR 85.50 dB 10dB/ 25.0 kHz SPAN 200.0 kHz VBW 1 ...
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... 286.0 MHz MKr 290.0050 MHz 2.00 kHz/div 289.9950 MHz 286.0 MHz, within 1 kHz 4. 3.99999984 ms A euts N 4.00100 MHz 0 s 10.0000000 ms 290.0 MHz, within 1 kHz 6. 6.19999943 ms A euts N 4.00082 MHz 0 s 10.0000000 ms MB15C02 (Continued) 21 ...
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... Cover workbenches with grounded conductive mats. • Always turn the power supply off before inserting or removing the device from its socket. • Protect leads with a conductive sheet when handling or transporting PC boards with devices. ORDERING INFORMATION Parts number MB15C02PFV1 MB15C02PFV2 22 286.0 MHz, within 1 kHz 2. 1.99999978 ms ...
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... NOM "A" +0.05 0.15 –0.02 +.002 .006 –.001 MB15C02 (Mounting height) Details of "A" part 0.10±0.10(.004±.004) (STAND OFF) 0 10° 0.50±0.20 (.020±.008) Dimensions in mm (inches) (Continued) 23 ...
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... MB15C02 (Continued) 20 pins, Plastic SSOP (FPT-20P-M03) * 6.50±0.10(.256±.004) INDEX 0.65±0.12 (.0256±.0047) 5.85(.230)REF 1994 FUJITSU LIMITED F20012S-2C These dimensions do not include resin protrusion. +0.20 1.25 –0.10 +.008 .049 –.004 * 4.40±0.10 6.40±0.20 5.40(.213) (.173±.004) (.252±.008) NOM " ...
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... Tel: (65) 281-0770 Fax: (65) 281-0220 http://www.fmap.com.sg/ F9902 FUJITSU LIMITED Printed in Japan MB15C02 All Rights Reserved. The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before ordering. The information and circuit diagrams in this document are presented as examples of semiconductor device applications, and are not intended to be incorporated in devices for actual use ...