UPD75P3036GC-3B9 Renesas Electronics Corporation., UPD75P3036GC-3B9 Datasheet
UPD75P3036GC-3B9
Related parts for UPD75P3036GC-3B9
UPD75P3036GC-3B9 Summary of contents
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SINGLE-CHIP MICROCONTROLLER The µ PD75P3036 replaces the µ PD753036’s internal mask ROM with a one-time PROM or EPROM. Because the µ PD75P3036 supports programming by users suitable for use in prototype testing for system development using the ...
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ORDERING INFORMATION Part Number µ PD75P3036GC-3B9 80-pin plastic QFP (14 × 14 mm, 0.65-mm pitch) µ PD75P3036GC-3B9-A 80-pin plastic QFP (14 × 14 mm, 0.65-mm pitch) µ PD75P3036GK-BE9 80-pin plastic TQFP (fine pitch) (12 × 12 mm, 0.5-mm pitch) µ ...
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Functional Outline Parameter • 0.95, 1.91, 3.81, 15.3 µ s (main system clock: during 4.19-MHz operation) Instruction execution time • 0.67, 1.33, 2.67, 10.7 µ s (main system clock: during 6.0-MHz operation) • 122 µ s (subsystem clock: during 32.768-kHz ...
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PIN CONFIGURATION (Top View) ............................................................................................... 5 2. BLOCK DIAGRAM ......................................................................................................................... 7 3. PIN FUNCTIONS ............................................................................................................................ 8 3.1 Port Pins ................................................................................................................................................ 8 3.2 Non-port Pins ........................................................................................................................................ 10 3.3 Pin Input/Output Circuits ...................................................................................................................... 12 3.4 Recommended Connection of Unused Pins ...................................................................................... ...
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PIN CONFIGURATION (Top View) • 80-pin plastic QFP (14 × 14 mm) µ PD75P3036GC-3B9 µ PD75P3036GC-3B9-A • 80-pin plastic TQFP (fine pitch) (12 × 12 mm) µ PD75P3036GK-BE9 µ PD75P3036GK-BE9-A • 80-pin ceramic WQFN µ PD75P3036KK ...
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PIN IDENTIFICATIONS P00 to P03 : Port0 P10 to P13 : Port1 P20 to P23 : Port2 P30 to P33 : Port3 P40 to P43 : Port4 P50 to P53 : Port5 P60 to P63 : Port6 P70 to P73 ...
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BLOCK DIAGRAM 8-BIT TI0/P13 TIMER/EVENT PTO0/P20 COUNTER #0 INTT0 TOUT0 AN0-AN5 AN6/P82 8 A/D AN7/P83 CONVERTER AV REF AV SS BASIC INTERVAL TIMER/ WATCHDOG TIMER INTBT INTT1 TI1/P80 8-BIT CASCADED TIMER/EVENT PTO1/P21 16-BIT COUNTER #1 TIMER/ 8-BIT TI2/P81 EVENT ...
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PIN FUNCTIONS 3.1 Port Pins (1/2) Pin name I/O Alternate function P00 Input INT4 P01 I/O SCK P02 I/O SO/SB0 P03 I/O SI/SB1 P10 Input INT0 P11 INT1 P12 INT2 P13 TI0 P20 I/O PTO0 P21 PTO1 P22 PCL/PTO2 ...
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Port Pins (2/2) Pin name I/O Alternate function P60 I/O KR0 P61 KR1 P62 KR2 P63 KR3 P70 I/O KR4 P71 KR5 P72 KR6 P73 KR7 P80 I/O TI1 P81 TI2 P82 AN6 P83 AN7 BP0 Output S24 BP1 ...
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Non-port Pins (1/2) Pin name I/O Alternate function TI0 Input P13 TI1 P80 TI2 P81 PTO0 Output P20 PTO1 P21 PTO2 P22/PCL PCL Output P22/PTO2 BUZ Output P23 SCK I/O P01 SO/SB0 I/O P02 SI/SB1 I/O P03 INT4 Input ...
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Non-port Pins (2/2) Pin name I/O Alternate function S12 to S23 Output — S24 to S31 Output BP0 to BP7 COM0 to COM3 Output — — — LC0 LC2 BIAS Output — Note 2 LCDCL Output ...
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Pin Input/Output Circuits The input/output circuits for the µ PD75P3036’s pins are shown in schematic form below. TYPE P-ch IN N-ch CMOS standard input buffer TYPE B IN Schmitt trigger input with hysteresis characteristics. TYPE B-C ...
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TYPE F P.U.R. enable data Type D output disable Type B P.U.R. : Pull-Up Resistor TYPE F-B P.U.R. enable output V DD disable (P) P-ch data output N-ch disable output disable (N) P.U.R. : Pull-Up Resistor TYPE G-A ...
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TYPE M-E data N-ch (+13 V output withstand disable V voltage) DD input P-ch instruction Note P.U.R. Voltage limitation circuit Note The pull-up resistor operates only when an input instruction is executed (current flows from V the pin when the ...
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Recommended Connection of Unused Pins Pin P00/INT4 Connect to V P01/SCK Connect to V P02/SO/SB0 P03/SI/SB1 Connect to V P10/INT0 to P12/INT2 Connect to V P13/TI0 P20/PTO0 Input status : connect to V P21/PTO1 Output status: open P22/PTO2/PCL P23/BUZ ...
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Mk I MODE AND Mk II MODE SELECTION FUNCTION Setting a stack bank selection (SBS) register for the µ PD75P3036 enables the program memory to be switched between Mk I mode and Mk II mode. This function is applicable ...
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Setting of Stack Bank Selection Register (SBS) Use the stack bank selection register to switch between Mk I mode and Mk II mode. Figure 4-1 shows the format for doing this. The stack bank selection register is set using ...
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DIFFERENCES BETWEEN µ PD75P3036 AND µ PD753036 The µ PD75P3036 replaces the internal mask ROM in the program memory of the µ PD753036 with a one-time PROM or EPROM. The µ PD75P3036’ mode supports the Mk I ...
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PROGRAM COUNTER (PC) AND MEMORY MAP 6.1 Program Counter (PC) ... 14 bits This is a 14-bit binary counter that stores program memory address data. Figure 6-1. Configuration of Program Counter PC13 PC12 PC11 PC10 PC9 6.2 Program Memory ...
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Figure 6-2 shows the addressing ranges for the program memory, branch instruction and the subroutine call instruction 0000H MBE RBE Internal reset start address (upper 6 bits) Internal reset start address (lower 8 bits) 0002H MBE RBE ...
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Data Memory (RAM) ... 768 x 4 bits Figure 6-3 shows the data memory configuration. Data memory consists of a data area and a peripheral hardware area. The data area consists of 768 x 4-bit static RAM. General-purpose register ...
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INSTRUCTION SET (1) Representation and coding formats for operands In the instruction’s operand area, use the following coding format to describe operands corresponding to the instruction’s operand representations (for further description, see the RA75X Assembler Package User’s Manual—Language (EEU-1363)). ...
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Operation legend register; 4-bit accumulator register register register register register register register XA : Register ...
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Description of symbols used in addressing area MB = MBE • MBS *1 MBS = 0- MBE = (000H-07FH (F80H-FFFH) *3 MBE = ...
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Instruction Mnemonic Operand group Transfer MOV A, #n4 reg1, #n4 XA, #n8 HL, #n8 rp2, #n8 A, @HL A, @HL+ A, @HL– A, @rpa1 XA, @HL @HL, A @HL mem XA, mem mem, A mem reg1 ...
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Instruction Mnemonic Operand group Bit transfer MOV1 CY, fmem.bit CY, pmem.@L CY, @H+mem.bit fmem.bit, CY pmem.@L, CY @H+mem.bit, CY Arithmetic/ ADDS A, #n4 logical XA, #n8 operation A, @HL XA, rp’ rp’1, XA ADDC A, @HL XA, rp’ rp’1, XA ...
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Instruction Mnemonic Operand group Comparison SKE reg, #n4 @HL, #n4 A, @HL XA, @HL A, reg XA, rp’ Carry flag SET1 CY manipulation CLR1 CY SKT CY NOT1 CY Memory bit SET1 mem.bit manipulation fmem.bit pmem.@L @H+mem.bit CLR1 mem.bit fmem.bit ...
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Instruction Mnemonic Operand group Note 1 Branch BR addr addr1 !addr $addr $addr1 PCDE PCXA BCDE BCXA BRA Note 1 !addr1 BRCB !caddr Notes 1. The above operations in the double boxes can be performed only in the Mk II ...
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Instruction Mnemonic Operand group Subroutine CALLA Note !addr1 stack control CALL Note !addr CALLF Note !faddr Note RET Note RETS RETI Note Note The above operations in the double boxes can be performed only in the Mk II mode. The ...
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Instruction Mnemonic Operand group Subroutine PUSH rp stack control BS POP rp BS Interrupt EI control IEXXX DI IEXXX I/O IN Note 1 A, PORTn XA, PORTn Note 1 OUT PORTn, A PORTn, XA CPU control HALT STOP NOP Special ...
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PROM (PROGRAM MEMORY) WRITE AND VERIFY The µ PD75P3036 contains a 16384 x 8-bit PROM as a program memory. The pins listed in the table below are used for this PROM’s write/verify operations. Clock input from the X1 pin ...
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Program Memory Write Procedure Program memory can be written at high speed using the following procedure. (1) Pull unused pins to V through resistors. Set the X1 pin low. SS (2) Supply the V and V ...
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Program Memory Read Procedure The µ PD75P3036 can read program memory contents using the following procedure. (1) Pull unused pins to V through resistors. Set the X1 pin low. SS (2) Supply the V and V ...
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PROGRAM ERASURE ( µ PD75P3036KK-T ONLY) The µ PD75P3036KK-T is capable of erasing (FFH) the data written in a program memory and rewriting. To erase the programmed data, expose the erasure window to light having a wavelength shorter than ...
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ELECTRICAL SPECIFICATIONS Absolute Maximum Ratings ( Parameter Symbol Supply voltage V DD PROM supply voltage V PP Input voltage V Other than ports Ports Output voltage V O High-level ...
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Main System Clock Oscillation Circuit Characteristics (T Recommended Resonator Constants Ceramic resonator Crystal resonator External clock X1 X2 Notes 1. The oscillation frequency and X1 input frequency shown ...
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Subsystem Clock Oscillation Circuit Characteristics (T Recommended Resonator Constants Crystal resonator XT1 XT2 External clock XT1 XT2 Notes 1. The oscillation frequency shown above indicate characteristics of the oscillation circuit only. For the instruction execution ...
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DC Characteristics (T = –40 to +85 A Parameter Symbol Low-level output I Per pin OL current Total of all pins High-level input V Ports 2, 3, P82, P83 IH1 voltage V Ports P80, P81, IH2 ...
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DC Characteristics (T = –40 to +85 A Parameter Symbol LCD drive voltage V VAC0 = 0 LCD VAC0 = 1 Note 1 VAC current I VAC0 = 1, V VAC = ±1.0 µ A LCD output voltage V I ...
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AC Characteristics (T = –40 to +85 A Parameter Symbol Note 1 CPU clock cycle time t CY (minimum instruction execution time = 1 machine cycle) TI0, TI1, TI2 input frequency f TI TI0, TI1, TI2 high-, low-level t , ...
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Serial transfer operation 2-wire and 3-wire serial I/O modes (SCK ··· internal clock output): (T Parameter Symbol SCK cycle time t KCY1 SCK high-, low-level widths t , KL1 t KH1 setup time (to SCK ↑) Note ...
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SBI mode (SCK ··· internal clock output (master)): (T Parameter Symbol SCK cycle time t KCY3 SCK high-, low-level widths t , KL3 t KH3 SB0, 1 setup time t SIK3 (to SCK ↑) SB0, 1 hold time (from SCK ...
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A/D Converter Characteristics (T = –40 to +85 A Parameter Symbol Resolution Absolute accuracy Note 1 Conversion time t CONV Sampling time t SAMP Analog input voltage V IAN Analog input impedance current I REF REF Notes ...
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AC timing test points (except X1 and XT1 inputs) V (MIN (MAX (MIN (MAX.) OL Clock timing X1 input XT1 input TI0, TI1, TI2 timing TI0, TI1, TI2 44 V (MIN (MAX.) ...
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Serial transfer timing 3-wire serial I/O mode SCK SI t KSO1 2-wire serial I/O mode t SCK SB0 KSO1 KCY1 KL1, 2 KH1 SIK1, 2 KSI1, 2 Input ...
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Serial transfer timing Bus release signal transfer SCK t t KSB SBL SB0, 1 Command signal transfer SCK t KSB SB0, 1 Interrupt input timing INT0 KR0-7 RESET input timing RESET 46 t KCY3 ...
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Data retention characteristics of data memory in STOP mode and at low supply voltage ° – Parameter Symbol Release signal setup time t SREL Oscillation stabilization t WAIT Note 1 wait time Notes 1. ...
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DC Programming Characteristics (T Parameter Symbol High-level input voltage V Except X1, X2 IH1 V X1, X2 IH2 Low-level input voltage V Except X1, X2 IL1 V X1, X2 IL2 Input leakage current High-level ...
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Program Memory Write Timing t VPS VDS D0/P40-D3/P43 Data Input D4/P50-D7/P53 MD0 t PW MD1 PCR ...
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CHARACTERISTIC CURVES (FOR REFERENCE ONLY) I vs. V (main system clock: 6.0-MHz crystal resonator 5.0 1.0 0.5 0.1 0.05 0.01 0.005 0.001 PCC = 0011 PCC = 0010 PCC = 0001 PCC ...
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I vs. V (main system clock: 4.19-MHz crystal resonator 5.0 1.0 0.5 0.1 0.05 0.01 0.005 0.001 Data Sheet U11575EJ1V1DS PCC = 0011 PCC = 0010 PCC = 0001 PCC = 0000 Main ...
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PACKAGE DRAWINGS 80-PIN PLASTIC QFP (14x14 NOTE Each lead centerline is located within 0. its true position (T.P.) at maximum material condition ...
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PIN PLASTIC TQFP (FINE PITCH) (12x12 NOTE Each lead centerline is located within 0. its true position (T.P.) at maximum material condition ...
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PIN CERAMIC WQFN NOTE Each lead centerline is located within 0.06 mm (0.003 inch) of its true position (T.P.) at maximum material condition ITEM MILLIMETERS 14.0 ± 0 13.6 ...
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RECOMMENDED SOLDERING CONDITIONS The µ PD75P3036 should be soldered and mounted under the following recommended conditions. For technical information, see the following website. Semiconductor Device Mount Manual (http://www.necel.com/pkg/en/mount/index.html) Table 15-1. Surface Mounting Type Soldering Conditions (1/2) (1) µ PD75P3036GC-3B9: ...
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Table 15-1. Surface Mounting Type Soldering Conditions (2/2) (3) µ PD75P3036GC-3B9-A: 80-pin plastic QFP (14 × 14 mm) Soldering Method Infrared reflow Package peak temperature: 260°C, Time: 60 seconds max. (at 220°C or higher), Count: Three times or less, Exposure ...
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APPENDIX A. FUNCTION LIST OF µ PD75336, 753036, AND 75P3036 ROM (bytes) 16256 Mask ROM RAM (x 4 bits) 768 mode selection function No Instruction set 75X High-End I/O ports Total 44 CMOS input 8 CMOS ...
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APPENDIX B. DEVELOPMENT TOOLS The following development tools have been provided for system development using the µ PD75P3036. Use the common relocatable assembler for the series together with the device file according to the model. RA75X relocatable assembler Host machine ...
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PROM Write Tools Hardware PG-1500 This is a PROM programmer that can program single-chip microcontroller with PROM in stand alone mode or under control of host machine when connected with supplied accessory board and optional programmer adapter. It can also ...
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Debugging Tools In-circuit emulators (IE-75000-R and IE-75001-R) are provided as program debugging tools for the µ PD75P3036. Various system configurations using these in-circuit emulators are listed below. Hardware IE-75000-R The IE-75000 in-circuit emulator to be used for hardware ...
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OS for IBM PCs The following operating systems for the IBM PC are supported. PC DOS MS-DOS IBM DOS Caution Ver. 5.0 or later includes a task swapping function, but this software is not able to use that function. OS ...
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APPENDIX C. RELATED DOCUMENTS The related documents indicated in this publication may include preliminary versions. However, preliminary versions are not marked as such. Documents Related to Device Document µ PD75P3036 Data Sheet µ PD753036 Data Sheet µ PD753036 User’s Manual ...
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NOTES FOR CMOS DEVICES 1 VOLTAGE APPLICATION WAVEFORM AT INPUT PIN Waveform distortion due to input noise or a reflected wave may cause malfunction. If the input of the CMOS device stays in the area between V malfunction. Take care ...
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Regional Information Some information contained in this document may vary from country to country. Before using any NEC Electronics product in your application, pIease contact the NEC Electronics office in your country to obtain a list of authorized representatives and ...
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MS-DOS is a trademark of Microsoft Corporation. IBM DOS, PC DOS, and PC/AT are trademarks of International Business Machines Corporation. These commodities, technology or software, must be exported in accordance with the export administration regulations of the exporting country. Diversion ...