PM7375-SC PMC-Sierra Inc, PM7375-SC Datasheet

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PM7375-SC

Manufacturer Part Number
PM7375-SC
Description
Local ATM segmentation and reassembly and physical layer interface
Manufacturer
PMC-Sierra Inc
Datasheet

Specifications of PM7375-SC

Case
QFP
Dc
99+
PM7375 LASAR-155
DATA SHEET
PMC-931127
ISSUE 6
LOCAL ATM SAR & PHYSICAL LAYER
PM7375
TM
L
ASAR-
155
LOCAL ATM SEGMENTATION AND
REASSEMBLY & PHYSICAL LAYER
INTERFACE
DATA SHEET
ISSUE 6: JUNE 1998
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

Related parts for PM7375-SC

PM7375-SC Summary of contents

Page 1

... DATA SHEET PMC-931127 LOCAL ATM SEGMENTATION AND REASSEMBLY & PHYSICAL LAYER PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 PM7375 TM L ASAR- 155 INTERFACE DATA SHEET ISSUE 6: JUNE 1998 PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER ...

Page 2

... June 1998 5 May 2, 1997 Rev 8 eng doc PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 Details of Change Data Sheet Reformatted — No Change in Technical Content. Generated R6 data sheet from PMC-931123, P8 PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER ...

Page 3

... RECEIVE LINE INTERFACE...........................................................................................42 9.1.1 CLOCK RECOVERY UNIT................................................................................42 9.1.2 SERIAL TO PARALLEL CONVERTER..............................................................43 9.2 RECEIVE FRAMER AND OVERHEAD PROCESSOR....................................................43 9.2.1 RECEIVE SECTION OVERHEAD PROCESSOR .............................................44 9.2.2 RECEIVE LINE OVERHEAD PROCESSOR.....................................................44 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER i ...

Page 4

... TRANSMIT TRANSMITTER AND OVERHEAD PROCESSOR.......................................55 9.10.1 TRANSMIT SECTION OVERHEAD PROCESSOR ..........................................55 9.10.2 TRANSMIT LINE OVERHEAD PROCESSOR ..................................................55 9.11 TRANSMIT PATH OVERHEAD PROCESSOR................................................................57 9.12 TRANSMIT LINE INTERFACE ........................................................................................58 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER ii ...

Page 5

... REGISTER 0X00 (0X000): LASAR-155 MASTER RESET / LOAD METERS.100 10.1.2 REGISTER 0X01 (0X004): LASAR-155 MASTER CONFIGURATION............102 10.1.3 REGISTER 0X02 (0X008): LASAR-155 MASTER INTERRUPT STATUS.......105 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER iii ...

Page 6

... REGISTER 0X20 (0X080): TLOP CONTROL .................................................132 10.1.24 REGISTER 0X21 (0X084): TLOP DIAGNOSTIC.............................................133 10.1.25 REGISTER 0X30 (0X0C0): RPOP STATUS/CONTROL..................................134 10.1.26 REGISTER 0X31 (0X0C4): RPOP INTERRUPT STATUS...............................135 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER iv ...

Page 7

... REGISTER 0X59 (0X164): RACP CONFIGURATION.....................................160 10.1.62 REGISTER 0X60 (0X180): TACP CONTROL/STATUS....................................162 10.1.63 REGISTER 0X61 (0X184): TACP IDLE/UNASSIGNED CELL HEADER PATTERN PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 ........................................................................................................................164 PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER v ...

Page 8

... REGISTER 0X7E (0X1F8): SAR PMON TRANSMIT OVERSIZE SDU ERRORS 10.1.83 MKT : HIDE REGISTER IN MKT DATASHEET ...............................................184 10.1.84 ENG : REGISTER 0X7F (0X1FC): SAR PMON TRANSMIT PDU COUNT .....184 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 ........................................................................................................................179 ........................................................................................................................183 PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER vi ...

Page 9

... COPS VPI 10.1.106REGISTER 0XA4 (0X290): COPS VCI............................................................222 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 ........................................................................................................................204 PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER (RX/TXB = 1, RX TABLE) ....219 (RX/TXB = 0, TX TABLE).....220 vii ...

Page 10

... REGISTER 0X30C: PCID MAILBOX / MICROPROCESSOR INTERRUPT STATUS / ENABLE..........................................................................................261 10.4.6 REGISTER 0X314: PCID RX PACKET DESCRIPTOR TABLE BASE .............263 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 ........................................................................................................................231 ........................................................................................................................243 PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER viii ...

Page 11

... REGISTER 0X354: PCID RX MANAGEMENT DESCRIPTOR REFERENCE FREE QUEUE WRITE ....................................................................................279 10.4.23 REGISTER 0X358: PCID RX MANAGEMENT DESCRIPTOR REFERENCE FREE QUEUE READ ......................................................................................280 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER ix ...

Page 12

... REGISTER 0X3A0: PCID TX DESCRIPTOR REFERENCE LOW PRIORITY READY QUEUE START ..................................................................................296 10.4.40 REGISTER 0X3A4: PCID TX DESCRIPTOR REFERENCE LOW PRIORITY READY QUEUE WRITE ..................................................................................297 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 ........................................................................................................................290 ........................................................................................................................291 PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER x ...

Page 13

... REGISTER......................................................................................................321 11.1.8 REGISTER 0X0C (0X30): EXPANSION ROM BASE ADDRESS ....................323 11.1.9 REGISTER 0X0F (0X3C): INTERRUPT LINES / INTERRUPT PINS / MIN_GNT / MAX_LAT ........................................................................................................324 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 ........................................................................................................................319 PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER xi ...

Page 14

... GFC AND DATA LINK ACCESS ....................................................................................365 14.2 MULTIPURPOSE PORT INTERFACE ...........................................................................367 14.3 PCI INTERFACE............................................................................................................371 15 ABSOLUTE MAXIMUM RATINGS ...............................................................................................382 16 CHARACTERISTICS ...................................................................................................................383 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER xii ...

Page 15

... DATA SHEET PMC-931127 17 MICROPROCESSOR INTERFACE TIMING CHARACTERISTICS .............................................386 18 LASAR-155 TIMING CHARACTERISTICS..................................................................................392 19 ORDERING AND THERMAL INFORMATION .............................................................................410 20 MECHANICAL INFORMATION....................................................................................................411 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER xiii ...

Page 16

... DATA SHEET PMC-931127 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER xiv ...

Page 17

... Provides a standard 5 signal P1149.1 JTAG test port for boundary scan board test purposes. • Low power, 0.6 micron, +5 Volt CMOS technology. • 208 copper slugged plastic quad flat pack (PQFP) package. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 1 ...

Page 18

... Broadband Switching Systems, TA-NWT-001248, Issue 2, October 1993. • American National Standard for Telecommunications - B-ISDN ATM Adaptation Layer Type 5, ANSI T1.635-1993. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 2 ...

Page 19

... PCI Special Interest Group, PCI Local Bus Specification, June 1995, Version 2.1. • PMC-940212, ATM_SCI_PHY, "SATURN Compliant Interface For ATM Devices", February 1994, Issue 1. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 3 ...

Page 20

... When this mode of operation is selected an optional EPROM can also be supported by the generic microprocessor interface. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 4 ...

Page 21

... Electrical PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 TXD+/- PM7375 LASAR-155 RXD+/- Optional Local Microcontroller TXD+/- PM7375 LASAR-155 RXD+/- Optional EPROM PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER PCI BUS AD[31:0] Control PCI BUS AD[31:0] Control 5 ...

Page 22

... DS3/E3 ATM Operation 75 OHM DS3/E3 COAX LIU PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 TDAT[7:0] PM7345 LASAR-155 S/UNI-PDH RDAT[7:0] LASAR-155 LOCAL BUS PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER PCI BUS AD[31:0] Control PM7375 Optional EPROM 6 ...

Page 23

... Tx ATM & Tx ATM Cell Adaptation Processor Layer Processor SAR Performance Monitor Rx ATM & Rx ATM Cell Adaptation Processor Layer Processor Microprocessor I/F PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER AD[31:0] C/BEB[3:0] PAR FRAMEB TRDYB IRDYB STOPB PCI DEVSELB Connection DMA IDSEL Parameter Controller LOCKB ...

Page 24

... Tx ATM Cell Adaptation Processor Layer Processor SAR Performance Monitor Rx Rx ATM & Rx ATM Cell Adaptation Processor Layer Processor Microprocessor PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER AD[31:0] C/BEB[3:0] PAR FRAMEB TRDYB IRDYB STOPB PCI DEVSELB Connection DMA IDSEL Parameter Controller Store ...

Page 25

... PMC-931127 6 DESCRIPTION The PM7375 LASAR-155 Local ATM Segmentation and Reassembly & Physical Layer device is a monolithic integrated circuit that implements SONET/SDH transmission convergence, ATM cell mapping, ATM Adaptation Layer, and PCI Bus memory management functions for a 155.52 or 51.84 Mbit/s ATM User Network Interface ...

Page 26

... It has TTL and pseudo ECL (PECL) compatible inputs and outputs and is packaged in a 208 pin copper slugged plastic QFP package. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 10 ...

Page 27

... AD[11] VSS_AC VDD_AC AD[10] AD[9] AD[8] VSS_AC PIN 52 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 PM7375 LASAR-155 TOP VIEW PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER PIN 156 VSS_DC TCLK VDD_DC MPENB RXPHYBP RAVS1 RAVD2 LF+ LF- LFO RAVS2 ...

Page 28

... These inputs must be DC coupled. Passive components connected to the recovery loop filter (LF+, LF- and LFO) pins determine the dynamics of the clock recovery unit. Refer to the Operation section for details. PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 12 ...

Page 29

... The transmit clock (TXC) output is available when STS-1 (51.84 Mbits/s) mode of operation is selected using the LASAR-155 Master Configuration register. When STS-3c (STM-1) mode of operation is selected, TXC is held low. TXD+/- are updated on the falling edge of TXC. PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 13 ...

Page 30

... RCLK. When the UNI_POTS bit is high, the receive line DCC (RLD) signal contains the serial line data communications channel (D4 - D12) extracted from the incoming stream. RLD is updated on the falling edge of RLDCLK. PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 14 ...

Page 31

... TGFC is sampled on the rising edge of TCLK. When the UNI_POTS bit is high, the transmit line DCC (TLD) signal contains the serial line data communications channel (D4 - D12). TLD is sampled on the rising edge of TLDCLK. PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 15 ...

Page 32

... When XOFF is asserted high, the LASAR-155 is prohibited from transmitting user cells. Under this operating condition, the LASAR-155 can only transmit Idle/Unassigned cells. When XOFF is low, the LASAR-155 operates normally. XOFF is sampled on the rising edge of TCLK. PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 16 ...

Page 33

... RFIFOFB and RDAT[7:0] can be used to interface to an external FIFO to support CBR VCs and Management cells. Under analog test mode as selected using the PMCATST bit in the LASAR-155 Master Test register, this pin is configured as an output and is used for test purposes. PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 17 ...

Page 34

... RDAT[7:0] bus. For this mode of operation, RSOC is sampled using the rising edge of SYSCLK. When RXPHYBP is set low, RSOC becomes an output and marks the start of cell on the RDAT[7:0] bus. For this mode of operation, RSOC is updated on the rising edge of SYSCLK. PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 18 ...

Page 35

... RFIFOFB indicates that at least one byte can be written. When sampled low, RFIFOFB indicates that the external FIFO is full and can accept no more writes. In this mode of operation, RFIFOFB is sampled using the rising edge of SYSCLK. PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 19 ...

Page 36

... SYSCLK cycle, data is not expected on the TDAT[7:0] bus on the next rising edge of SYSCLK. Once a full cell is sampled automatically inserted into the cell stream. In this mode of operation, TWRENB is generated using the rising edge of SYSCLK. PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 20 ...

Page 37

... SYSCLK. 76 When TXPHYBP is set low, the TDAT[7:0] signals become inputs and carry the ATM cell octets that are read from an external FIFO. For this mode of operation, TDAT[7:0] is sampled using the rising edge of SYSCLK. PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 21 ...

Page 38

... FIFO. When sampled low, TFIFOEB indicates that there are no bytes to be read. When sampled high, TFIFOEB indicates that at least one byte can be read. In this mode of operation, TFIFOEB is sampled using the rising edge of SYSCLK. PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 22 ...

Page 39

... Base Address register operates normally. If ROMP is logic zero, the XRBS bits in the Expansion ROM Base Address register is zeroed out indicating there is no expansion ROM. ROMP must be used to allow Interoperability with some BIOs implementations. ROMP has an integral pull up resistor. PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 23 ...

Page 40

... AD[31:0] remain outputs for the 5 transaction. 2 When the LASAR-155 is not involved in the current 1 transaction, AD[31:0] are tri-stated. Signals, AD[31:0] are updated on the rising edge of PCICLK or sampled using the rising edge of PCICLK depending on whether they are outputs or inputs. PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 24 ...

Page 41

... When the LASAR-155 is not involved in the current transaction, PAR is tri-stated. PAR is updated on the rising edge of PCICLK or sampled using the rising edge of PCICLK depending on whether output or an input. PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 25 ...

Page 42

... TRDYB will be used to extend data phases to multiple PCICLK cycles. When the LASAR-155 is not involved in the current transaction, TRDYB is tri-stated. TRDYB is updated on the rising edge of PCICLK or sampled using the rising edge of PCICLK depending on whether output or an input. PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 26 ...

Page 43

... When the LASAR-155 is not involved in the current transaction, STOPB is tri-stated. STOPB is updated on the rising edge of PCICLK or sampled using the rising edge of PCICLK depending on whether output or an input. PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 27 ...

Page 44

... The LASAR-155 will continue to reject other initiators until its owner releases the lock by forcing both FRAMEB and LOCKB high initiator, the LASAR-155 never locks a target. LOCKB is sampled using the rising edge of PCICLK. PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 28 ...

Page 45

... PERRB is enabled using a bit in the Control register in the PCI Configuration registers space. In addition, regardless of whether output, PERRB is enabled or not, parity errors are indicated in the Status register in the PCI Configuration registers space. PERRB is updated on the rising edge of PCICLK. PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 29 ...

Page 46

... PCIINTB is an open drain output. When the PCIINTB signal asserts, the PCID Interrupt Status and the PCID Mailbox/Microprocessor Interrupt Status/Enable registers should be read to determine the source of the interrupt. PCIINTB is updated on the rising edge of PCICLK. PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 30 ...

Page 47

... CS1B is set low during LASAR-155 Local Bus accesses to the External Devices address space as defined using the External Device Memory Base Address register. For this mode of operation CS1B is generated on the rising edge of PCICLK. PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 31 ...

Page 48

... WRB edge while either CS1B or CS2B is low. For this mode of operation WRB is generated on the rising edge of PCICLK. PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 32 ...

Page 49

... For master mode operation the A[8:0] bus is configured as an output. A[8:0] supplies the least significant nine bits of the address on the LASAR-155 Local Bus. For this mode of operation A[8:0] are updated on the rising edge of PCICLK. PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 33 ...

Page 50

... LASAR-155 Master Interrupt Enable register and the EXTIE bit in the PCID Mailbox/Microprocessor Interrupt Status/Enable register assumed that a device on the LASAR-155 Local Bus is requesting interrupt servicing. Servicing is indicated by asserting an interrupt using the PCI interrupt output, PCIINTB. PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 34 ...

Page 51

... The test data output (TDO) signal carries test data out of the LASAR-155 via the IEEE P1149.1 test access port. TDO is updated on the falling edge of TCK. TDO is a tri-state output which is inactive except when scanning of data is in progress. PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 35 ...

Page 52

... In the event that TRSTB is not used, it must be connected to RSTB. 10 The DC power pins should be connected to a well 28 decoupled + common with VDD_AC The DC ground pins should be connected to GND in 27 common with VSS_AC PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 36 ...

Page 53

... The transmit pad power (TXVDD) supplies the TXC and TXD+/- outputs. TXVDD is physically isolated from the other device power pins and should be a clean, well decoupled +5 V supply to minimize the noise coupled into the transmit stream. PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 37 ...

Page 54

... RAVD2 should be connected to a clean, well decoupled, +5V supply. The ground (RAVS2) pin for receive clock and data recovery block active loop filter and oscillator. RAVS2 should be connected to a clean ground reference. PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 38 ...

Page 55

... The power (RAVD4) pin for the RRCLK+/- PECL inputs. RAVD4 should be connected to a clean, well decoupled, +5V supply. The ground (RAVS4) pin for the RRCLK+/- PECL inputs. RAVS4 should be connected to a clean ground reference. PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 39 ...

Page 56

... Do not exceed 100 mA of current on any pin during the power-up or power- down sequence. Refer to the Power Sequencing description in the Operations section. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 40 ...

Page 57

... Ensure that all digital power is applied simultaneously, and it is applied before the analog power is applied. Refer to the Power Sequencing description in the Operations section. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 41 ...

Page 58

... SONET equipment by GR-253-CORE (Figure 9.1). The jitter tolerance illustrated is associated with the external loop filter components recommended in the Operation section. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 42 ...

Page 59

... Receive Section Overhead, Receive Line Overhead and the Receive Path Overhead Processors as described below. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 10000 100000 Jitter Freq. (Hz) PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 1000000 10000000 43 ...

Page 60

... Accumulation of line far end block error (FEBE) indications into an internal saturating one second (STS-3c (STM-1) rate) counter is also provided. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 44 ...

Page 61

... STS-3c (STM-1) and 93 µs for STS-1. When in the HUNT state, the RACP block asserts the out of cell delineation (OCD) alarm. If OCD PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 45 ...

Page 62

... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 correct HEC (byte by byte) Incorrect HEC (cell by cell) SYNC + The coset polynomial, x PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER PRESYNC DELTA consecutive correct HECs (cell by cell) 6 ...

Page 63

... Cell) Single-Bit Error MODE (Correct Error and Pass Cell) DETECTION MODE No Errors Detected In M Cells th (Pass M Cell) No Errors Detected (Pass Cell) PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER ALPHA consecutive incorrect HCS's (To HUNT state) Errors Detected (Drop Cell) th cell is not 47 ...

Page 64

... OAM flows (100, 101), specific VPI/VCI codes (i.e. F4 OAM cells) or cells with CRC-10 errors. Filtered cells are not passed onto the PCI Host and are accumulated in the SAR PMON block. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER ...

Page 65

... RALP can be configured to either stop reassembly on all VCs immediately or after the active CPAAL5_PDU has been reassembled. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER +x+1. 49 ...

Page 66

... Writing to the LASAR-155 Master Reset / Load Meters register initiates transfers for all counters in all blocks (i.e. RSOP, RLOP, RPOP, RACP, TACP and SAR PMON). PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 50 ...

Page 67

... For both low and high priority queues, VCs on the same queue are serviced on a round-robin fashion. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 51 ...

Page 68

... Transmission at the PCR is maintained until the bucket is PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 Queue 1 Queue 2 Queue 3 Queue 4 VPI/VCI 1 Packet 2 VPI/VCI 2 Packet 2 PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER VPI/VCI 2 Packet 3 52 ...

Page 69

... TALP provides the ability to multiplex cells in from the Multipurpose Port and to enforce an aggregate peak cell rate (APCR). PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER +x+1. 53 ...

Page 70

... Scrambling is performed using the self synchronous scrambler performed only over cell payloads; cell headers are not scrambled. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 43 +1. Scrambling ...

Page 71

... For alarm assertion and diagnostics, line FERF can be forced (K2), line FEBE can be automatically accumulated and inserted (Z2) and BIP-8/24 errors may be continuously inserted. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 55 ...

Page 72

... K1 (*) (0x00) (0x00) (0x00) D5 (0x00) (0x00) (0x00) D8 (0x00) (0x00) (0x00) D11 (0x00) (0x00) (0x00 (0x00) (0x00) (*) PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER (0x01) (0x02) (0x03) F1 (0x00) (0x00) (0x00) D3 (0x00) (0x00) (0x00 (0x00) (0x00) (0x00) ...

Page 73

... (*) (0x00) (0x00 (0x00) (0x00) (0x00 (0x6A) (0x0A) (0x00 (*) (0x00) (0x00 (0x00) (0x00) (0x00 (0x00) (0x00) (0x00) D10 D11 D12 (0x00) (0x00) (0x00 (0x00) (*) (0x00) PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 57 ...

Page 74

... The clock synthesis unit can be bypassed using primary inputs to allow operation with an external line rate clock source. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 J1 (0x00) B3 (*) C2 (0x13) G1 (*) F2 (0x00) H4 (0x00) Z3 (0x00) Z4 (0x00) Z5 (0x00) PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 58 ...

Page 75

... For the round-robin scheme, simultaneous DMA requests are serviced in a fair rotational manner. For the receive priority scheme, receive PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 59 ...

Page 76

... PCI Configuration memory space. The LASAR-155's PCI address map is shown below. Note, both the LASAR-155 Memory and External Device Memory is DWORD and Word accessible only. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 60 ...

Page 77

... Base Address LASAR Base Address DWORD/WORD PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 PCI ADDRESS MAP 0B Expansion ROM External Devices LASAR-155 Registers Access Only 4GB PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 64KB 16KB 4KB 61 ...

Page 78

... Descriptor Table Base (TDTB) register. As shown below, each TD can be located using a Transmit Descriptor Reference (TDR) combined with the TDTB register. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 62 ...

Page 79

... TDTB TD_ADDR TD 16384 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 TDTB[31:5] TDR[13:0] = TD_ADDR[31:0] Bit PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER Bit 0 00000 00000 Bit 0 DWORD 0 DWORD 1 DWORD 2 DWORD 3 DWORD 4 DWORD 5 DWORD 6 ...

Page 80

... TRM optionally buffers up to six TDs before attaching them to the TDRF Queue buffering is enabled, the TDs are flushed to the TDRF Queue PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 64 ...

Page 81

... TD has been processed with its IOC bit set. Please refer to the Transmit Descriptor Data Structure Section for IOC bit details. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 65 ...

Page 82

... TQB PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER TQB[31: Index[15:0] 00 AD[31:0] PCI Host Memory TDR Reference Queues 256KB Valid TDR. Only least significant 16 bits are valid. ...

Page 83

... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 TDR[13:0] Descriptor Segmentation successful, last/only buffer of packet. Segmentation successful, buffer of partial packet. Segmentation failed due to unprovisioned VC or Max SDU error. PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER Bit 0 67 ...

Page 84

... TDRRQ Write Address TDRRQ End Address PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 Bit 31 Bit 0 TDR TDR TDR PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER buffer -packet bytes buffer bytes -packet bytes ...

Page 85

... TD packet case or describes the end of a packet for the multiple TD packet case. Note, the More bit cannot be set to logic one when the Chain End bit is set to logic one. PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 0 TVC[6:0] Transmit Buffer Size [15:0] ...

Page 86

... OAM F5 flow cell 11 - End to end OAM F5 flow cell When CT specifies non AAL5 user cells (i.e. 01 11), the current TD's Packet Length must be less than or equal to forty eight octets. The exact number depends on the CRC type indicated. PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 70 ...

Page 87

... CRC-32 polynomial, CRC-10 polynomial or no CRC should be applied to the packet/cell described in the current TD CRC- CRC- CRC CRC For multiple TD packets, for all TDs of the packet, the CRC bits must be consistent. PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 71 ...

Page 88

... Host via the TDRF Queue. The Transmit Buffer Size bits are used to indicate the size in octets of the current TD's data buffer. This field must be configured by the PCI Host. The minimum size supported is 4 bytes. PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 72 ...

Page 89

... LASAR-155 inserts 00H into the UU field of the associated CPAAL5_PDU. For multiple TD packets, for all TDs of the packet, the CPAAL5_PDU UU field must be consistent. Note, the CPAAL5_PDU UU field is only used when CT[1:0] selects AAL5 user cells (00). PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 73 ...

Page 90

... If disabled, the LASAR-155 inserts 00H into the CPI field of the associated CPAAL5_PDU. For multiple TD packets, for all TDs of the packet, the CPAAL5_PDU CPI field must be consistent. Note, the CPAAL5_PDU CPI field is only used when CT[1:0] selects AAL5 user cells (00). PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 74 ...

Page 91

... Table Base register. Thus, as shown below, a RPD can be located using a Receive Packet Descriptor Reference (RPDR) combined with the PCID Rx Packet Descriptor Table Base register. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 75 ...

Page 92

... RPD_ADDR RPD 2 RPD 16384 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 Bit 31 RPDTB[31:5] + RPDR[13:0] = RPD_ADDR[31:0] Bit 31 PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER Bit 0 00000 00000 Bit 0 DWORD 0 DWORD 1 DWORD 2 DWORD 3 DWORD 4 DWORD 5 DWORD 6 ...

Page 93

... RPDR of the RPD describing the packet to the RPDRR Queue. For multiple RPD packets, only the first RPD's RPDR of the linked list is attached. Please refer below. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 77 ...

Page 94

... PCI Address RQB RPDR RPDR RPDR RPDR RPDR RPDR RPDR RPDR RPDR RPDR RPDR RPDR PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER RQB[31: Index[15:0] 00 AD[31:0] PCI Host Memory 256KB RPD Reference Queues Valid RPDR. Only the least significant 16 bits are valid. 78 ...

Page 95

... CPAAL5_PDU CRC- CPAAL5_SDU length error. Please refer to the Receive Packet Descriptor Data Structure section for a description of the errors. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 RPDR[13:0] Descriptor Reassembly successful. Reassembly failed. Unused. PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER Bit 0 79 ...

Page 96

... RPDRRQ End Address PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 Bit 31 Bit 0 STATUS + RPDR STATUS + RPDR STATUS + RPDR PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER buffer -packet M RPD - 32 bytes buffer RPD - 32 bytes -packet N RPD - 32 bytes ...

Page 97

... As mentioned above, linked lists are terminated using the CE bit set to logic 1, this field is not valid. Linked lists of RPDs are used by the LASAR-155 to pass the PCI Host multiple RPD packets. PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 0 Next RPD Pointer [13:0] ...

Page 98

... Identifier. Selection of M and N are made using a COPS register. Note: for multiple RPD packets, only the first RPD's RVC field is valid. All other RPD RVC fields of the linked list are invalid and should be ignored. PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 82 ...

Page 99

... Data Unit associated with the current packet. Note: for multiple RPD packets, only the first RPD's CPAAL5_PDU CPI field is valid. All other RPD CPAAL5_PDU CPI fields of the linked list are invalid and should be ignored. PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 83 ...

Page 100

... Unit associated with the current packet. Note: for multiple RPD packets, only the first RPD's CPAAL5_PDU LENGTH field is valid. All other RPD CPAAL5_PDU LENGTH fields of the linked list are invalid and should be ignored. PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 84 ...

Page 101

... Management Descriptor Table Base register. Thus, as shown below, a RMD can be located using a Receive Management Descriptor Reference (RMDR) combined with the PCID Rx Management Descriptor Table Base register. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 85 ...

Page 102

... RMD 16384 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 Bit 0 00000 RMDTB[31:5] + RMDR[13:0] 00000 = RMD_ADDR[31:0] Bit 0 PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER DWORD 0 DWORD 1 DWORD 2 DWORD 3 DWORD 4 DWORD 5 DWORD 6 DWORD 7 DWORD 0 DWORD 7 DWORD 0 ...

Page 103

... An empty condition is defined as the read pointer being one less then the write pointer. The last location in a queue is not considered as part of the queue and thus is not a valid entry. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 87 ...

Page 104

... ISSUE 6 Base Address + Index Register ------------------------- PCI Address RQB RMDR RMDR Valid RMDR. Only the least significant 16 bits are valid. PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER RQB[31: Index[15:0] 00 AD[31:0] PCI Host Memory 256KB RMD Reference Queues 88 ...

Page 105

... Reserved (32) Reserved (32) Reserved (32) Description The GFC[3:0] bits are the received GFC bits in the associated cell header. The PTI[2:0] bits are the received PTI bits in the associated cell header. PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER Bit 0 Bit 0 RVC [6:0] Bytes In Buffer [15:0] 89 ...

Page 106

... The Data Buffer Start Address bits are used as a pointer to the buffer of the current RMD into PCI Host memory. Note, Receive Buffers must be DWORD aligned. For example, Data Buffer Start Address[1:0] is expected to be set to 00 binary. PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 90 ...

Page 107

... PCI Host interface and cannot be accessed directly using the microprocessor interface. However, indirect access via the microprocessor interface is provided. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 91 ...

Page 108

... Interface address. The base address can be found in the LASAR-155 Memory Base Address register in the PCI Configuration memory space. The fourth column contains the name of the register. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 92 ...

Page 109

... RLOP Line BIP-8/24 RLOP Line BIP-8/24 MSB RLOP Line FEBE LSB RLOP Line FEBE RLOP Line FEBE MSB TLOP Control TLOP Diagnostic TLOP Reserved TLOP Reserved Reserved RPOP Status/Control RPOP Interrupt Status RPOP Reserved PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 93 ...

Page 110

... RACP Receive Cell Counter (MSB) RACP Configuration RACP Reserved TACP Control/Status TACP Idle/Unassigned Cell Header Pattern TACP Idle/Unassigned Cell Payload Octet Pattern TACP FIFO Configuration TACP Transmit Cell Counter (LSB) TACP Transmit Cell Counter PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 94 ...

Page 111

... TALP Multipurpose Port Peak Cell Rate TALP Multipurpose Port Bucket Capacity TALP Reserved TATS Control/Interrupt Enable TATS Interrupt Status TATS Service Rate Queue Enables TATS Service Rate Queue 1 Parameters TATS Service Rate Queue 2 Parameters PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 95 ...

Page 112

... PCID Microprocessor Read Mailbox Data PCID Reserved PCID Reserved PCID Control PCID Interrupt Status PCID Interrupt Enable PCID Mailbox/Microprocessor Interrupt Status/Enable PCID Reserved PCID Rx Packet Descriptor Table Base PCID Rx Management Descriptor Table Base PCID Rx Queue Base PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 96 ...

Page 113

... PCID Reserved PCID Tx Descriptor Table Base PCID Tx Queue Base PCID Tx Descriptor Reference Free Queue Start PCID Tx Descriptor Reference Free Queue Write PCID Tx Descriptor Reference Free Queue Read PCID Tx Descriptor Reference Free Queue End PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 97 ...

Page 114

... PCID RAM Indirect Data High Word PCID Host Write Mailbox Control PCID Host Write Mailbox Data Word PCID Host Read Mailbox Control PCID Host Read Mailbox Data PCID Reserved LASAR-155 Master Test Reserved for Test PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 98 ...

Page 115

... To ensure that the LASAR-155 operates as intended, reserved register bits must only be written with their default values. Similarly, writing to reserved registers should be avoided. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 99 ...

Page 116

... RSOP , RLOP , RPOP , RACP , TACP , SAR PMON blocks. A maximum of 7 µs are required to load all registers after a write. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 Default PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 100 ...

Page 117

... The PCI Configuration register values are preserved. Note, for proper operation after a soft reset, the TRMEN bit in the PCID Control register must be cleared before software reset is released. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 101 ...

Page 118

... If RXPHYBP is set to logic one, RFIFOINV is not used and should be set to logic zero. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 Default PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 102 ...

Page 119

... STS-3c (STM-1) rate operation. The LASAR-155 will not operate correctly if a Reserved mode is selected. RATE[1:0] PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 MODE 00 Reserved 01 Reserved 10 51.84 Mbit/s, STS-1 11 155.52 Mbit/s, STS-3c (STM-1) PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 103 ...

Page 120

... GFC codes are used to XON and XOFF transmission. When AUTOXOFF is set to logic zero, the received GFC codes are ignored. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 104 ...

Page 121

... Interrupts TROOLI, LCDI and RDOOLI are cleared when this register is read. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 Default PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 105 ...

Page 122

... TROOLV bit of the LASAR-155 Clock Synthesis Control and Status register changes state. TROOLV indicates the clock synthesis phase PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 106 ...

Page 123

... The PCIDI bit is high when an interrupt request is active from the PCID Microprocessor Interrupt Status Register. The PCID interrupt sources are enabled in the PCID Microprocessor Control Register. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 107 ...

Page 124

... DATA SHEET PMC-931127 10.1.4 Register 0x03 (0x00C): LASAR-155 Master Interrupt Enable PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 108 ...

Page 125

... Bit 3 R RRCLKA PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 Default Default PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 109 ...

Page 126

... The SYSCLK active (SYSCLKA) bit monitors for low to high transitions on the SYSCLK input. SYSCLKA is set high on a rising edge of SYSCLK, and is set low when this register is read. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 110 ...

Page 127

... This register controls the timing and high speed loopback features of the LASAR-155. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 Default PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 111 ...

Page 128

... LASAR-155 INTB or PCIINTB output is asserted when there is a change in the LCD state. When logic zero, the LASAR-155 INTB or PCIINTB output is not affected by the change in LCD state. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 112 ...

Page 129

... INIT is used to start the internal initialization procedure. The entire initialization procedure requires a maximum of 20 µs. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 113 ...

Page 130

... The TBUS[2:0] and TDOOLV bits are provided for analog production test and should be ignored. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 Status Default PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 114 ...

Page 131

... CRU PLL is PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 Default PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 115 ...

Page 132

... CRU PLL locks to the receive reference clock. TBUS[2:0]: The TBUS[2:0] bits are provided for analog production test and should be ignored. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 116 ...

Page 133

... BIP-8 error (B1) is detected. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 Default PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 117 ...

Page 134

... When DDS is a logic zero, descrambling is enabled. Reserved: The reserved bit must be programmed to logic zero for proper operation. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 118 ...

Page 135

... The LOFI bit is the loss of frame interrupt status bit. LOFI is set high when a PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 Default PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 119 ...

Page 136

... The BIPEI bit is the section BIP-8 interrupt status bit. BIPEI is set high when a section layer (B1) bit error is detected. This bit is cleared when this register is read. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 120 ...

Page 137

... SBE[8] PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 Default Default PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 121 ...

Page 138

... Reset / Load Meters register. Writing to the register loads all the error counter registers in the SAR PMON, RSOP , RLOP , RPOP , RACP and TACP blocks. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 122 ...

Page 139

... The DS bit is set to logic one to disable the scrambling of the STS-3c (STM-1) or STS-1 stream. When logic zero, scrambling is enabled. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 Default PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 123 ...

Page 140

... The DLOS bit controls the insertion of all zeros in the transmit stream. When DLOS is set to logic one, the transmit stream is forced to 0x00. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 Default PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 124 ...

Page 141

... The reserved bits must be programmed to logic zero for proper operation. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 Default PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 125 ...

Page 142

... The FERFE bit is an interrupt enable for the far end receive failure alarm. When PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 Default PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 126 ...

Page 143

... The FEBEE bit is an interrupt enable for the line far end block errors. When FEBEE is set to logic one, an interrupt is generated when a FEBE (Z2) is detected. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 127 ...

Page 144

... LBE[8] PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 Default Default PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 128 ...

Page 145

... SAR PMON, RSOP , RLOP , RPOP , RACP and TACP blocks. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 Default PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 129 ...

Page 146

... LFE[8] PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 Default Default PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 130 ...

Page 147

... SAR PMON, RSOP , RLOP , RPOP , RACP and TACP blocks. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 Default PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 131 ...

Page 148

... The reserved bits must be programmed to logic zero for proper operation. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 Default PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 132 ...

Page 149

... BIP byte(s) (B2). When DBIP is set to logic one, the B2 byte(s) are inverted. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 Default PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 133 ...

Page 150

... The reserved bits must be programmed to logic zero for proper operation. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 Default PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 134 ...

Page 151

... The current path signal label can be read from the RPOP Path Signal Label register. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 Default PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 135 ...

Page 152

... This register allows interrupt generation to be enabled for path level alarm and error events. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 Default PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 136 ...

Page 153

... Reserved: The reserved bits must be programmed to logic zero for proper operation. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 137 ...

Page 154

... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 Default PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 138 ...

Page 155

... PBE[3] Bit 2 R PBE[2] Bit 1 R PBE[1] Bit 0 R PBE[0] PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 Default PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 139 ...

Page 156

... SAR PMON, RSOP , RLOP , RPOP , RACP and TACP blocks. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 Default PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 140 ...

Page 157

... PFE[3] Bit 2 R PFE[2] Bit 1 R PFE[1] Bit 0 R PFE[0] PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 Default PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 141 ...

Page 158

... SAR PMON, RSOP , RLOP , RPOP , RACP and TACP blocks. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 Default PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 142 ...

Page 159

... The reserved bits must be programmed to logic zero for proper operation. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 Default PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 143 ...

Page 160

... NDF[3:0] bit positions in the TPOP Arbitrary Pointer MSB Register is inserted PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 Default PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 144 ...

Page 161

... If FTPTR is a logic 0, a valid pointer is inserted. Reserved: The reserved bit must be programmed to logic zero for proper operation. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 145 ...

Page 162

... APTR[9:0] value is inserted into the payload pointer bytes (H1 and H2) in the transmit stream. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 Default PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 146 ...

Page 163

... Pointer Control Register) or when new data flag generation is enabled using the NDF bit in the TPOP Pointer Control Register. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 Default PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 147 ...

Page 164

... This register allows control over the path signal label. C2[7:0]: The C2[7:0] bits are inserted in the C2 byte position. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 Default PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 148 ...

Page 165

... When reading this register, a non-zero value in these bit positions indicates that the insertion of this value is still pending. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 Default PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 149 ...

Page 166

... HEC is compared. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 Default PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 150 ...

Page 167

... OCDV is set low, the cell delineation state machine is in the 'SYNC' state and cells are passed to the RALP block. Reserved: The reserved bit must be programmed to logic zero for proper operation. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 151 ...

Page 168

... SYNC state and from the SYNC state to the HUNT state. This bit is reset immediately after a read to this register. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 Default PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 152 ...

Page 169

... The OCDE bit enables the generation of an interrupt due to a change of cell delineation state. When OCDE is set to logic one, the interrupt is enabled. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 153 ...

Page 170

... VPI and VCI fields of the idle or unassigned cell. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 Default PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 154 ...

Page 171

... A logic zero causes the masking of the corresponding bit. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 Default PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 155 ...

Page 172

... SAR PMON, RSOP , RLOP , RPOP , RACP and TACP blocks. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 Default PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 156 ...

Page 173

... SAR PMON, RSOP , RLOP , RPOP , RACP and TACP blocks. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 Default PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 157 ...

Page 174

... RCELL[8] PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 Default Default PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 158 ...

Page 175

... SAR PMON, RSOP , RLOP , RPOP , RACP and TACP blocks. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 Default PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 159 ...

Page 176

... ATM cells when STS-1 mapping is selected. When FSEN is set to logic one, PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 Default PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 160 ...

Page 177

... RGFC remains in its current state. Reserved: The reserved bit must be programmed to logic one for proper operation. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 161 ...

Page 178

... When HECADD is a logic zero, the polynomial is not added, and the unmodified HEC is inserted. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 Default PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 162 ...

Page 179

... When DHEC is set to logic one, the HEC octet is inverted prior to insertion in the synchronous payload envelope. Reserved: The reserved bits must be programmed to logic zero for proper operation. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 163 ...

Page 180

... The all zeros pattern is transmitted in the VCI and VPI fields of the idle cell. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 Default PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 164 ...

Page 181

... Bit ICP[7] corresponds to the most significant bit of the octet, the first bit transmitted. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 Pattern Default PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 165 ...

Page 182

... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 Default FIFODP[1] FIFODP[ PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER FIFO DEPTH 4 cells 3 cells 2 cells 1 cell 166 ...

Page 183

... TCELL[8] PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 Default Default PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 167 ...

Page 184

... SAR PMON, RSOP , RLOP , RPOP , RACP and TACP blocks. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 Default PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 168 ...

Page 185

... ATM cells for STS-1 mapping. When FSEN is set to logic one, the PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 Default PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER BYTE 00H 55H AAH FFH 169 ...

Page 186

... TALP block for the case of an assigned cell, or from the Idle/Unassigned Cell Header Control register for the case of unassigned cells. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 170 ...

Page 187

... Load Meters register. Such a write transfers the internally change detect latches to the above register within 1µs. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 Default PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 171 ...

Page 188

... Length Errors register has incremented since the last accumulation interval. RNZCPI_CH: When logic one, the RNZCPI_CH bit indicates that the SAR PMON Receive Non PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 172 ...

Page 189

... PMON from generating an interrupt. When the SAR PMON is reset, the INTE bit is set to logic zero, disabling the interrupt. The interrupt is cleared when this register is read. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 173 ...

Page 190

... This transfer and reset is carried out in a manner that ensures that coincident events are not lost. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 Errors (LSB) Default X Errors (MSB) Default X X PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 174 ...

Page 191

... This transfer and reset is carried out in a manner that ensures that coincident events are not lost. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 Default X Default X X PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 175 ...

Page 192

... This transfer and reset is carried out in a manner that ensures that coincident events are not lost. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 Indicator Errors Default X PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 176 ...

Page 193

... This transfer and reset is carried out in a manner that ensures that coincident events are not lost. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 Default X PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 177 ...

Page 194

... This transfer and reset is carried out in a manner that ensures that coincident events are not lost. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 Default X PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 178 ...

Page 195

... This transfer and reset is carried out in a manner that ensures that coincident events are not lost. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 Default X PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 179 ...

Page 196

... This transfer and reset is carried out in a manner that ensures that coincident events are not lost. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 Default X PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 180 ...

Page 197

... This transfer and reset is carried out in a manner that ensures that coincident events are not lost. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 Default X X PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 181 ...

Page 198

... This transfer and reset is carried out in a manner that ensures that coincident events are not lost. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 Default X PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 182 ...

Page 199

... This transfer and reset is carried out in a manner that ensures that coincident events are not lost. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 Default X PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 183 ...

Page 200

... This transfer and reset is carried out in a manner that ensures that coincident events are not lost. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 Default X PM7375 LASAR-155 LOCAL ATM SAR & PHYSICAL LAYER 184 ...

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