DS2182Q Maxim Integrated Products, DS2182Q Datasheet
DS2182Q
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DS2182Q Summary of contents
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... S-bits, FDL bits, signaling bits, and channel data. The DS2182A meets the requirements of ANSI T1.231. ORDERING INFORMATION PART TEMP RANGE DS2182 0°C to +70°C DS2182N -40°C to +85°C DS2182Q 0°C to +70°C DS2182QN -40°C to +85°C PIN CONFIGURATION TOP VIEW INT 1 SDI 2 27 DS2182A SDO ...
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Table 1. Pin Description PIN NAME TYPE INT SDI I 3 SDO SCLK N.C. — 7 RYEL O 8 RLINK O 9 RLCLK O 10 RCLK I 11 RCHCLK ...
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Table 2. Power and Test Pin Description PIN NAME TYPE TEST Table 3. Register Summary REGISTER ADDRESS BVCR2 0000 BVCR1 0001 CRCCR 0010 OOFCR 0011 FECR 0100 RSR1 0101 RIMR1 0110 RSR2 0111 ...
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Figure 1. Block Diagram Dallas Semiconductor DS2182A ...
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SERIAL PORT INTERFACE The port pins of the DS2182A serve as a microprocessor/microcontroller-compatible serial port. Eleven on-board registers allow the user to update operational characteristics and monitor device status through a host controller, minimizing hardware interfaces. The port on the ...
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Figure 2. Serial Port Read/Write OPERATION OF THE COUNTERS All four of the counters in the DS2182A can be preset by the user to establish an event-count interrupt threshold. The counters count up from the preset value until they reach ...
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CRCCR: CRC Count Register 2 MSB CRC7 CRC6 NAME POSITION CRC7 CRCCR.7 CRC0 CRCCR.0 The CRC count register (CRCCR 8-bit presettable counter that records word errors in the cyclic redundancy check (CRC). This 8-bit binary counter saturates at ...
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RSR1: Receive Status Register 1 MSB 8ZD 16ZD NAME POSITION 8ZD RSR1.7 16ZD RSR1.6 RCL RSR1.5 RYEL RSR1.4 RLOS RSR1.3 B8ZSD RSR1.2 RBL RSR1.1 COFA RSR1.0 Note: Alarm 8ZD and 16ZD are cleared on the next occurrence ...
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RECEIVE STATUS REGISTERS The receive status registers (RSR1 and RSR2) can be used in either a polled or an interrupt configuration polled configuration, the user reads the RSR at regular intervals to check for alarms interrupt ...
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RIMR1: Receive Interrupt Mask Register 1 MSB 8ZD 16ZD NAME POSITION 8ZD RIMR1.7 16ZD RIMR1.6 RCL RIMR1.5 RYEL RIMR1.4 RLOS RIMR1.3 B8ZSD RIMR1.2 RBL RIMR1.1 COFA RIMR1.0 RCL RYEL RLOS 8 Zero Detect Mask 1 = interrupt enabled 0 = ...
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RSR2: Receive Status Register 2 MSB SEFE RCLC NAME POSITION SEFE RSR2.7 RCLC RSR2.6 RBLC RSR2.5 FERR RSR2.4 FECS RSR2.3 OOFCS RSR2.2 CRCCS RSR2.1 BPVCS RSR2.0 RBLC FERR FECS Severely Errored Framing Event. Set when two out of six framing ...
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RIMR2: Receive Interrupt Mask Register 2 MSB SEFE RCLC NAME POSITION SEFE RIMR2.7 RCLC RIMR2.6 RBLC RIMR2.5 FERR RIMR2.4 FECS RIMR2.3 OOFCS RIMR2.2 CRCCS RIMR2.1 BPVCS RIMR2.0 RBLC FERR FECS Severely Errored Framing-Event Mask 0 = interrupt masked 1 = ...
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RCR1: Receive Control Register 1 MSB ARC OOF1 NAME POSITION ARC RCR1.7 OOF1 RCR1.6 OOF2 RCR1.5 ACR RCR1.4 SYNCC RCR1.3 SYNCT RCR1.2 SYNCE RCR1.1 RESYNC RCR1.0 OOF2 ACR SYNCC Auto Resync Criteria 1 = resync on OOF event only 0 ...
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SYNCHRONIZER The heart of the monitor is the receive synchronizer. This circuit serves two purposes: it monitors the incoming data stream for loss-of-frame or multiframe alignment, and it searches for a new frame alignment pattern when sync loss is detected. ...
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Sync Enable (RCR1.1) When RCR1.1 is cleared, the receiver initiates automatic resync if an OOF event occurs or if carrier loss (192 consecutive 0’s) occurs (depends on RCR1.7). When RCR1.1 is set, the automatic resync circuitry is disabled. In this ...
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Figure 3. 193S Receive Multiframe Timing NOTE 1: SIGNALING DATA IS UPDATED DURING SIGNALING FRAMES ON CHANNEL BOUNDARIES. PIN RABCD IS THE LSB OF EACH CHANNEL WORD IN NONSIGNALING FRAMES. NOTE 2: RLINK DATA (S-BIT) IS UPDATED ONE BIT-TIME PRIOR ...
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Figure 5. Receive Multiframe Boundary Timing NOTE 1: RLINK TIMING IS SHOWN FOR 193E; IN 193S, RLINK IS UPDATED ON EVEN FRAME BOUNDARIES AND IS HELD ACROSS MULTIFRAME EDGES. NOTE 2: TOTAL DELAY FROM RPOS AND RNEG TO RSER OUTPUT ...
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ALARM OUTPUTS The transceiver also provides direct alarm outputs for applications when additional decoding and demuxing are required to supplement the on-board alarm logic. RLOS Output The receive loss-of-sync output indicates the status of the receiver synchronizer circuitry. When high, ...
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Figure 6. Alarm Output Timing NOTE 1: RFER TRANSITIONS HIGH DURING F-BIT TIME IF RECEIVED FRAMING PATTERN BIT IS IN ERROR. (FRAME 12 F-BITS IN 193S ARE IGNORED IF RCR2.3 = 1.) ALSO, IN 193E, RFER TRANSITIONS HIGH ONE- HALF ...
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ABSOLUTE MAXIMUM RATINGS Voltage Range on Any Pin Relative to Ground………………………………………..-0.1V to +7.0V Operating Temperature Range…………………………………………………………..0°C to +70°C Storage Temperature Range…………………………………………………………….-55°C to +125°C Soldering Temperature……………………………………………………………………See IPC/JEDEC J-STD-020A Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to ...
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CHARACTERISTICS—SERIAL PORT ( ±10 0°C to +70°C.) (Notes 1 and 2) (See DD A PARAMETER SDI to SCLK Setup SCLK to SDI Hold SDI to SCLK Falling Edge SCLK Low Time SCLK High Time SCLK Rise ...
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AC ELECTRICAL CHARACTERISTICS—RECEIVE (V = 5.0V ±10 0°C to +70°C) (Notes 1 and 2) (See DD A PARAMETER Propagation Delay RCLK to RMSYNC, RFSYNC, RSISEL, RSIGFR, RLCLK, RCHCLK Propagation Delay RCLK to RSER, RABCD, RLINK Transition Time, All ...
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Figure 7. Serial Port Write AC Timing Diagram NOTE 1: SHADED REGIONS INDICATE “DON’T CARE” STATES OF INPUT. NOTE 2: DATA BYTE BITS MUST BE VALID ACROSS LOW CLOCK PERIODS TO PREVENT TRANSIENTS IN OPERATING MODES. Figure 8. Serial Port ...
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Figure 9. Receive AC Timing Diagram REVISION HISTORY DATE 092299 Original release. Changed typo in Pin Description for ESIGRF to RSIGFR. Added Note 1 to Input Logic 1, V 080802 table . [Note 1: RCLK, SCLK, and RST V characteriztion. ...
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PACKAGE INFORMATION (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information www.maxim-ic.com/DallasPackInfo.) 28-Pin DIP DS2182 T1 LINE MONITOR INCHES DIM MIN MAX A 1.445 1.470 B 0.530 ...
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... B1 0.013 0.021 C 0.009 0.012 D 0.485 0.495 D1 0.450 0.456 D2 0.390 0.430 E 0.485 0.495 E1 0.450 0.456 E2 0.390 0.430 L1 0.060 — — e1 0.050 BSC CH1 0.042 0.048 © 2003 Maxim Integrated Products · Printed USA 28-Pin PLCC DS2182Q T1 LINE MONITOR ...