MC12430 Freescale Semiconductor, Inc, MC12430 Datasheet

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MC12430

Manufacturer Part Number
MC12430
Description
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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MC12430
Manufacturer:
MOTOROLA/摩托罗拉
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20 000
Part Number:
MC12430FN
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High Frequency Clock Synthesizer
VCO will operate over a range of frequencies from 400 to 800 MHz. The
differential PECL output can be configured to be the VCO frequency divided
by 1, 2, 4 or 8. With the output configured to divide the VCO frequency by 2,
and with a 16.000 MHz external quartz crystal used to provide the reference
frequency, the output frequency can be specified in 1 MHz steps. The PLL
loop filter is fully integrated so that no external components are required.
The synthesizer output frequency is configured using a parallel or serial
interface.
Functional Description
frequency reference. The output of the reference oscillator is divided by 16
before being sent to the phase detector. With a 16 MHz crystal, this provides
a reference frequency of 1 MHz. Although this data sheet illustrates
functionality only for a 16 MHz crystal, any crystal in the 10–20 MHz range
can be used.
serial or parallel interfaces. The output of this loop divider is applied to the phase detector.
adjusting the VCO control voltage. Note that for some values of M (either too high or too low) the PLL will not achieve loop lock.
(N divider) is configured through either the serial or the parallel interfaces and can provide one of four division ratios (1, 2, 4 or 8).
This divider extends performance of the part while providing a 50% duty cycle.
50Ω to V
phase–locked loop to minimize noise induced jitter.
to configure the internal counters. Normally, on system reset, the P_LOAD input is held LOW until sometime after power becomes
valid. On the LOW–to–HIGH transition of P_LOAD, the parallel inputs are captured. The parallel interface has priority over the serial
interface. Internal pullup resistors are provided on the M[8:0] and N[1:0] inputs to reduce component count in the application of the
chip.
The serial input S_DATA must meet setup and hold timing as specified in the AC Characteristics section of this document. The
configuration latches will capture the value of the shift register on the HIGH–to–LOW edge of the S_LOAD input. See the
programming section for more information.
programming section for more information.
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
The MC12430 is a general purpose synthesized clock source. Its internal
The internal oscillator uses the external quartz crystal as the basis of its
50 to 800 MHz Differential PECL Outputs
±25 ps Peak–to–Peak Output Jitter
Fully Integrated Phase–Locked Loop
Minimal Frequency Over–Shoot
Synthesized Architecture
Serial 3–Wire Interface
Parallel Interface for Power–Up
Quartz Crystal Interface
28–Lead PLCC and 32–Lead LQFP Packages
Operates from 3.3 V or 5.0V Power Supply
Motorola, Inc. 2001
The VCO within the PLL operates over a range of 400 to 800 MHz. Its output is scaled by a divider that is configured by either the
The phase detector and loop filter attempt to force the VCO output frequency to be M x 2 times the reference frequency by
The output of the VCO is also passed through an output divider before being sent to the PECL output driver. This output divider
The output driver is driven differentially from the output divider and is capable of driving a pair of transmission lines terminated in
The configuration logic has two sections: serial and parallel. The parallel interface uses the values at the M[8:0] and N[1:0] inputs
The serial interface centers on a fourteen bit shift register. The shift register shifts once per rising edge of the S_CLOCK input.
The TEST output reflects various internal node values, and is controlled by the T[2:0] bits in the serial data stream. See the
CC
– 2.0 V. The positive reference for the output driver and the internal logic is separated from the power supply for the
HIGH FREQUENCY PLL
CLOCK SYNTHESIZER
28–LEAD PLCC PACKAGE
32–LEAD LQFP PACKAGE
MC12430
CASE 873A–02
CASE 776–02
FN SUFFIX
FA SUFFIX
Order Number: MC12430/D
Rev. 5, 09/2001
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MC12430 Summary of contents

Page 1

... MOTOROLA SEMICONDUCTOR TECHNICAL DATA High Frequency Clock Synthesizer The MC12430 is a general purpose synthesized clock source. Its internal VCO will operate over a range of frequencies from 400 to 800 MHz. The differential PECL output can be configured to be the VCO frequency divided With the output configured to divide the VCO frequency by 2, and with a 16 ...

Page 2

... MC12430 28–Lead PLCC Figure 1. Figure 1. 28–Lead Pinout (Top View) Figure 2. Figure 2. 32–Lead Pinout (Top 2 N[1: Input XTAL_SEL FREF_EXT OE Disabled 32–Lead LQFP View) Output Division XTAL Enabled MOTOROLA ...

Page 3

... Pullup) LVCMOS/CMOS input that selects between the crystal and the FREF_EXT source for the PLL reference signal. A HIGH selects the crystal input. MOTOROLA Function ≈ 85 mA. ). Current drain through PLL_V ). Current drain through PLL_V CC CC MC12430 OUT ≈ ...

Page 4

... MC12430 Figure 3. MC12430 Block Diagram (28–Lead PLCC Pinout) Programming the device amounts to properly configuring the internal dividers to produce the desired frequency at the outputs. The output frequency can by represented by this formula: ÷ 16 ÷ N FOUT = (F XTAL Where F is the crystal frequency the loop divider XTAL modulus, and N is the output divider modulus ...

Page 5

... However, the PLL bypass mode may be of interest at the board level for functional debug. When T[2:0] is set to 110 the MC12430 is placed in PLL bypass mode. In this mode the S_CLOCK input is fed directly into the M and N dividers. The N divider drives the FOUT differential pair and the M counter drives the TEST output pin ...

Page 6

... MC12430 • • = 3.3V ±5%) DC CHARACTERISTICS (V CC Symbol Characteristic V Input HIGH Voltage IH V Input LOW Voltage IL I Input Current IN V Output HIGH Voltage OH V Output LOW Voltage Output HIGH Voltage FOUT, FOUT 2. Output LOW Voltage FOUT, FOUT 1. Power Supply Current ...

Page 7

... As the oscillator is somewhat sensitive to loading on its inputs the user is advised to mount the crystal as close to the MC12430 as possible to avoid any board level parasitics. To facilitate co–location surface mount crystals are recommended, but not required. ...

Page 8

... The simplest form of isolation is a power supply filter on the PLL_VCC pin for the MC12430. Figure 6 illustrates a typical power supply filter scheme. The MC12430 is most susceptible to noise with spectral content in the 1KHz to 1MHz range ...

Page 9

... ECL receivers require only a few hundred millivolt input swings for reliable operation result, the output generated by the 12430 will, under all conditions, be sufficient for clocking standard ECL devices. Note that if a larger swing is required the MC12430 could drive a clock fanout buffer like the MC100EP111. MC12430 9 ...

Page 10

... MC12430 –N – –L –M – – OUTLINE DIMENSIONS FN SUFFIX PLASTIC PLCC PACKAGE CASE 776–02 ISSUE BRK VIEW D–D K SEATING –T J PLANE – VIEW S VIEW S INCHES DIM MIN MAX ...

Page 11

... OUTLINE DIMENSIONS FA SUFFIX PLASTIC LQFP PACKAGE CASE 873A–02 ISSUE A 4X –U– DETAIL AD BASE METAL N É É É É É É J SECTION AE–AE Q_ MC12430 AE AE DETAIL Y MILLIMETERS INCHES DIM MIN MAX MIN MAX ...

Page 12

... JAPAN: Motorola Japan Ltd.; SPS, Technical Information Center, 3–20–1, Minami–Azabu. Minato–ku, Tokyo 106–8573 Japan. 81–3–3440–3569 ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; Silicon Harbour Centre, 2 Dai King Street, Tai Po Industrial Estate, Tai Po, N.T., Hong Kong. 852–26668334 Technical Information Center: 1–800–521–6274 HOME PAGE: http://www.motorola.com/semiconductors/ ◊ 12 are registered trademarks of Motorola, Inc. Motorola, Inc Equal MC12430/D MOTOROLA ...

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