MPC8275 Freescale Semiconductor, Inc, MPC8275 Datasheet
MPC8275
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MPC8275 Summary of contents
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... DC/AC electrical characteristics, and AC timing specifications for .13µm (HiP7) members of the PowerQUICC™ II family of integrated communications processors—the MPC8280, the MPC8275, and the MPC8270 (collectively called the MPC8280 throughout this document). © Freescale Semiconductor, Inc., 2004, 2007. All rights reserved. MPC8280EC Rev ...
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... PBGA 480 TBGA — — — Yes Yes Yes — — Yes — — Yes — — — Section 10, “Ordering VR ZQ (516 PBGA—Lead spheres) MPC8275ZQ MPC8270ZQ Freescale Semiconductor ...
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... MPC8280 has 2 serial interface (SI) blocks and 8 TDM ports. MPC8270 and the VR and ZQ packages have only 1 SI block and 4 TDM ports (TDM2[A–D]). 3 MPC8280, MPC8275VR, MPC8275ZQ only (not on MPC8270, MPC8270VR, nor MPC8270ZQ) 1.1 Features The major features of the MPC8280 are as follows: • Dual-issue integer (G2_LE) core — ...
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Overview — High-performance (SPEC95 benchmark at 450 MHz; 855 Dhrystones MIPS at 450 MHz) — Supports bus snooping for data cache coherency — Floating-point unit (FPU) • Separate power supply for internal logic and for I/O • Separate PLLs for ...
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Uses the local bus signals, removing need for additional pins • System interface unit (SIU) — Clock synthesizer — Reset controller — Real-time clock (RTC) register — Periodic interrupt timer — Hardware bus monitor and software watchdog timer — ...
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... Multiple-master, single-master, and slave modes — eight TDM interfaces (four on the MPC8270) – Supports two groups of four TDM channels for a total of eight TDMs (one group of four on the MPC8270 and the MPC8275) – 2,048 bytes of SI RAM – Bit or byte resolution – ...
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Supports T1, CEPT, T1/E1, T3/E3, pulse code modulation highway, ISDN basic rate, ISDN primary rate, Freescale interchip digital link (IDL), general circuit interface (GCI), and user-defined TDM serial interfaces — Eight independent baud rate generators and 20 input clock ...
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DC Electrical Characteristics This device contains circuitry protecting against damage due to high static voltage or electrical fields; however advised that normal precautions be taken to avoid application of any voltages higher than maximum-rated voltages to this high-impedance ...
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Table 5. DC Electrical Characteristics Characteristic 5 In UTOPIA mode (UTOPIA pins only): I PA[0-31] PB[4-31] PC[0-31] PD[4-31 6.0mA ABB/IRQ2 TS A[0-31] TT[0-4] TBST TSIZE[0–3] AACK ARTRY DBG DBB/IRQ3 D[0-63] DP(0)/RSRV/EXT_BR2 DP(1)/IRQ1/EXT_BG2 DP(2)/TLBISYNC/IRQ2/EXT_DBG2 DP(3)/IRQ3/EXT_BR3/CKSTP_OUT DP(4)/IRQ4/EXT_BG3/CORE_SREST ...
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DC Electrical Characteristics Table 5. DC Electrical Characteristics Characteristic I = 5.3mA OL CS[0-9] CS(10)/BCTL1 CS(11)/AP(0) BADDR[27–28] ALE BCTL0 PWE[0–7]/PSDDQM[0–7]/PBS[0–7] PSDA10/PGPL0 PSDWE/PGPL1 POE/PSDRAS/PGPL2 PSDCAS/PGPL3 PGTA/PUPMWAIT/PGPL4/PPBS PSDAMUX/PGPL5 LWE[0–3]LSDDQM[0–3]/LBS[0–3]/PCI_CFG[0–3] LSDA10/LGPL0/PCI_MODCKH0 LSDWE/LGPL1/PCI_MODCKH1 LOE/LSDRAS/LGPL2/PCI_MODCKH2 LSDCAS/LGPL3/PCI_MODCKH3 LGTA/LUPMWAIT/LGPL4/LPBS LSDAMUX/LGPL5/PCI_MODCK LWR MODCK[1–3]/AP[1–3]/TC[0–2]/BNKSEL[0– 3.2mA OL L_A14/PAR ...
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... V for IIC interface does not match IIC standard, but does meet IIC standard for V IL issue. 5 MPC8280, MPC8275VR, MPC8275ZQ only. 4 Thermal Characteristics Table 6 describes thermal characteristics for both the packages. See package. For the discussions sections 4.1 and 4.5, P the I/O drivers. Characteristic Symbol Junction to ambient— ...
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Thermal Characteristics 4.2 Estimation with Junction-to-Case Thermal Resistance Historically, the thermal resistance has frequently been expressed as the sum of a junction-to-case thermal resistance and a case-to-ambient thermal resistance θJA θJC θCA where ...
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Experimental Determination To determine the junction temperature of the device in the application after prototypes are available, the thermal characterization parameter (Ψ ) can be used to determine the junction temperature with a measurement of the JT temperature at ...
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AC Electrical Characteristics Table 7. Estimated Power Dissipation for Various Configurations CPM Bus Multiplication (MHz) Factor 66.67 2.5 66.67 2.5 66.67 3 66.67 3.5 83.33 3 83.33 3 83.33 3.5 100 3 100 3 1 ° Test temperature = 105 ...
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CPM AC Characteristics Table 9 lists CPM output characteristics. Table 9. AC Characteristics for CPM Outputs Spec Number Characteristic Max Min sp36a sp37a FCC outputs—internal clock (NMSI) sp36b sp37b FCC outputs—external clock (NMSI) sp38a sp39a SCC/SMC/SPI/I2C outputs—internal clock (NMSI) ...
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AC Electrical Characteristics Although the specifications generally reference the rising edge of the clock, the following AC timing diagrams also apply when the falling edge is the active edge. Figure 3 shows the FCC internal clock. BRG_OUT sp16a FCC input ...
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Figure 5 shows the SCC/SMC/SPI/I Serial CLKin SCC/SMC/SPI/I2C input signals (See note) SCC/SMC/SPI/I2C output signals (See note) Note: There are four possible timing conditions for SCC and SPI: 1. Input sampled on the rising edge and output driven on the ...
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AC Electrical Characteristics Figure 7 shows TDM input and output signals. Serial CLKin TDM input signals TDM output signals Note: There are four possible TDM timing conditions: 1. Input sampled on the rising edge and output driven on the rising ...
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SIU AC Characteristics Note the following points about the SIU AC characteristics: • CLKIN jitter and duty cycle. The CLKIN input to the MPC8280 should not exceed +/– 150 psec of jitter (peak-to-peak). This represents total input jitter—the combination ...
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AC Electrical Characteristics Table 12. AC Characteristics for SIU Outputs Spec Number Max Min Characteristic sp33b sp30 DP sp34 sp30 Memory controller signals/ALE sp35 sp30 All other signals sp35a sp30 AP 1 Output specifications are measured from the 50% level ...
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Figure 10 shows signal behavior for all parity modes (including ECC, RMW parity, and standard parity). CLKin DATA bus, ECC, and PARITY mode input signals Pipeline mode— DATA bus, ECC, and PARITY mode input signals DP mode input signal Pipeline ...
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AC Electrical Characteristics Table 13. Tick Spacing for Memory Controller Signals PLL Clock Ratio 1:2, 1:3, 1:4, 1:5, 1:6 1:2.5 1:3.5 Figure representation of the information in CLKin T1 CLKin T1 CLKin T1 Figure 12. Internal Tick ...
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Parameter Input hold times Output valid times Output hold times JTAG external clock to output high impedance 1 All outputs are measured from the midpoint voltage of the falling/rising edge of t The output timings are measured at the pins. ...
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Clock Configuration Modes In each clocking mode, the configuration of bus, core, PCI, and CPM frequencies is determined by seven bits during the power-up reset—three hardware configuration pins (MODCK[1–3]) and four bits from hardware configuration word[28–31] (MODCK_H). Both the PLLs ...
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Table 16. Clock Configurations for Local Bus Mode Bus Clock 2 Mode (MHz) MODCK_H-MODCK[1:3] Low 0010_010 37.5 0010_011 30.0 0010_100 25.0 0010_101 25.0 0010_110 25.0 0010_111 0011_000 30.0 0011_001 25.0 0011_010 25.0 0011_011 25.0 0011_100 0011_101 0011_110 25.0 0011_111 25.0 ...
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Clock Configuration Modes Table 16. Clock Configurations for Local Bus Mode Bus Clock 2 Mode (MHz) MODCK_H-MODCK[1:3] Low 0111_001 0111_010 0111_011 50.0 0111_100 42.9 0111_101 37.5 0111_110 33.3 0111_111 1000_000 1000_001 1000_010 42.9 1000_011 37.5 1000_100 33.3 1000_101 30.0 1000_110 ...
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PCI Host Mode Table 17 and Table 18 show clock configurations for PCI host mode. The frequencies listed are for the purpose of illustration only. Users must select a mode and input bus frequency so that the resulting configuration ...
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Clock Configuration Modes Table 17. Clock Configurations for PCI Host Mode (PCI_MODCK=0) 4 Bus Clock 3 Mode (MHz) Multiplication MODCK_H- Low High MODCK[1-3] 0010_100 75.0 100.0 0010_101 75.0 100.0 0010_110 75.0 100.0 0011_000 50.0 66.7 0011_001 50.0 66.7 0011_010 50.0 ...
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Table 17. Clock Configurations for PCI Host Mode (PCI_MODCK=0) 4 Bus Clock 3 Mode (MHz) Multiplication MODCK_H- Low High MODCK[1-3] 0111_100 50.0 66.7 1000_000 1000_001 66.7 88.9 1000_010 66.7 88.9 1000_011 66.7 88.9 1000_100 66.7 88.9 1000_101 66.7 88.9 1000_110 ...
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Clock Configuration Modes Table 17. Clock Configurations for PCI Host Mode (PCI_MODCK=0) 4 Bus Clock 3 Mode (MHz) Multiplication MODCK_H- Low High MODCK[1-3] 1101_000 100.0 133.3 1101_001 100.0 133.3 1101_010 100.0 133.3 1101_011 100.0 133.3 1101_100 100.0 133.3 1101_101 125.0 ...
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Table 18. Clock Configurations for PCI Host Mode (PCI_MODCK=1) 4 Bus Clock 3 Mode (MHz) Multiplication MODCK_H- Factor Low High MODCK[1-3] 0000_000 60.0 100.0 0000_001 50.0 100.0 0000_010 60.0 120.0 0000_011 60.0 120.0 0000_100 60.0 120.0 0000_101 50.0 100.0 0000_110 ...
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Clock Configuration Modes Table 18. Clock Configurations for PCI Host Mode (PCI_MODCK=1) 4 Bus Clock 3 Mode (MHz) Multiplication MODCK_H- Factor Low High MODCK[1-3] 0100_011 25.0 50.0 0101_000 60.0 100.0 0101_001 50.0 100.0 0101_010 50.0 100.0 0101_011 50.0 100.0 0101_100 ...
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Table 18. Clock Configurations for PCI Host Mode (PCI_MODCK=1) 4 Bus Clock 3 Mode (MHz) Multiplication MODCK_H- Factor Low High MODCK[1-3] 1001_010 57.1 114.3 1001_011 57.1 114.3 1001_100 57.1 114.3 1001_101 42.9 85.7 1001_110 42.9 85.7 1001_111 42.9 85.7 1010_000 ...
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Clock Configuration Modes Table 18. Clock Configurations for PCI Host Mode (PCI_MODCK=1) 4 Bus Clock 3 Mode (MHz) Multiplication MODCK_H- Low High MODCK[1-3] 1110_010 50.0 100.0 1110_011 50.0 100.0 1110_100 50.0 100.0 1100_000 1100_001 1100_010 1 The “low” values are ...
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Table 19. Clock Configurations for PCI Agent Mode (PCI_MODCK=0) PCI Clock 3 Mode (MHz) Multiplication MODCK_H- Factor Low High MODCK[1-3] 0000_000 60.0 66.7 0000_001 50.0 66.7 0000_010 50.0 66.7 0000_011 50.0 66.7 0000_100 50.0 66.7 0000_101 50.0 66.7 0000_110 50.0 ...
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Clock Configuration Modes Table 19. Clock Configurations for PCI Agent Mode (PCI_MODCK=0) PCI Clock 3 Mode (MHz) Multiplication MODCK_H- Factor Low High MODCK[1-3] 0101_000 50.0 66.7 0101_001 50.0 66.7 0101_010 50.0 66.7 0101_011 50.0 66.7 0101_100 50.0 66.7 0101_101 50.0 ...
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Table 19. Clock Configurations for PCI Agent Mode (PCI_MODCK=0) PCI Clock 3 Mode (MHz) Multiplication MODCK_H- Factor Low High MODCK[1-3] 1010_000 1010_001 50.0 66.7 1010_010 50.0 66.7 1010_011 50.0 66.7 1010_100 50.0 66.7 1011_000 1011_001 50.0 66.7 1011_010 50.0 66.7 ...
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Clock Configuration Modes Table 19. Clock Configurations for PCI Agent Mode (PCI_MODCK=0) PCI Clock 3 Mode (MHz) Multiplication MODCK_H- Factor Low High MODCK[1-3] 1100_000 1100_001 1100_010 1 The “low” values are the minimum allowable frequencies for a given clock mode. ...
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Table 20. Clock Configurations for PCI Agent Mode (PCI_MODCK=1) PCI Clock 3 Mode (MHz) Multiplication MODCK_H- Factor Low High MODCK[1-3] 0010_001 25.0 50.0 0010_010 25.0 50.0 0010_011 25.0 50.0 0010_100 25.0 50.0 0011_000 0011_001 37.5 50.0 0011_010 32.1 50.0 0011_011 ...
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Clock Configuration Modes Table 20. Clock Configurations for PCI Agent Mode (PCI_MODCK=1) PCI Clock 3 Mode (MHz) Multiplication MODCK_H- Factor Low High MODCK[1-3] 0111_000 25.0 50.0 0111_001 25.0 50.0 0111_010 25.0 50.0 0111_011 25.0 50.0 1000_000 1000_001 25.0 50.0 1000_010 ...
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Table 20. Clock Configurations for PCI Agent Mode (PCI_MODCK=1) PCI Clock 3 Mode (MHz) Multiplication MODCK_H- Factor Low High MODCK[1-3] 1100_111 25.0 50.0 1101_000 25.0 50.0 1101_001 25.0 50.0 1101_010 25.0 50.0 1101_011 25.0 50.0 1101_100 25.0 50.0 1110_000 25.0 ...
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... ZU and VV Packages—MPC8280 and MPC8270 The following figures and table represent the standard 480 TBGA package. For information on the alternate package, refer to Section 8.2, “VR and ZQ Packages—MPC8275 and MPC8270,” on page Figure 13 shows the pinout of the ZU and VV packages as viewed from the top surface. ...
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Figure 14 shows the side profile of the TBGA package to indicate the direction of the top surface view. Copper Heat Spreader (Oxidized for Insulation) Polymide Tape Soldermask 1.27 mm Pitch Table 21 shows the pinout list of the MPC8280 ...
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Pinout Table 21. MPC8280 and MPC8270 (ZU and VV Packages) Pinout List (continued) MPC8280/MPC8270 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 TT0 TT1 TT2 TT3 TT4 TBST TSIZ0 TSIZ1 TSIZ2 TSIZ3 AACK ...
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Table 21. MPC8280 and MPC8270 (ZU and VV Packages) Pinout List (continued) MPC8280/MPC8270 D10 D11 D12 D13 D14 D15 D16 D17 D18 D19 D20 D21 D22 D23 D24 D25 D26 D27 D28 D29 D30 ...
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Pinout Table 21. MPC8280 and MPC8270 (ZU and VV Packages) Pinout List (continued) MPC8280/MPC8270 D37 D38 D39 D40 D41 D42 D43 D44 D45 D46 D47 D48 D49 D50 D51 D52 D53 D54 D55 D56 D57 D58 D59 D60 D61 D62 ...
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Table 21. MPC8280 and MPC8270 (ZU and VV Packages) Pinout List (continued) MPC8280/MPC8270 IRQ6/DP6/CSE0 IRQ7/DP7/CSE1 PSDVAL TA TEA GBL/IRQ1 CI/BADDR29/IRQ2 WT/BADDR30/IRQ3 L2_HIT/IRQ4 CPU_BG/BADDR31/IRQ5/CINT CPU_DBG CPU_BR CS0 CS1 CS2 CS3 CS4 CS5 CS6 CS7 CS8 CS9 CS10/BCTL1 CS11/AP0 BADDR27 BADDR28 ALE ...
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Pinout Table 21. MPC8280 and MPC8270 (ZU and VV Packages) Pinout List (continued) MPC8280/MPC8270 PWE5/PSDDQM5/PBS5 PWE6/PSDDQM6/PBS6 PWE7/PSDDQM7/PBS7 PSDA10/PGPL0 PSDWE/PGPL1 POE/PSDRAS/PGPL2 PSDCAS/PGPL3 PGTA/PUPMWAIT/PGPL4/PPBS PSDAMUX/PGPL5 LWE0/LSDDQM0/LBS0/PCI_CFG0 LWE1/LSDDQM1/LBS1/PCI_CFG1 LWE2/LSDDQM2/LBS2/PCI_CFG2 LWE3/LSDDQM3/LBS3/PCI_CFG3 LSDA10/LGPL0/PCI_MODCKH0 LSDWE/LGPL1/PCI_MODCKH1 LOE/LSDRAS/LGPL2/PCI_MODCKH2 LSDCAS/LGPL3/PCI_MODCKH3 LGTA/LUPMWAIT/LGPL4/LPBS LGPL5/LSDAMUX/PCI_MODCK LWR L_A14/PAR L_A15/FRAME/SMI L_A16/TRDY L_A17/IRDY/CKSTP_OUT L_A18/STOP L_A19/DEVSEL ...
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Table 21. MPC8280 and MPC8270 (ZU and VV Packages) Pinout List (continued) MPC8280/MPC8270 L_A27/GNT2/HSENUM L_A28/RST/CORE_SRESET L_A29/INTA L_A30/REQ2 L_A31/DLLOUT LCL_D0/AD0 LCL_D1/AD1 LCL_D2/AD2 LCL_D3/AD3 LCL_D4/AD4 LCL_D5/AD5 LCL_D6/AD6 LCL_D7/AD7 LCL_D8/AD8 LCL_D9/AD9 LCL_D10/AD10 LCL_D11/AD11 LCL_D12/AD12 LCL_D13/AD13 LCL_D14/AD14 LCL_D15/AD15 LCL_D16/AD16 LCL_D17/AD17 LCL_D18/AD18 LCL_D19/AD19 LCL_D20/AD20 LCL_D21/AD21 ...
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Pinout Table 21. MPC8280 and MPC8270 (ZU and VV Packages) Pinout List (continued) MPC8280/MPC8270 LCL_D28/AD28 LCL_D29/AD29 LCL_D30/AD30 LCL_D31/AD31 LCL_DP0/C0/BE0 LCL_DP1/C1/BE1 LCL_DP2/C2/BE2 LCL_DP3/C3/BE3 IRQ0/NMI_OUT IRQ7/INT_OUT/APE 1 TRST TCK TMS TDI TDO TRIS 1 PORESET HRESET SRESET QREQ RSTCONF MODCK1/AP1/TC0/BNKSEL0 MODCK2/AP2/TC1/BNKSEL1 MODCK3/AP3/TC2/BNKSEL2 ...
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Table 21. MPC8280 and MPC8270 (ZU and VV Packages) Pinout List (continued) MPC8280/MPC8270 PA8/SMRXD2/FCC2_TXADDR4 PA9/SMTXD2 PA10/MSNUM5 PA11/MSNUM4 PA12/MSNUM3 PA13/MSNUM2 PA14/FCC1_MII_HDLC_RXD3 PA15/FCC1_MII_HDLC_RXD2 PA16/FCC1_MII_HDLC_RXD1/ FCCI_RMII_RXD1 PA17/FCC1_MII_HDLC_RXD0/ FCC1_MII_TRAN_RXD/ FCCI_RMII_RXD0 PA18/FCC1_MII_HDLC_TXD0/ FCC1_MII_TRAN_TXD/ FCC1_RMII_TXD0 PA19/FCC1_MII_HDLC_TXD1/ FCC1_RMII_TXD1 PA20/FCC1_MII_HDLC_TXD2 PA21/FCC1_MII_HDLC_TXD3 PA22 PA23 PA24/MSNUM1 PA25/MSNUM0 PA26/FCC1_RMII_RX_ER PA27/FCC1_MII_RX_DV/ FCC1_RMII_CRS_DV ...
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Pinout Table 21. MPC8280 and MPC8270 (ZU and VV Packages) Pinout List (continued) MPC8280/MPC8270 PB4/FCC3_MII_HDLC_TXD3/ L1RSYNCA2/FCC3_RTS PB5/FCC3_MII_HDLC_TXD2/ L1TSYNCA2/L1GNTA2 PB6/FCC3_MII_HDLC_TXD1/ FCC3_RMII_TXD1/ L1RXDA2/L1RXD0A2 PB7/FCC3_MII_HDLC_TXD0/ FCC3_RMII_TXD0/ FCC3_TXD/L1TXDA2/L1TXD0A2 PB8/FCC3_MII_HDLC_RXD0/ FCC3_RMII_RXD0/ FCC3_RXD/TXD3 PB9/FCC3_MII_HDLC_RXD1/ FCC3_RMII_RXD1/L1TXD2A2 PB10/FCC3_MII_HDLC_RXD2 PB11/FCC3_MII_HDLC_RXD3 PB12/FCC3_MII_CRS/TXD2 PB13/FCC3_MII_COL/L1TXD1A2 PB14/FCC3_MII_RMII_TX_EN//RXD3 PB15/FCC3_MII_TX_ER/RXD2 PB16/FCC3_MII_RMII_RX_ER/CLK18 PB17/FCC3_MII_RX_DV/CLK17/ FCC3_RMII_CRS_DV PB18/FCC2_MII_HDLC_RXD3/ L1CLKOD2/L1RXD2A2 ...
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Table 21. MPC8280 and MPC8270 (ZU and VV Packages) Pinout List (continued) MPC8280/MPC8270 PB25/FCC2_MII_HDLC_TXD3/ L1TSYNCC2/L1GNTC2 PB26/FCC2_MII_CRS/L1RXDC2 PB27/FCC2_MII_COL/L1TXDC2 PB28/FCC2_MII_RX_ER/ FCC2_RMII_RX_ER/FCC2_RTS/ L1TSYNCB2/L1GNTB2/TXD1 PB29/L1RSYNCB2/FCC2_MII_TX_EN/ FCC2_RMII_TX_EN PB30/FCC2_MII_RX_DV/ FCC2_RMII_CRS_DV/L1RXDB2 PB31/FCC2_MII_TX_ER/L1TXDB2 PC0/DREQ1/BRGO7/SMSYN2/ L1CLKOA2 PC1/DREQ2/BRGO6/L1RQA2/ SPISEL PC2/FCC3_CD/DONE2 PC3/FCC3_CTS/DACK2/CTS4/ USB_RP PC4/SI2_L1ST4/FCC2_CD PC5/SI2_L1ST3/FCC2_CTS PC6/FCC1_CD PC7/FCC1_CTS PC8/CD4/RENA4/SI2_L1ST2/CTS3/ USBRN PC9/CTS4/CLSN4/SI2_L1ST1/ L1TSYNCA2/L1GNTA2/USB_RP ...
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Pinout Table 21. MPC8280 and MPC8270 (ZU and VV Packages) Pinout List (continued) MPC8280/MPC8270 PC14/CD1/RENA1 PC15/CTS1/CLSN1/SMTXD2 PC16/CLK16/TIN4 PC17/CLK15/TIN3/BRGO8 PC18/CLK14/TGATE2 PC19/CLK13/BRGO7/SPICLK PC20/CLK12/TGATE1/USB_OE PC21/CLK11/BRGO6 PC22/CLK10/DONE1/FCC1_UT_TXPRTY PC23/CLK9/BRGO5/DACK1 PC24/CLK8/TOUT4 PC25/CLK7/BRGO4 PC26/CLK6/TOUT3/TMCLK PC27/FCC3_TXD/FCC3_MII_TXD0/ FCC3_RMII_TXD0/CLK5/BRGO3 PC28/CLK4/TIN1/TOUT2/CTS2/CLSN2/ FCC2_RXADDR4 PC29/CLK3/TIN2/BRGO2/CTS1/CLSN1 PC30/CLK2/TOUT1 PC31/CLK1/BRGO1 PD4/BRGO8/FCC3_RTS/SMRXD2 PD5/DONE1 PD6/DACK1 PD7/SMSYN1/FCC1_TXCLAV2 PD8/SMRXD1/BRGO5 PD9/SMTXD1/BRGO3 ...
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Table 21. MPC8280 and MPC8270 (ZU and VV Packages) Pinout List (continued) MPC8280/MPC8270 PD14/L1CLKOC2/I2CSCL PD15/L1RQC2/I2CSDA PD16/SPIMISO PD17/BRGO2/SPIMOSI PD18/SPICLK PD19/SPISEL/BRGO1 PD20/RTS4/TENA4/L1RSYNCA2/ USB_TP PD21/TXD4/L1RXD0A2/L1RXDA2/ USB_TN PD22/RXD4L1TXD0A2/L1TXDA2/ USB_RXD PD23/RTS3/TENA3 PD24/TXD3 PD25/RXD3 PD26/RTS2/TENA2 PD27/TXD2 PD28/RXD2 PD29/RTS1/TENA1 PD30/TXD1 PD31/RXD1 VCCSYN VCCSYN1 CLKIN2 3 SPARE4 MPC8280 ...
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Pinout Table 21. MPC8280 and MPC8270 (ZU and VV Packages) Pinout List (continued) MPC8280/MPC8270 4 PCI_MODE 3 SPARE6 5 No connect I/O power Core power Ground 1 Should be tied to VDDH via a 2K Ω external pull-up resistor. 2 ...
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... Indicates that a signal is part of the media independent interface. RMII Indicates that a signal is part of the reduced media independent interface. 8.2 VR and ZQ Packages—MPC8275 and MPC8270 The following figures and table represent the alternate 516 PBGA package. For information on the standard package for the MPC8280 and the MPC8270, refer to page -42 ...
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Pinout Not ...
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... PowerQUICC II packages. Users should consult “Freescale PowerQUICC II™ Pb-Free Packaging Information” (MPC8250PBFREEPKG) available at www.freescale.com. Table 23 shows the pinout list of the MPC8275 and MPC8270. Table 23. Table 23. MPC8275 and MPC8270 (VR and ZQ Packages) Pinout List MPC8275/MPC8270 BR BG ABB/IRQ2 TS A0 ...
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... Pinout Table 23. MPC8275 and MPC8270 (VR and ZQ Packages) Pinout List (continued) MPC8275/MPC8270 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 TT0 TT1 TT2 TT3 TT4 TBST TSIZ0 TSIZ1 TSIZ2 TSIZ3 AACK ARTRY DBG DBB/IRQ3 MPC8280 PowerQUICC™ II Family Hardware Specifications, Rev. 1.8 ...
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... Table 23. MPC8275 and MPC8270 (VR and ZQ Packages) Pinout List (continued) MPC8275/MPC8270 D9 D10 D11 D12 D13 D14 D15 D16 D17 D18 D19 D20 D21 D22 D23 D24 D25 D26 D27 D28 D29 D30 D31 D32 D33 D34 D35 D36 D37 D38 D39 D40 D41 MPC8280 PowerQUICC™ ...
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... Pinout Table 23. MPC8275 and MPC8270 (VR and ZQ Packages) Pinout List (continued) MPC8275/MPC8270 D42 D43 D44 D45 D46 D47 D48 D49 D50 D51 D52 D53 D54 D55 D56 D57 D58 D59 D60 D61 D62 D63 DP0/RSRV/EXT_BR2 IRQ1/DP1/EXT_BG2 IRQ2/DP2/TLBISYNC/EXT_DBG2 IRQ3/DP3/CKSTP_OUT/EXT_BR3 IRQ4/DP4/CORE_SRESET/EXT_BG3 IRQ5/CINT/DP5/TBEN/EXT_DBG3 IRQ6/DP6/CSE0 IRQ7/DP7/CSE1 ...
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... Table 23. MPC8275 and MPC8270 (VR and ZQ Packages) Pinout List (continued) MPC8275/MPC8270 GBL/IRQ1 CI/BADDR29/IRQ2 WT/BADDR30/IRQ3 L2_HIT/IRQ4 CPU_BG/BADDR31/IRQ5/CINT CPU_DBG CPU_BR CS0 CS1 CS2 CS3 CS4 CS5 CS6 CS7 CS8 CS9 CS10/BCTL1 CS11/AP0 BADDR27 BADDR28 ALE BCTL0 PWE0/PSDDQM0/PBS0 PWE1/PSDDQM1/PBS1 PWE2/PSDDQM2/PBS2 PWE3/PSDDQM3/PBS3 PWE4/PSDDQM4/PBS4 PWE5/PSDDQM5/PBS5 PWE6/PSDDQM6/PBS6 PWE7/PSDDQM7/PBS7 ...
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... Pinout Table 23. MPC8275 and MPC8270 (VR and ZQ Packages) Pinout List (continued) MPC8275/MPC8270 POE/PSDRAS/PGPL2 PSDCAS/PGPL3 PGTA/PUPMWAIT/PGPL4/PPBS PSDAMUX/PGPL5 LWE0/LSDDQM0/LBS0/PCI_CFG0 LWE1/LSDDQM1/LBS1/PCI_CFG1 LWE2/LSDDQM2/LBS2/PCI_CFG2 LWE3/LSDDQM3/LBS3/PCI_CFG3 LSDA10/LGPL0/PCI_MODCKH0 LSDWE/LGPL1/PCI_MODCKH1 LOE/LSDRAS/LGPL2/PCI_MODCKH2 LSDCAS/LGPL3/PCI_MODCKH3 LGTA/LUPMWAIT/LGPL4/LPBS LGPL5/LSDAMUX/PCI_MODCK LWR L_A14/PAR L_A15/FRAME/SMI L_A16/TRDY L_A17/IRDY/CKSTP_OUT L_A18/STOP L_A19/DEVSEL L_A20/IDSEL L_A21/PERR L_A22/SERR L_A23/REQ0 L_A24/REQ1/HSEJSW L_A25/GNT0 L_A26/GNT1/HSLED L_A27/GNT2/HSENUM L_A28/RST/CORE_SRESET ...
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... Table 23. MPC8275 and MPC8270 (VR and ZQ Packages) Pinout List (continued) MPC8275/MPC8270 LCL_D0/AD0 LCL_D1/AD1 LCL_D2/AD2 LCL_D3/AD3 LCL_D4/AD4 LCL_D5/AD5 LCL_D6/AD6 LCL_D7/AD7 LCL_D8/AD8 LCL_D9/AD9 LCL_D10/AD10 LCL_D11/AD11 LCL_D12/AD12 LCL_D13/AD13 LCL_D14/AD14 LCL_D15/AD15 LCL_D16/AD16 LCL_D17/AD17 LCL_D18/AD18 LCL_D19/AD19 LCL_D20/AD20 LCL_D21/AD21 LCL_D22/AD22 LCL_D23/AD23 LCL_D24/AD24 LCL_D25/AD25 LCL_D26/AD26 LCL_D27/AD27 LCL_D28/AD28 LCL_D29/AD29 LCL_D30/AD30 ...
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... Pinout Table 23. MPC8275 and MPC8270 (VR and ZQ Packages) Pinout List (continued) MPC8275/MPC8270 LCL_DP1/C1/BE1 LCL_DP2/C2/BE2 LCL_DP3/C3/BE3 IRQ0/NMI_OUT IRQ7/INT_OUT/APE 1 TRST TCK TMS TDI TDO TRIS 1 PORESET HRESET SRESET QREQ RSTCONF MODCK1/AP1/TC0/BNKSEL0 MODCK2/AP2/TC1/BNKSEL1 MODCK3/AP3/TC2/BNKSEL2 CLKIN1 PA0/RESTART1/DREQ3 PA1/REJECT1/DONE3 PA2/CLK20/DACK3 PA3/CLK19/DACK4/L1RXD1A2 PA4/REJECT2/DONE4 PA5/RESTART2/DREQ4 PA6 ...
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... Table 23. MPC8275 and MPC8270 (VR and ZQ Packages) Pinout List (continued) MPC8275/MPC8270 PA13/MSNUM2 PA14/FCC1_MII_HDLC_RXD3 PA15/FCC1_MII_HDLC_RXD2 PA16/FCC1_MII_HDLC_RXD1/ FCC1_RMII_RXD1 PA17/FCC_MII_HDLC_RXD0/ FCC1_MII_TRAN_RXD/ FCCI_RMII_RXD0 PA18/FCC1_MII_HDLC_TXD0/ FCC1_MIITRAN_TXD/ FCC1_RMII_TXD0 PA19/FCC1_MII_HDLC_TXD1/ FCC1_RMII_TXD1 PA20/FCC1_MII_HDLC_TXD2 PA21/FCC1_MII_HDLC_TXD3 PA22 PA23 PA24/MSNUM1 PA25/MSNUM0 PA26/FCC1_MII_RMII_RX_ER/ PA27/FCC1_MII_RX_DV/ FCC1_RMII_CRS_DV PA28/FCC1_MII_TX_EN/ FCC1_RMII_TX_EN PA29/FCC1_MII_TX_ER PA30/FCC1_MII_CRS/FCC1_RTS PA31/FCC1_MII_COL PB4/FCC3_MII_HDLC_TXD3/ L1RSYNCA2/FCC3_RTS PB5/FCC3_MII_HDLC_TXD2/ L1TSYNCA2/L1GNTA2 ...
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... Pinout Table 23. MPC8275 and MPC8270 (VR and ZQ Packages) Pinout List (continued) MPC8275/MPC8270 PB7/FCC3_MII_HDLC_TXD0/ FCC3_RMII_TXD0/ FCC3_TXD/L1TXDA2/L1TXD0A2 PB8/FCC3_MII_HDLC_RXD0/ FCC3_RMII_RXD0/ FCC3_RXD/TXD3 PB9/FCC3_MII_HDLC_RXD1/ FCC3_RMII_RXD1/L1TXD2A2 PB10/FCC3_MII_HDLC_RXD2 PB11/FCC3_MII_HDLC_RXD3 PB12/FCC3_MII_CRS/TXD2 PB13/FCC3_MII_COL/L1TXD1A2 PB14/FCC3_MII_RMII_TX_EN/RXD3 PB15/FCC3_MII_TX_ER/RXD2 PB16/FCC3_MII_RMII_RX_ER/CLK18 PB17/FCC3_MII_RX_DV/CLK17/ FCC3_RMII_CRS_DV PB18/FCC2_MII_HDLC_RXD3/ L1CLKOD2/L1RXD2A2 PB19FCC2_MII_HDLC_RXD2/ L1RQD2/L1RXD3A2 PB20/FCC2_MII_HDLC_RMII_RXD1/ L1RSYNCD2 PB21//FCC2_MII_HDLC_RMII_RXD0/ FCC2_TRAN_RXD/L1TSYNCD2/ L1GNTD2 PB22/FCC2_MII_HDLC_RMII_TXD0/ FCC2_TXD/FCC2_RMII_TXD0/ L1RXDD2 ...
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... Table 23. MPC8275 and MPC8270 (VR and ZQ Packages) Pinout List (continued) MPC8275/MPC8270 PB29/L1RSYNCB2/ FCC2_MII_TX_EN/FCC2_RMII_TX_EN PB30/FCC2_MII_RX_DV/L1RXDB2/ FCC2_RMII_CRS_DV PB31/FCC2_MII_TX_ER/L1TXDB2 PC0/DREQ1/BRGO7/SMSYN2/ L1CLKOA2 PC1/DREQ2/SPISEL/BRGO6/L1RQA2 PC2/FCC3_CD/DONE2 PC3/FCC3_CTS/DACK2/CTS4/ USB_RP PC4/SI2_L1ST4/FCC2_CD PC5/SI2_L1ST3/FCC2_CTS PC6/FCC1_CD PC7/FCC1_CTS PC8/CD4/RENA4/SI2_L1ST2/CTS3/ USB_RN PC9/CTS4/CLSN4/SI2_L1ST1/ L1TSYNCA2/L1GNTA2/USB_RP PC10/CD3/RENA3 PC11/CTS3/CLSN3/L1TXD3A2 PC12/CD2/RENA2 PC13/CTS2/CLSN2 PC14/CD1/RENA1 PC15/CTS1/CLSN1/SMTXD2 PC16/CLK16/TIN4 PC17/CLK15/TIN3/BRGO8 PC18/CLK14/TGATE2 PC19/CLK13/BRGO7/SPICLK MPC8280 PowerQUICC™ II Family Hardware Specifications, Rev. 1.8 ...
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... Pinout Table 23. MPC8275 and MPC8270 (VR and ZQ Packages) Pinout List (continued) MPC8275/MPC8270 PC20/CLK12/TGATE1/USB_OE PC21/CLK11/BRGO6 PC22/CLK10/DONE1 PC23/CLK9/BRGO5/DACK1 PC24/CLK8/TOUT4 PC25/CLK7/BRGO4 PC26/CLK6/TOUT3/TMCLK PC27/FCC3_TXD/FCC3_MII_TXD0/ FCC3_RMII_TXD0/CLK5/BRGO3 PC28/CLK4/TIN1/TOUT2/CTS2/CLSN2 PC29/CLK3/TIN2/BRGO2/CTS1/CLSN1 PC30/CLK2/TOUT1 PC31/CLK1/BRGO1 PD4/BRGO8/FCC3_RTS/SMRXD2 PD5/DONE1 PD6/DACK1 PD7/SMSYN1/FCC1_TXCLAV2 PD8/SMRXD1/BRGO5 PD9/SMTXD1/BRGO3 PD10/L1CLKOB2/BRGO4 PD11/L1RQB2 PD12 PD13 PD14/L1CLKOC2/I2CSCL PD15/L1RQC2/I2CSDA PD16/SPIMISO PD17/BRGO2/SPIMOSI PD18/SPICLK MPC8280 PowerQUICC™ II Family Hardware Specifications, Rev. 1.8 ...
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... Table 23. MPC8275 and MPC8270 (VR and ZQ Packages) Pinout List (continued) MPC8275/MPC8270 PD19/SPISEL/BRGO1 PD20/RTS4/TENA4/L1RSYNCA2/ USB_TP PD21/TXD4/L1RXD0A2/L1RXDA2/ USB_TN PD22/RXD4L1TXD0A2/L1TXDA2/ USB_RXD PD23/RTS3/TENA3 PD24/TXD3 PD25/RXD3 PD26/RTS2/TENA2 PD27/TXD2 PD28/RXD2 PD29/RTS1/TENA1 PD30/TXD1 PD31/RXD1 VCCSYN VCCSYN1 CLKIN2 3 SPARE4 4 PCI_MODE 3 SPARE6 5 No connect I/O power MPC8280 PowerQUICC™ II Family Hardware Specifications, Rev. 1.8 ...
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... GND with the noise filtering capacitors. 7 XFC (A18) pin: This pin is used in MPC826x(A) devices not used in MPC8275/MPC8270 because there is no need for external capacitor to operate the PLL. New designs should connect A18 (XFC) pin to GND. Old designs in which the MPC8275/MPC8270 is used as a drop-in replacement can leave the pin connected to the current capacitor. ...
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... Package Devices 37.5 × 37.5 ZU MPC8280 MPC8270 37.5 × 37.5 VV MPC8280 MPC8270 VR MPC8275VR MPC8270VR ZQ MPC8275ZQ MPC8270ZQ MPC8280 PowerQUICC™ II Family Hardware Specifications, Rev. 1.8 Freescale Semiconductor Table 24. Package Parameters Outline Type Interconnects (mm) TBGA 480 TBGA 480 27 × 27 PBGA 516 27 × 27 PBGA 516 Package Description Pitch Nominal Unmounted ...
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Package Description 9.2 Mechanical Dimensions Figure 17 provides the mechanical dimensions and bottom surface nomenclature of the 480 TBGA (ZU/VV) package. Refer to Table 2. Figure 17. Mechanical Dimensions and Bottom Surface Nomenclature—480 TBGA MPC8280 PowerQUICC™ II Family Hardware Specifications, ...
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Figure 18 provides the mechanical dimensions and bottom surface nomenclature of the 516 PBGA (VR/ZQ) packages. Figure 18. Mechanical Dimensions and Bottom Surface Nomenclature—516 PBGA MPC8280 PowerQUICC™ II Family Hardware Specifications, Rev. 1.8 Freescale Semiconductor Package Description 75 ...
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Ordering Information 10 Ordering Information Figure 19 provides an example of the Freescale part numbering nomenclature for the MPC8280. In addition to the processor frequency, the part numbering scheme also consists of a part modifier that indicates any enhancement(s) in ...
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Table 25. Document Revision History (continued) Revision Date 1.2 12/2004 • Section 2: removed voltage tracking note • Table 3: Note 2 updated regarding VDD/VCCSYN relationship to VDDH during power-on reset • Table 5: Note 2 updated to reflect VIH=2.5 ...
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Document Revision History Table 25. Document Revision History (continued) Revision Date 1.0 2/2004 • Removal of “Advance Information” and “Preliminary.” The MPC8280 is fully qualified. • Table 1: New • Figure 1: Modification to note 2 • Section 1.1: Core ...
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... Removal of notes stating “no local bus” on VR-package devices. The MPC8270VR and the MPC8275VR have local bus support. • References to “G2 core” changed to “G2_LE core.” Refer to the G2 Core Reference Manual (G2CORERM/D). • Addition of VCCSYN to “Note” below • ...
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... Freescale Semiconductor was negligent regarding the design or manufacture of the part. Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. The PowerPC name is a trademark of IBM Corp. and is used under license. All other product or service names are the property of their respective owners. © ...