MPC930

Manufacturer Part NumberMPC930
ManufacturerFreescale Semiconductor, Inc
MPC930 datasheet
 


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MPC930 MPC931
3.0
OutA
t D = 3.8956
OutB
2.5
t D = 3.9386
2.0
In
1.5
1.0
0.5
0
2
4
6
8
TIME (nS)
Figure 17. Single versus Dual Waveforms
Since this step is well above the threshold region it will not
cause any false clock triggering, however designers may be
uncomfortable with unwanted reflections on the line. To
MOTOROLA
better match the impedances when driving multiple lines the
situation in Figure 18 should be used. In this case the series
terminating resistors are reduced such that when the parallel
combination is added to the output buffer impedance the line
impedance is perfectly matched.
MPC930/931
OUTPUT
BUFFER
7Ω
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Figure 18. Optimized Dual Line Termination
SPICE level output buffer models are available for
engineers who want to simulate their specific interconnect
schemes. In addition IV characteristics are in the process of
being generated to support the other board level simulators in
general use.
12
Z O = 50Ω
R S = 36Ω
Z O = 50Ω
R S = 36Ω
k
k
7Ω + 36Ω
36Ω = 50Ω
50Ω
25Ω = 25Ω
TIMING SOLUTIONS
BR1333 — Rev 6