ADSP2186 Analog Devices, ADSP2186 Datasheet
ADSP2186
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ADSP2186 Summary of contents
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... ICE-Port is a trademark of Analog Devices, Inc. All trademarks are the property of their respective holders. REV. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use ...
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... EZ-ICE, nor are any adapters needed. Due to the small footprint of the EZ-ICE connector, emulation can be supported in final board designs. SoundPort and EZ-ICE are registered trademarks of Analog Devices, Inc. The EZ-ICE performs a full range of functions, including: • In-target operation • ...
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The internal result (R) bus connects the computational units so the output of any unit may be the input of any unit on the next cycle. A powerful program sequencer and two dedicated data address generators ensure efficient delivery of ...
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ADSP-2186 cases where pin functionality is reconfigurable, the default state is shown in plain text; alternate functionality is shown in italics. Common-Mode Pins # Input/ Pin of Out- Name(s) Pins put Function RESET 1 I Processor Reset Input BR 1 ...
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To minimize power consumption during power-down, configure the programmable flag as an output when connected to a three- stated buffer. This ensures that the pin will be held at a constant level and not oscillate should the three-state driver’s level ...
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ADSP-2186 Idle When the ADSP-2186 is in the Idle Mode, the processor waits indefinitely in a low power state until an interrupt occurs. When an unmasked interrupt occurs serviced; execution then continues with the instruction following the IDLE ...
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Clock Signals The ADSP-2186 can be clocked by either a crystal or a TTL- compatible clock signal. The CLKIN input cannot be halted, changed during operation or operated below the specified frequency during normal opera- tion. The only exception is ...
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ADSP-2186 There are 8K words of memory accessible internally when the PMOVLAY register is set to 0. When PMOVLAY is set to some- thing other than 0, external accesses occur at addresses 0x2000 through 0x3FFF. The external address is generated ...
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Boot Memory Select (BMS) Disable The ADSP-2186 also lets you boot the processor from one external memory space while using a different external memory space for BDMA transfers during normal operation. You can use the CMS to select the first ...
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ADSP-2186 The IDMA port has a 16-bit multiplexed address and data bus and supports 24-bit program memory. The IDMA port is com- pletely asynchronous and can be written to while the ADSP- 2186 is operating at full speed. The DSP ...
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IDMA Port Booting The ADSP-2186 can also boot programs through its Internal DMA port. If Mode Mode and Mode the ADSP-2186 boots from the IDMA port. The IDMA feature can load ...
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ADSP-2186 I/O Space Instructions The instructions used to access the ADSP-2186’s I/O memory space are as follows: Syntax: IO(addr) = dreg dreg = IO(addr); where addr is an address value between 0 and 2047 and dreg is any of the ...
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Target Memory Interface For your target system to be compatible with the EZ-ICE emu- lator, it must comply with the memory interface guidelines listed below. PM, DM, BM, IOM, and CM Design a Program Memory (PM), Data Memory (DM), Byte ...
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ADSP-2186 SPECIFICATIONS RECOMMENDED OPERATING CONDITIONS Parameter Min V 4 AMB ELECTRICAL CHARACTERISTICS Parameter V Hi-Level Input Voltage IH V Hi-Level CLKIN Voltage IH V Lo-Level Input Voltage IL V Hi-Level Output Voltage OH V Lo-Level Output Voltage ...
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ABSOLUTE MAXIMUM RATINGS* Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . –0 Input Voltage . . . ...
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ADSP-2186 TIMING PARAMETERS Parameter Clock Signals and Reset Timing Requirements: t CLKIN Period CKI t CLKIN Width Low CKIL t CLKIN Width High CKIH Switching Characteristics: t CLKOUT Width Low CKL t CLKOUT Width High CKH t CLKIN High to ...
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TIMING PARAMETERS Parameter Interrupts and Flag Timing Requirements: IRQx, FI, or PFx Setup before CLKOUT Low t IFS IRQx, FI, or PFx Hold after CLKOUT High t IFH Switching Characteristics: t Flag Output Hold after CLKOUT Low FOH t Flag ...
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ADSP-2186 Parameter Bus Request–Bus Grant Timing Requirements: BR Hold after CLKOUT High Setup before CLKOUT Low t BS Switching Characteristics: CLKOUT High to xMS, RD, WR Disable t SD xMS, RD, WR Disable to BG Low t ...
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TIMING PARAMETERS Parameter Memory Read Timing Requirements: RD Low to Data Valid t RDD A0–A13, xMS to Data Valid t AA Data Hold from RD High t RDH Switching Characteristics: RD Pulsewidth t RP CLKOUT High to RD Low t ...
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ADSP-2186 Parameter Memory Write Switching Characteristics: Data Setup before WR High t DW Data Hold after WR High Pulsewidth Low to Data Enabled t WDE A0–A13, xMS Setup before WR Low t ASW Data ...
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TIMING PARAMETERS Parameter Serial Ports Timing Requirements: t SCLK Period SCK t DR/TFS/RFS Setup before SCLK Low SCS t DR/TFS/RFS Hold after SCLK Low SCH t SCLK Width SCP IN Switching Characteristics: t CLKOUT High to SCLK CC t SCLK ...
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ADSP-2186 Parameter IDMA Address Latch Timing Requirements: t Duration of Address Latch IALP t IAD15–0 Address Setup before Address Latch End IASU t IAD15–0 Address Hold after Address Latch End IAH IACK Low before Start of Address Latch t IKA ...
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TIMING PARAMETERS Parameter IDMA Write, Short Write Cycle Timing Requirements: IACK Low before Start of Write t IKW Duration of Write IWP t IAD15–0 Data Setup before End of Write IDSU t IAD15–0 Data Hold after End ...
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ADSP-2186 Parameter IDMA Write, Long Write Cycle Timing Requirements: IACK Low before Start of Write t IKW IAD15–0 Data Setup before IACK Low t IKSU IAD15–0 Data Hold after IACK Low t IKH Switching Characteristics: Start of Write to IACK ...
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TIMING PARAMETERS Parameter IDMA Read, Long Read Cycle Timing Requirements: IACK Low before Start of Read t IKR End Read after IACK Low t IRK Switching Characteristics: IACK High after Start of Read t IKHR IAD15–0 Data Setup before IACK ...
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ADSP-2186 Parameter IDMA Read, Short Read Cycle Timing Requirements: IACK Low before Start of Read t IKR t Duration of Read IRP Switching Characteristics: IACK High after Start of Read t IKHR t IAD15–0 Data Hold after End of Read ...
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OUTPUT DRIVE CURRENTS Figure 22 shows typical I-V characteristics for the output drivers of the ADSP-2186. The curves represent the current drive capability of the output drivers as a function of output voltage 5.5V, – ...
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ADSP-2186 CAPACITIVE LOADING Figures 24 and 25 show the capacitive loading characteristics of the ADSP-2186 + 4. 100 150 200 C – Figure ...
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ENVIRONMENTAL CONDITIONS Ambient Temperature Rating – ( AMB CASE Case Temperature in C CASE PD = Power Dissipation Thermal Resistance (Case-to-Ambient Thermal Resistance (Junction-to-Ambient Thermal ...
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ADSP-2186 A4/IAD3 1 PIN 1 A5/IAD4 2 IDENTIFIER GND 3 A6/IAD5 4 5 A7/IAD6 A8/IAD7 6 A9/IAD8 7 A10/IAD9 8 A11/IAD10 9 A12/IAD11 10 A13/IAD12 11 GND 12 13 CLKIN XTAL 14 VDD 15 CLKOUT 16 GND 17 VDD 18 ...
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The ADSP-2186 package pinout is shown in the table below. Pin names in bold text replace the plain text named functions when Mode sign separates two functions when either function can be active for either ...
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ADSP-2186 GND GND D22 D16 D17 D18 D14 NC D15 GND NC D12 D10 GND VDD D4 GND NC GND VDD VDD D1/IAD14 EBG BR EBR EINT ELOUT ELIN EMS ECLK ...
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The ADSP-2186 Mini-BGA package pinout is shown in the table below. Pin names in bold text replace the plain text named func- tions when Mode sign separates two functions when either function can be active ...
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ADSP-2186 Ambient Temperature Part Number Range ADSP-2186KST-115 +70 C ADSP-2186BST-115 – +85 C ADSP-2186KST-133 +70 C ADSP-2186BST-133 – +85 C ADSP-2186KST-160 +70 C ADSP-2186BST-160 – ...
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NOTE THE ACTUAL POSITION OF THE BALL GRID IS WITHIN 0.006 (0.150) OF ITS IDEAL POSITION RELATIVE TO THE PACKAGE EDGES. THE ACTUAL POSITION OF EACH BALL IS WITHIN 0.002 (0.05) OF ITS IDEAL ...
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