VSC7121 Vitesse Semiconductor Corp., VSC7121 Datasheet

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VSC7121

Manufacturer Part Number
VSC7121
Description
Manufacturer
Vitesse Semiconductor Corp.
Datasheet

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Part Number
Manufacturer
Quantity
Price
Part Number:
VSC7121QM
Manufacturer:
VITESSE
Quantity:
6 218
Part Number:
VSC7121QM
Manufacturer:
XILINX
0
VSC7121
Data Sheet
8/31/98
G52110-0, Rev. 4.1
part to minimize part count, cost, high frequency routing, and jitter accumulation. Port Bypass Circuits are used
to provide resiliency in Fibre Channel Arbitrated Loop (FC-AL) architectures. PBC’s are used within FC-AL
disk arrays to allow for resiliency and hot swapping of FC-AL drives.
MAL mode, the disk drive is connected to the loop. Data goes from the 7121’s L_SOn pin to the Disk Drive RX
input and data from the disk drive TX output goes to the 7121’s L_SIn pin. Refer to Figure 2 for disk drive
application. In BYPASS mode, the disk drive is either absent or non-functional and data bypasses to the next
available disk drive. Normal mode is enabled with a HIGH on the SEL pin and BYPASS mode is enabled by a
LOW on the SEL pin. Direct Attach Fibre Channel Disk Drives have an “LRC Interlock” signal defined to con-
trol the SEL function.
AL drives are all expected to be dual loop. The VSC7121 is cascaded in a manner such that all the 7121’s inter-
nal PBC’s are used in the same loop. For dual loop implementations, two or more VSC7121’s should be used.
Allocating each VSC7121 to only one of two loops preserves redundancy, prevents a single point of failure and
lends itself to on-line maintainability.
7121 Block Diagram
disk arrays with a noninteger multiple of 4 disk drives, the unused PBC’s can be hardwired to bypass with a
external pulldown resistor.
Description
IN+
IN-
The VSC7121 is a Quad Port Bypass Circuit (PBC). Four Fibre Channel PBC’s are cascaded into a single
A Port Bypass Circuit is a 2:1 Multiplexer with two modes of operation: NORMAL and BYPASS. In NOR-
Using a VSC7121 in a single loop of a disk array is illustrated in Figure 2: “Disk Array Application”. FC-
The VSC7121 can be cascaded through the IN and OUT pins for arrays of disk drives greater than 4. For
• Supports ANSI X3T11 1.0625 Gbit/sec
• Fully Differential for Minimum
• Quad PBC’s in Single Package
FC-AL Disk Attach for Resiliency
Jitter Accumulation.
PBC1
741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896
1
0
VITESSE
VITESSE SEMICONDUCTOR CORPORATION
SEMICONDUCTOR CORPORATION
PBC2
1
0
Quad Port Bypass Circuit for 1.0625 Gbit/sec
PBC3
Fibre Channel Arbitrated Loop Disk Arrays
• TTL Bypass Select
• High Speed, PECL I/O’s Referenced to V
• 0.5W Typical Power Dissipation
• 3.3V Power Supply
• 44-Pin, 10mm PQFP
1
0
PBC4
1
0
OUT+
OUT-
DD
.
Page 1

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VSC7121 Summary of contents

Page 1

... Using a VSC7121 in a single loop of a disk array is illustrated in Figure 2: “Disk Array Application”. FC- AL drives are all expected to be dual loop. The VSC7121 is cascaded in a manner such that all the 7121’s inter- nal PBC’s are used in the same loop. For dual loop implementations, two or more VSC7121’s should be used. ...

Page 2

... Quad Port Bypass Circuit for 1.0625 Gbit/sec Fibre Channel Arbitrated Loop Disk Arrays Table truth table detailing the data flow through the VSC7121. Figure 1 shows a timing diagram of the data relationship in the VSC7121. There are no critical timing (setup, hold, or delay) parameters for the VSC7121 as this part routes the serial data encoded with the baud clock that is extracted by a Fibre Channel receiver ...

Page 3

... Data Sheet VSC7121 Optics Dual Copper DB-9 JBOD G52110-0, Rev. 4.1 8/31/98 741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896 VITESSE SEMICONDUCTOR CORPORATION Quad Port Bypass Circuit for 1.0625 Gbit/sec Fibre Channel Arbitrated Loop Disk Arrays Figure 2: Disk Array Application 7120 ...

Page 4

... VITESSE SEMICONDUCTOR CORPORATION Data Sheet VSC7121 Units Conditions Delay with all circuits bypassed Ohm Load Delay with all circuits bypassed Ohm load. ps. 20% to 80%, tested on a sample basis Units Conditions ...

Page 5

... Data Sheet VSC7121 Absolute Maximum Ratings TTL Power Supply Voltage, (V PECL DC Input Voltage, (V INP TTL DC Input Voltage ..........................................................................................................-0.5V to 5.5V INT DC Voltage Applied to Outputs for High Output State, (V TTL Output Current (I ), (DC, Output High)........................................................................................... 50mA OUT PECL Output Current (DC, Output High) ......................................................................................-50mA ...

Page 6

... Because the VSC7121 output buffers are PECL outputs referenced to V puts may not be direct coupled to the high speed differential inputs. One example of how to differentially cas- cade the two VSC7121 is shown in Figure 4. This circuit only applies if trace lengths are less than three inches. VSC7121 Page 6 741 Calle Plano, Camarillo, CA 93012 • ...

Page 7

... Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896 VITESSE SEMICONDUCTOR CORPORATION Quad Port Bypass Circuit for 1.0625 Gbit/sec Fibre Channel Arbitrated Loop Disk Arrays Figure 5: Pin Diagram VSC7121 VITESSE SEMICONDUCTOR CORPORATION 35 33 VSS VDD ...

Page 8

... Ground. Ground pins are physically attached to the die mounting surface, and are an important part of the thermal path. For best thermal performance, all ground pins should be connected to a ground plane, using multiple vias if possible. VITESSE SEMICONDUCTOR CORPORATION Data Sheet VSC7121 G52110-0, Rev. 4.1 8/31/98 ...

Page 9

... Data Sheet VSC7121 Package Information 0.30 RAD. TYP. 0.20 RAD. TYP. NOTES: Drawing not to scale. Cavity up All units in mm unless otherwise noted. G52110-0, Rev. 4.1 8/31/98 741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896 VITESSE SEMICONDUCTOR CORPORATION Quad Port Bypass Circuit for 1.0625 Gbit/sec ...

Page 10

... Fibre Channel Arbitrated Loop Disk Arrays Package Thermal Characteristics The VSC7121 is packaged into a standard plastic quad flatpack with an embedded, but unexposed thermal slug. This package adheres to industry standard EIAJ footprints for a 10x10mm body, 44 lead PQFP. The pack- age construction is as shown in Figure 6. The 44 PQFP with embedded slug has the thermal properties shown in Table 5 ...

Page 11

... Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896 VITESSE SEMICONDUCTOR CORPORATION Quad Port Bypass Circuit for 1.0625 Gbit/sec Fibre Channel Arbitrated Loop Disk Arrays VSC71XX QM VSC7121 - 1.0625 Gbits/sec Port Bypass Circuit VITESSE VSC7121QM ####AAAA Lot Tracking Code Date Code VITESSE SEMICONDUCTOR CORPORATION Package Suffi ...

Page 12

... Quad Port Bypass Circuit for 1.0625 Gbit/sec Fibre Channel Arbitrated Loop Disk Arrays Page 12 741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896 VITESSE SEMICONDUCTOR CORPORATION VITESSE SEMICONDUCTOR CORPORATION Data Sheet VSC7121 G52110-0, Rev. 4.1 8/31/98 ...

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