AT90S8515

Manufacturer Part NumberAT90S8515
Description8-bit microcontroller with 8K bytes in-system programmable flash, 2.7-6.0V
ManufacturerATMEL Corporation
AT90S8515 datasheet
 
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
Page 21
22
Page 22
23
Page 23
24
Page 24
25
Page 25
26
Page 26
27
Page 27
28
Page 28
29
Page 29
30
Page 30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
Page 22/112:

Reset and Interrupt Handling

Download datasheet (3Mb)Embed
PrevNext
Reset and Interrupt
Handling
AT90S8515
22
The AT90S8515 provides 12 different interrupt sources. These interrupts and the sepa-
rate reset vector each have a separate program vector in the program memory space.
All interrupts are assigned individual enable bits that must be set (one) together with the
I-bit in the Status Register in order to enable the interrupt.
The lowest addresses in the program memory space are automatically defined as the
Reset and Interrupt vectors. The complete list of vectors is shown in Table 2. The list
also determines the priority levels of the different interrupts. The lower the address, the
higher the priority level. RESET has the highest priority, and next is INT0 (the External
Interrupt Request 0), etc.
Table 2. Reset and Interrupt Vectors
Program
Vector No.
Address
Source
1
$000
RESET
2
$001
INT0
3
$002
INT1
4
$003
TIMER1 CAPT
5
$004
TIMER1 COMPA
6
$005
TIMER1 COMPB
7
$006
TIMER1 OVF
8
$007
TIMER0, OVF
9
$008
SPI, STC
10
$009
UART, RX
11
$00A
UART, UDRE
12
$00B
UART, TX
13
$00C
ANA_COMP
The most typical and general program setup for the Reset and Interrupt vector
addresses are:
Address
Labels
Code
$000
rjmp
$001
rjmp
$002
rjmp
$003
rjmp
$004
rjmp
$005
rjmp
$006
rjmp
$007
rjmp
$008
rjmp
$009
rjmp
$00a
rjmp
$00b
rjmp
$00c
rjmp
;
$00d
MAIN:
ldi r16,high(RAMEND); Main program start
$00e
out SPH,r16
Interrupt Definition
External Reset, Power-on Reset and
Watchdog Reset
External Interrupt Request 0
External Interrupt Request 1
Timer/Counter1 Capture Event
Timer/Counter1 Compare Match A
Timer/Counter1 Compare Match B
Timer/Counter1 Overflow
Timer/Counter0 Overflow
Serial Transfer Complete
UART, Rx Complete
UART Data Register Empty
UART, Tx Complete
Analog Comparator
Comments
RESET
; Reset Handler
EXT_INT0
; IRQ0 Handler
EXT_INT1
; IRQ1 Handler
TIM1_CAPT
; Timer1 Capture Handler
TIM1_COMPA
; Timer1 CompareA Handler
TIM1_COMPB
; Timer1 CompareB Handler
TIM1_OVF
; Timer1 Overflow Handler
TIM0_OVF
; Timer0 Overflow Handler
SPI_STC
; SPI Transfer Complete Handler
UART_RXC
; UART RX Complete Handler
UART_DRE
; UDR Empty Handler
UART_TXC
; UART TX Complete Handler
ANA_COMP
; Analog Comparator Handler
0841G–09/01