AT90S8515

Manufacturer Part NumberAT90S8515
Description8-bit microcontroller with 8K bytes in-system programmable flash, 2.7-6.0V
ManufacturerATMEL Corporation
AT90S8515 datasheet
 
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
Page 41
42
Page 42
43
Page 43
44
Page 44
45
Page 45
46
Page 46
47
Page 47
48
Page 48
49
Page 49
50
Page 50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
Page 42/112:

Watchdog Timer

Download datasheet (3Mb)Embed
PrevNext

Watchdog Timer

Watchdog Timer Control
Register – WDTCR
AT90S8515
42
The Watchdog Timer is clocked from a separate On-chip oscillator that runs at 1 MHz.
This is the typical value at V
= 5V. See characterization data for typical values at other
CC
V
levels. By controlling the Watchdog Timer prescaler, the Watchdog reset interval
CC
can be adjusted (see Table 14 for a detailed description). The WDR (Watchdog Reset)
instruction resets the Watchdog Timer. Eight different clock cycle periods can be
selected to determine the reset period. If the reset period expires without another
Watchdog reset, the AT90S8515 resets and executes from the reset vector. For timing
details on the Watchdog reset, refer to page 25.
To prevent unintentional disabling of the Watchdog, a special turn-off sequence must be
followed when the Watchdog is disabled. Refer to the description of the Watchdog Timer
Control Register for details.
Figure 33. Watchdog Timer
Bit
7
6
5
$21 ($41)
Read/Write
R
R
R
Initial Value
0
0
0
• Bits 7..5 – Res: Reserved Bits
These bits are reserved bits in the AT90S8515 and will always read as zero.
• Bit 4 – WDTOE: Watchdog Turn-off Enable
This bit must be set (one) when the WDE bit is cleared. Otherwise, the Watchdog will
not be disabled. Once set, hardware will clear this bit to zero after four clock cycles.
Refer to the description of the WDE bit for a Watchdog disable procedure.
• Bit 3 – WDE: Watchdog Enable
When the WDE is set (one) the Watchdog Timer is enabled, and if the WDE is cleared
(zero) the Watchdog Timer function is disabled. WDE can only be cleared if the WDTOE
bit is set (one). To disable an enabled Watchdog Timer, the following procedure must be
followed:
4
3
2
1
WDTOE
WDE
WDP2
WDP1
WDP0
R/W
R/W
R/W
R/W
0
0
0
0
0
WDTCR
R/W
0
0841G–09/01