CY7C026V-25AC Cypress Semiconductor Corporation., CY7C026V-25AC Datasheet
CY7C026V-25AC
Specifications of CY7C026V-25AC
Related parts for CY7C026V-25AC
CY7C026V-25AC Summary of contents
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Features • True dual-ported memory cells which allow simulta- neous access of the same memory location • 4/8/16K x 16 organization (CY7C024V/025V/026V) • 4/ organization (CY7C0241V/0251V) • 16K x 18 organization (CY7C036V) • 0.35-micron CMOS for optimum ...
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Functional Description The CY7C024V/025V/026V and CY7C0241V/0251V/036V are low-power CMOS 4K, 8K, and 16K x16/18 dual-port static RAMs. Various arbitration schemes are included on the devic handle situations when multiple processors access the same piece of data. Two ports ...
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... CY7C0241V (4K x 18) CY7C0251V ( CY7C026V (16K x 16 CY7C024V/025V/026V CY7C0241V/0251V/036V ...
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Pin Configurations (continued I I/O 4 17L I/O 11L 5 I/O 6 12L I/O 13L 7 I/O 14L 8 GND 9 I/O 10 15L I/O 11 16L GND I/O 14 ...
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Pin Definitions Left Port Right Port R/W R –A A –A 0L 13L 0R 13R I/O –I/O I/O –I/O 0L 17L 0R 17R SEM SEM ...
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Electrical Characteristics Over the Operating Range Parameter Description V Output HIGH Voltage ( Output LOW Voltage OL V Input HIGH Voltage IH V Input LOW Voltage IL I Output Leakage Current OZ I Input Leakage Current IX ...
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Switching Characteristics Over the Operating Range Parameter Description READ CYCLE t Read Cycle Time RC t Address to Data Valid AA t Output Hold From Address Change OHA [14 LOW to Data Valid ACE t OE LOW to ...
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Switching Characteristics Over the Operating Range Parameter Description [19] BUSY TIMING t BUSY LOW from Address Match BLA t BUSY HIGH from Address Mismatch BHA t BUSY LOW from CE LOW BLC t BUSY HIGH from CE HIGH BHC t ...
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Switching Waveforms Read Cycle No.1 (Either Port Address Access) ADDRESS OHA DATA OUT PREVIOUS DATA VALID Read Cycle No.2 (Either Port CE/OE Access) CE and DATA OUT I CC CURRENT I SB [22, ...
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Switching Waveforms (continued) Write Cycle No.1: R/W Controlled Timing ADDRESS OE [31,32 R/W NOTE 34 DATA OUT DATA IN Write Cycle No Controlled Timing ADDRESS [31,32 R/W DATA IN Notes: 27. R/W ...
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Switching Waveforms (continued) Semaphore Read After Write Timing, Either Side A –A VALID ADRESS SEM I R/W OE Timing Diagram of Semaphore Contention A – R/W L SEM L A –A ...
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Switching Waveforms (continued) Timing Diagram of Read with BUSY (M/S=HIGH) ADDRESS R R/W R DATA ADDRESS L BUSY L DATA OUTL Write Timing with Busy Input (M/S=LOW) R/W BUSY Note: 40 LOW. ...
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Switching Waveforms (continued) Busy Timing Diagram No.1 (CE Arbitration) CE Valid First: L ADDRESS L BUSY R CE Valid First: R ADDRESS L BUSY L Busy Timing Diagram No.2 (Address Arbitration) Left ...
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Switching Waveforms (continued) Interrupt Timing Diagrams Left Side Sets INT R : ADDRESS WRITE 1FFF (OR 1/3FFF R/W L INT R [43] t INS Right Side Clears INT R : ADDRESS R ...
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... The highest memory location (FFF for the CY7C024V/41V, 1FFF for the CY7C025V/51V, 3FFF for the CY7C026V/36V) is the mailbox for the right port and the sec- ond-highest memory location (FFE for the CY7C024V/41V, 1FFE for the CY7C025V/51V, 3FFE for the CY7C026V/36V) is the mailbox for the left port. When one port writes to the other port’ ...
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Table 1. Non-Contending Read/Write Inputs CE R ...
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... CY7C025V-15AC 20 CY7C025V-20AC CY7C025V-20AI 25 CY7C025V-25AC CY7C025V-25AI 16K x18 3.3V Asynchronous Dual-Port SRAM Speed (ns) Ordering Code [1] 15 CY7C026V-15AC 20 CY7C026V-20AC CY7C026V-20AI 25 CY7C026V-25AC CY7C026V-25AI 4K x18 3.3V Asynchronous Dual-Port SRAM Speed (ns) Ordering Code [1] 15 CY7C0241V-15AC 20 CY7C0241V-20AC CY7C0241V-20AI 25 CY7C0241V-25AC CY7C0241V-25AI 8K x18 3.3V Asynchronous Dual-Port SRAM Speed (ns) Ordering Code [1] 15 ...
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Ordering Information (continued) 16K x18 3.3V Asynchronous Dual-Port SRAM Speed (ns) Ordering Code [1] 15 CY7C036V-15AC 20 CY7C036V-20AC CY7C036V-20AI 25 CY7C036V-25AC CY7C036V-25AI Shaded areas contain advance information. Document #: 38–00678–B Package Diagram 100-Pin Thin Plastic Quad Flat Pack (TQFP) A100 ...
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... POR circuit is at fault. Applicable devices—All speed/package/temperature combi- nations of the following: • CY7C024V • CY7C025V • CY7C026V • CY7C0241V • CY7C0251V • CY7C036V Cypress design change—Cypress design team has identified the root cause. A permanent circuit change and die revision will be available beginning in October and will be identified by the letter “ ...