MPC947 Freescale Semiconductor, Inc, MPC947 Datasheet

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MPC947

Manufacturer Part Number
MPC947
Description
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Low Voltage 1:9 Clock
Distribution Chip
features the capability to select between two LVTTL compatible inputs
and fans the signal out to 9 LVCMOS or LVTTL compatible outputs.
These 9 outputs were designed and optimized to drive 50Ω series
terminated transmission lines. With output–to–output skews of 500ps, the
MPC947 is ideal as a clock distribution chip for synchronous systems
which need a tight level of skew at a relatively low cost. For a similar
product targeted at a higher price/performance point, consult the
MPC948 data sheet.
LOW logic states, the output buffers of the MPC947 are ideal for driving
series terminated transmission lines. More specifically, each of the 9
MPC947 outputs can drive two series terminated 50Ω transmission lines.
With this capability, the MPC947 has an effective fanout of 1:18 in
applications using point–to–point distribution schemes. With this level of
fanout, the MPC947 provides enough copies of low skew clocks for high
performance synchronous systems, including use as a clock distribution
chip for the L2 cache of a PowerPC 620 based system.
provide redundant clock sources or the addition of a test clock into the system design. With the select input pulled HIGH, the
TTL_CLK1 input will be selected.
for starting and stopping of the output clocks. A logic high on the Sync_OE pin will enable all of the outputs. Because this control
is synchronized to the input clock, potential output glitching or runt pulse generation is eliminated. In addition, for board level test,
the outputs can be tristated via the tristate control pin. A logic LOW applied to the Tristate input will force all of the outputs into
high impedance. Note that all of the MPC947 inputs have internal pullup resistors.
cost of the device. The 32–lead TQFP has a 7x7mm body size with a conservative 0.8mm pin spacing.
PowerPC is a trademark of International Business Machines Corporation.
1/97
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Motorola, Inc. 1997
Clock Distribution for PowerPC
2 Selectable LVCMOS/LVTTL Clock Inputs
500ps Maximum Output–to–Output Skew
Drives Up to 18 Independent Clock Lines
Maximum Output Frequency of 110MHz
Synchronous Output Enable
Tristatable Outputs
32–Lead TQFP Packaging
3.3V V CC Supply Voltage
The MPC947 is a 1:9 low voltage clock distribution chip. The device
With an output impedance of approximately 7Ω, in both the HIGH and
Two independent LVCMOS/LVTTL compatible clock inputs are available. Designers can take advantage of this feature to
All of the control inputs are LVCMOS/LVTTL compatible. The MPC947 provides a synchronous output enable control to allow
The MPC947 is fully 3.3V compatible. The 32–lead TQFP package was chosen to optimize performance, board space and
620 L2 Cache
1
REV 3
DISTRIBUTION CHIP
32–LEAD TQFP PACKAGE
LOW VOLTAGE
MPC947
1:9 CLOCK
CASE 873A–02
FA SUFFIX

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MPC947 Summary of contents

Page 1

... With the select input pulled HIGH, the TTL_CLK1 input will be selected. All of the control inputs are LVCMOS/LVTTL compatible. The MPC947 provides a synchronous output enable control to allow for starting and stopping of the output clocks. A logic high on the Sync_OE pin will enable all of the outputs. Because this control is synchronized to the input clock, potential output glitching or runt pulse generation is eliminated ...

Page 2

... MPC947 TTL_CLK0 TTL_CLK1 TTL_CLK1_Sel Sync_OE Tristate GND VCCO MPC947 GND VCCO 31 GND Figure 2. 32–Lead Pinout (Top View) TTL_CLK Sync_OE Q MOTOROLA Figure 1. Logic Diagram GND VCCO GND ...

Page 3

... Input Capacitance C pd Power Dissipation Capacitance 1. The MPC947 outputs can drive series or parallel terminated 50Ω (or 50Ω /2) transmission lines on the incident edge (see Applications Info section current is a result of internal pull–up resistors. AC CHARACTERISTICS ( 3.3V 0.3V) ...

Page 4

... VCC/2. This technique draws a fairly high level of DC current and thus only a single terminated line can be driven by each output of the MPC947 clock driver. For the series terminated case however there current draw, thus the outputs can drive multiple series terminated lines. ...

Page 5

... F D É É SECTION AE– MPC947 DETAIL Y NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DATUM PLANE –AB– IS LOCATED AT BOTTOM OF LEAD AND IS COINCIDENT WITH THE LEAD WHERE THE LEAD EXITS THE PLASTIC BODY AT THE BOTTOM OF THE PARTING LINE. 4. DATUMS – ...

Page 6

... JAPAN: Nippon Motorola Ltd.; Tatsumi–SPD–JLDC, 6F Seibu–Butsuryu–Center, 3–14–2 Tatsumi Koto–Ku, Tokyo 135, Japan. 81–3–3521–8315 ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park, 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852–26629298 6 MPC947/D TIMING SOLUTIONS BR1333 — Rev 6 ...

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