EP910ILI-12

Manufacturer Part NumberEP910ILI-12
ManufacturerAltera Corporation
EP910ILI-12 datasheet
 


Specifications of EP910ILI-12

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Table 28. EP1810-20 & EP1810-25 External Timing Parameters
Symbol
Parameter
t
Input to non-registered output
PD1
t
I/O input to non-registered output
PD2
t
Global clock setup time
SU
t
Global clock hold time
H
t
Global clock high time
CH
t
Global clock low time
CL
t
Global clock to output delay
CO1
t
Minimum global clock period
CNT
f
Maximum internal frequency
CNT
t
Array clock setup time
ASU
t
Array clock hold time
AH
t
Array clock to output delay
ACO1
t
Output data hold time after clock
ODH
t
Array clock maximum clock period
ACNT
f
Maximum internal array clock
ACNT
frequency
f
Maximum clock frequency
MAX
Table 29. EP1810-20 and EP1810-25 Internal Timing Parameters
Symbol
Parameter
t
Input pad and buffer delay
IN
t
I/O input pad and buffer delay
IO
t
Logic array delay
LAD
t
Output buffer and pad delay
OD
t
Output buffer enable delay
ZX
t
Output buffer disable delay
XZ
t
Register setup time
SU
t
Register hold time
H
t
Array clock delay
IC
t
Global clock delay
ICS
t
Feedback delay
FD
t
Register clear time
CLR
Altera Corporation
Tables 28
through
31
show the timing parameters for EP1810-20,
EP1810-25, EP1810-35, and EP1810-45 devices.
Conditions
C1 = 35 pF
C1 = 35 pF
C1 = 35 pF
(3)
(3)
C1 = 35 pF
C1 = 35 pF
(4)
(3)
(3)
(5)
Conditions
C1 = 35 pF
C1 = 35 pF
C1 = 5 pF
(6)
Classic EPLD Family Data Sheet
Note (1)
EP1810-20 EP1810-25 Non-Turbo
Adder
Min Max Min Max
20.0
25.0
22.0
28.0
13.0
17.0
0.0
0.0
8.0
10.0
8.0
10.0
15.0
18.0
20.0
25.0
50.0
40.0
8.0
10.0
8.0
10.0
20.0
25.0
1.0
1.0
20.0
25.0
50.0
40.0
62.5
50.0
EP1810-20 EP1810-25 Non-Turbo
Adder
Min Max Min Max
5.0
7.0
2.0
3.0
9.0
12.0
6.0
6.0
6.0
6.0
6.0
6.0
8.0
10.0
5.0
10.0
9.0
12.0
4.0
5.0
3.0
3.0
–25.0
9.0
12.0
Unit
(2)
25.0
ns
25.0
ns
25.0
ns
0.0
ns
0.0
ns
0.0
ns
0.0
ns
0.0
ns
0.0
MHz
25.0
ns
0.0
ns
25.0
ns
0.0
ns
0.0
ns
0.0
ns
0.0
MHz
Unit
(2)
0.0
ns
0.0
ns
25.0
ns
0.0
ns
0.0
ns
0.0
ns
0.0
ns
0.0
ns
25.0
ns
0.0
ns
ns
25.0
ns
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