74HCT373A IK Semiconductor, 74HCT373A Datasheet

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74HCT373A

Manufacturer Part Number
74HCT373A
Description
Manufacturer
IK Semiconductor
Datasheet
Octal 3-State Noninverting
Transparent Latch
TTL or NMOS outputs to High-Speed CMOS inputs.
While the Latch Enable is high the Q outputs follow the Data Inputs.
When Latch Enable is taken low, data meeting the setup and hold times
becomes latched.
Output Enable is high, all outputs are forced to the high-impedance state.
Thus, data may be latched even when the outputs are not enabled.
• TTL/NMOS-Compatible Input Levels
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 4.5 to 5.5 V
• Low Input Current: 1.0 µA
The IN74HCT373A may be used as a level converter for interfacing
The IN74HCT373A is identical in pinout to the LS/ALS373.
The eight latches of the IN74HCT373A are transparent D-type latches.
The Output Enable does not affect the state of the latch, but when
LOGIC DIAGRAM
PIN 20=V
PIN 10 = GND
CC
X = Don’t Care
Z = High Impedance
Output
Enable
L
L
L
H
T
A
ORDERING INFORMATION
= -55° to 125° C for all packages
FUNCTION TABLE
IN74HCT373AN Plastic
IN74HCT373ADW SOIC
Enable
Inputs
PIN ASSIGNMENT
Latch
H
H
X
L
TECHNICAL DATA
IN74HCT373A
D
H
X
X
L
No Change
Rev. 00
Output
Q
H
Z
L

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74HCT373A Summary of contents

Page 1

... Octal 3-State Noninverting Transparent Latch The IN74HCT373A may be used as a level converter for interfacing TTL or NMOS outputs to High-Speed CMOS inputs. The IN74HCT373A is identical in pinout to the LS/ALS373. The eight latches of the IN74HCT373A are transparent D-type latches. While the Latch Enable is high the Q outputs follow the Data Inputs. ...

Page 2

... CC Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or V outputs must be left open. Parameter and GND Pins CC SOIC Package** Parameter and V should be constrained to the range GND≤(V IN OUT IN74HCT373A Value Unit -0.5 to +7 ± ...

Page 3

... Output in High-Impedance 5.5 State GND OUT GND 5 =0µA OUT V =2.4 V, Any One Input GND Other Inputs 5.5 I =0µA OUT IN74HCT373A Guaranteed Limit 25 °C ≤85 ≤125 Unit °C °C to -55°C 2.0 2.0 2.0 V 2.0 2.0 2.0 0.8 0.8 0.8 V 0.8 0.8 0.8 4.4 4.4 4.4 V 5.4 5.4 5.4 3.98 3.84 3.7 0.1 0.1 ...

Page 4

... Maximum Input Rise and Fall Times (Figure =5.0 V ± 10 °C Parameter to -55° 500 IN74HCT373A =50pF =6.0 ns Guaranteed Limit ≤85°C ≤125°C Unit ...

Page 5

... Figure 1. Switching Waveforms Figure 3. Switching Waveforms Figure 5. Test Circuit EXPANDED LOGIC DIAGRAM IN74HCT373A Figure 2. Switching Waveforms Figure 4. Switching Waveforms Figure 6. Test Circuit Rev. 00 ...

Page 6

... Maximum mold flash or protrusion 0.15 mm (0.006) per side for A; for B ‑ 0.25 mm (0.010) per side. N SUFFIX PLASTIC DIP (MS - 001AD SEATING -T- PLANE SUFFIX SOIC (MS - 013AC SEATING PLANE IN74HCT373A Dimension, mm Symbol MIN MAX 24.89 26. 6.1 7.11 C 5.33 0.36 0. 1.14 1.78 G 2.54 7. 0° 10° 2.92 3.81 7.62 8 ...

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