ADP3110KRZ ON Semiconductor, ADP3110KRZ Datasheet

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ADP3110KRZ

Manufacturer Part Number
ADP3110KRZ
Description
Manufacturer
ON Semiconductor
Datasheet

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Part Number
Manufacturer
Quantity
Price
Part Number:
ADP3110KRZ
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Part Number:
ADP3110KRZ-RL
Manufacturer:
Freescale
Quantity:
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Part Number:
ADP3110KRZ-RL
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2 500
FEATURES
All-in-one synchronous buck driver
Bootstrapped high-side drive
One PWM signal generates both drives
Anticross-conduction protection circuitry
Output disable control turns off both MOSFETs to float
APPLICATIONS
Multiphase desktop CPU supplies
Single-supply synchronous buck converters
©2008 SCILLC. All rights reserved.
January 2008 – Rev. 1
output per Intel® VRM 10 specification
OD
IN
2
3
ADP3110
1V
CMP
SIMPLIFIED FUNCTIONAL BLOCK DIAGRAM
DELAY
DELAY
CONTROL
LOGIC
Figure 1.
CMP
Dual Bootstrapped, 12 V MOSFET
GENERAL DESCRIPTION
The ADP3110 is a dual, high voltage MOSFET driver optimized
for driving two N-channel MOSFETs, which are the two
switches in a nonisolated synchronous buck power converter.
Each of the drivers is capable of driving a 3000 pF load with a
25 ns propagation delay and a 30 ns transition time. One of the
drivers can be bootstrapped and is designed to handle the high
voltage slew rate associated with floating high-side gate drivers.
The ADP3110 includes overlapping drive protection to prevent
shoot-through current in the external MOSFETs.
The OD pin shuts off both the high-side and the low-side
MOSFETs to prevent rapid output capacitor discharge during
system shutdown.
The ADP3110 is specified over the commercial temperature
range of 0°C to 85°C and is available in an 8-lead SOIC_N
package.
VCC
6
VCC
4
Driver with Output Disable
1
8
7
6
5
BST
DRVH
SW
PGND
DRVL
C
BST1
R
D1
BST
R
G
C
BST2
Publication Order Number:
12V
ADP3110
Q1
Q2
INDUCTOR
TO
ADP3110/D

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ADP3110KRZ Summary of contents

Page 1

FEATURES All-in-one synchronous buck driver Bootstrapped high-side drive One PWM signal generates both drives Anticross-conduction protection circuitry Output disable control turns off both MOSFETs to float output per Intel® VRM 10 specification APPLICATIONS Multiphase desktop CPU supplies Single-supply synchronous buck ...

Page 2

... Absolute Maximum Ratings ............................................................4 ESD Caution ..................................................................................4 Pin Configuration and Function Descriptions .............................5 Timing Characteristics .....................................................................6 Theory of Operation.........................................................................7 Low-Side Driver ............................................................................7 High-Side Driver...........................................................................7 REVISION HISTORY 01/08 - Rev 1: Conversion to ON Semiconductor 6/05—Revision 0: Initial Version Overlap Protection Circuit .......................................................... 7 Application Information .................................................................. 8 Supply Capacitor Selection.......................................................... 8 Bootstrap Circuit .......................................................................... 8 MOSFET Selection ....................................................................... 8 PC Board Layout Considerations ............................................... 9 Outline Dimensions ...

Page 3

SPECIFICATIONS BST = 25°C, unless otherwise noted Table 1. Parameter PWM INPUT 2 Input Voltage High Input Voltage Low 2 2 Input Current 2 Hysteresis OD ...

Page 4

ADP3110 ABSOLUTE MAXIMUM RATINGS Table 2. Parameter Rating VCC –0 +15 V BST –0 VCC + 15 V BST to SW –0 + – +15 V <200 ns –10 ...

Page 5

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Table 3. Pin Function Descriptions Pin No. Mnemonic Description 1 BST Upper MOSFET Floating Bootstrap Supply. A capacitor connected between the BST and SW pins holds this bootstrapped voltage for the high-side MOSFET as it ...

Page 6

ADP3110 TIMING CHARACTERISTICS OD tpdl DRVH OR DRVL IN tpdl DRVL DRVL DRVH-SW SW (Timing is Referenced to the 90% and 10% Points Unless Otherwise Noted) OD 90% Figure 3. Output Disable Timing Diagram tf DRVL tpdh tr DRVH DRVH ...

Page 7

THEORY OF OPERATION The ADP3110 is a dual MOSFET driver optimized for driving two N-channel MOSFETs in a synchronous buck converter topology. A single PWM input signal is all that is required to properly drive the high-side and the low-side ...

Page 8

ADP3110 APPLICATION INFORMATION SUPPLY CAPACITOR SELECTION For the supply input (VCC) of the ADP3110, a local bypass capacitor is recommended to reduce the noise and to supply some of the peak currents drawn. Use a 4.7 μF, low ESR capacitor. ...

Page 9

The MOSFET vendor should provide a maximum voltage slew rate at drain current rating such that this can be designed around. The next step is to determine the expected maximum current in the MOSFET. This can be done by ( ...

Page 10

ADP3110 Figure 6. VRD 10.x Compliant Power Supply Circuit Rev Page www.onsemi.com ...

Page 11

... Model Temperature Range 1 ADP3110KRZ 0°C to 85°C 1 ADP3110KRZ-RL 0°C to 85° Pb-free part. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “ ...

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