ATMEGA2561 ATMEL Corporation, ATMEGA2561 Datasheet

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ATMEGA2561

Manufacturer Part Number
ATMEGA2561
Description
Manufacturer
ATMEL Corporation
Datasheet

Specifications of ATMEGA2561

Flash (kbytes)
256 Kbytes
Pin Count
64
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
Hardware Qtouch Acquisition
No
Max I/o Pins
54
Ext Interrupts
17
Usb Speed
No
Usb Interface
No
Spi
3
Twi (i2c)
1
Uart
2
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
8
Eeprom (bytes)
4096
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
6
Output Compare Channels
16
Input Capture Channels
2
Pwm Channels
8
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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Features
High Performance, Low Power AVR
Advanced RISC Architecture
High Endurance Non-volatile Memory Segments
JTAG (IEEE std. 1149.1 compliant) Interface
Peripheral Features
Special Microcontroller Features
I/O and Packages
Temperature Range:
Ultra-Low Power Consumption
Speed Grade:
– 135 Powerful Instructions – Most Single Clock Cycle Execution
– 32 x 8 General Purpose Working Registers
– Fully Static Operation
– Up to 16 MIPS Throughput at 16 MHz
– On-Chip 2-cycle Multiplier
– 64K/128K/256K Bytes of In-System Self-Programmable Flash
– 4K Bytes EEPROM
– 8K Bytes Internal SRAM
– Write/Erase Cycles:10,000 Flash/100,000 EEPROM
– Data retention: 20 years at 85°C/ 100 years at 25°C
– Optional Boot Code Section with Independent Lock Bits
– Programming Lock for Software Security
– Boundary-scan Capabilities According to the JTAG Standard
– Extensive On-chip Debug Support
– Programming of Flash, EEPROM, Fuses, and Lock Bits through the JTAG Interface
– Two 8-bit Timer/Counters with Separate Prescaler and Compare Mode
– Four 16-bit Timer/Counter with Separate Prescaler, Compare- and Capture Mode
– Real Time Counter with Separate Oscillator
– Four 8-bit PWM Channels
– Six/Twelve PWM Channels with Programmable Resolution from 2 to 16 Bits
– Output Compare Modulator
– 8/16-channel, 10-bit ADC (ATmega1281/2561, ATmega640/1280/2560)
– Two/Four Programmable Serial USART (ATmega1281/2561,ATmega640/1280/2560)
– Master/Slave SPI Serial Interface
– Byte Oriented 2-wire Serial Interface
– Programmable Watchdog Timer with Separate On-chip Oscillator
– On-chip Analog Comparator
– Interrupt and Wake-up on Pin Change
– Power-on Reset and Programmable Brown-out Detection
– Internal Calibrated Oscillator
– External and Internal Interrupt Sources
– Six Sleep Modes: Idle, ADC Noise Reduction, Power-save, Power-down, Standby,
– 54/86 Programmable I/O Lines (ATmega1281/2561, ATmega640/1280/2560)
– 64-pad QFN/MLF, 64-lead TQFP (ATmega1281/2561)
– 100-lead TQFP, 100-ball CBGA (ATmega640/1280/2560)
– RoHS/Fully Green
– -40
– Active Mode: 1 MHz, 1.8V: 500 µA
– Power-down Mode: 0.1 µA at 1.8V
– ATmega640V/ATmega1280V/ATmega1281V:
– ATmega2560V/ATmega2561V:
– ATmega640/ATmega1280/ATmega1281:
– ATmega2560/ATmega2561:
(ATmega1281/2561, ATmega640/1280/2560)
and Extended Standby
• In-System Programming by On-chip Boot Program
• True Read-While-Write Operation
Endurance: Up to 64K Bytes Optional External Memory Space
0 - 4 MHz @ 1.8 - 5.5V, 0 - 8 MHz @ 2.7 - 5.5V
0 - 2 MHz @ 1.8 - 5.5V, 0 - 8 MHz @ 2.7 - 5.5V
0 - 8 MHz @ 2.7 - 5.5V, 0 - 16 MHz @ 4.5 - 5.5V
0 - 16 MHz @ 4.5 - 5.5V
°
C to 85
°
C Industrial
®
8-Bit Microcontroller
8-bit
Microcontroller
with
64K/128K/256K
Bytes In-System
Programmable
Flash
ATmega640/V
ATmega1280/V
ATmega1281/V
ATmega2560/V
ATmega2561/V
Preliminary
Summary

Related parts for ATMEGA2561

ATMEGA2561 Summary of contents

Page 1

... Ultra-Low Power Consumption – Active Mode: 1 MHz, 1.8V: 500 µA – Power-down Mode: 0.1 µA at 1.8V • Speed Grade: – ATmega640V/ATmega1280V/ATmega1281V MHz @ 1.8 - 5.5V MHz @ 2.7 - 5.5V – ATmega2560V/ATmega2561V MHz @ 1.8 - 5.5V MHz @ 2.7 - 5.5V – ATmega640/ATmega1280/ATmega1281 MHz @ 2.7 - 5.5V MHz @ 4.5 - 5.5V – ATmega2560/ATmega2561 MHz @ 4.5 - 5.5V ® 8-Bit Microcontroller ...

Page 2

Pin Configurations Figure 1-1. (RXD0/PCINT8) PE0 (CLKO/ICP3/INT7) PE7 (OC2A/PCINT4) PB4 (OC1A/PCINT5) PB5 (OC1B/PCINT6) PB6 ATmega640/1280/1281/2560/2561 2 TQFP-pinout ATmega640/1280/2560 100 ...

Page 3

Figure 1-2. Table 1- 2549LS–AVR–08/07 ATmega640/1280/1281/2560/2561 CBGA-pinout ATmega640/1280/2560 Top view ...

Page 4

Figure 1-3. Note: 1.1 Disclaimer Typical values contained in this datasheet are based on simulations and characterization of other AVR microcontrollers manufactured on the same process technology. Min. and Max val- ues will be available after the device is characterized. ...

Page 5

Overview The ATmega640/1280/1281/2560/2561 is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the ATmega640/1280/1281/2560/2561 achieves throughputs approaching 1 MIPS per MHz allowing the system designer to ...

Page 6

The AVR core combines a rich instruction set with 32 general purpose working registers. All the 32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent registers to be accessed in one single instruction executed in ...

Page 7

... Table 2-1. Configuration Summary Device Flash EEPROM ATmega640 64KB ATmega1280 128KB ATmega1281 128KB ATmega2560 256KB ATmega2561 256KB 2.3 Pin Descriptions 2.3.1 VCC Digital supply voltage. 2.3.2 GND Ground. 2.3.3 Port A (PA7..PA0) Port 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port A output buffers have symmetrical drive characteristics with both high sink and source capability ...

Page 8

The Port C pins are tri-stated when a reset condition becomes active, even if the clock is not running. Port C also serves the functions of special features of the ATmega640/1280/1281/2560/2561 as listed on 2.3.6 Port D ...

Page 9

The Port H pins are tri-stated when a reset condition becomes active, even if the clock is not running. Port H also serves the functions of various special features of the ATmega640/1280/2560 as listed on 2.3.11 Port ...

Page 10

AVCC AVCC is the supply voltage pin for Port F and the A/D Converter. It should be externally con- nected to V through a low-pass filter. 2.3.18 AREF This is the analog reference pin for the A/D Converter. 3. ...

Page 11

Register Summary Address Name Bit 7 (0x1FF) Reserved - ... Reserved - (0x13F) Reserved (0x13E) Reserved (0x13D) Reserved (0x13C) Reserved (0x13B) Reserved (0x13A) Reserved (0x139) Reserved (0x138) Reserved (0x137) Reserved (0x136) UDR3 (0x135) UBRR3H - (0x134) UBRR3L (0x133) Reserved ...

Page 12

Address Name Bit 7 (0x100) PINH PINH7 (0xFF) Reserved - (0xFE) Reserved - (0xFD) Reserved - (0xFC) Reserved - (0xFB) Reserved - (0xFA) Reserved - (0xF9) Reserved - (0xF8) Reserved - (0xF7) Reserved - (0xF6) Reserved - (0xF5) Reserved - ...

Page 13

Address Name Bit 7 (0xBE) Reserved - (0xBD) TWAMR TWAM6 (0xBC) TWCR TWINT (0xBB) TWDR (0xBA) TWAR TWA6 (0xB9) TWSR TWS7 (0xB8) TWBR (0xB7) Reserved - (0xB6) ASSR - (0xB5) Reserved - (0xB4) OCR2B (0xB3) OCR2A (0xB2) TCNT2 (0xB1) TCCR2B ...

Page 14

Address Name Bit 7 (0x7C) ADMUX REFS1 (0x7B) ADCSRB - (0x7A) ADCSRA ADEN (0x79) ADCH (0x78) ADCL (0x77) Reserved - (0x76) Reserved - (0x75) XMCRB XMBK (0x74) XMCRA SRE (0x73) TIMSK5 - (0x72) TIMSK4 - (0x71) TIMSK3 - (0x70) TIMSK2 ...

Page 15

Address Name Bit 7 0x1A (0x3A) TIFR5 - 0x19 (0x39) TIFR4 - 0x18 (0x38) TIFR3 - 0x17 (0x37) TIFR2 - 0x16 (0x36) TIFR1 - 0x15 (0x35) TIFR0 - 0x14 (0x34) PORTG - 0x13 (0x33) DDRG - 0x12 (0x32) PING - ...

Page 16

Instruction Set Summary Mnemonics Operands ARITHMETIC AND LOGIC INSTRUCTIONS ADD Rd, Rr Add two Registers ADC Rd, Rr Add with Carry two Registers ADIW Rdl,K Add Immediate to Word SUB Rd, Rr Subtract two Registers SUBI Rd, K Subtract ...

Page 17

Mnemonics Operands BRVS k Branch if Overflow Flag is Set BRVC k Branch if Overflow Flag is Cleared BRIE k Branch if Interrupt Enabled BRID k Branch if Interrupt Disabled BIT AND BIT-TEST INSTRUCTIONS SBI P,b Set Bit in I/O ...

Page 18

Mnemonics Operands ELPM Rd, Z+ Extended Load Program Memory SPM Store Program Memory IN Rd Port OUT P, Rr Out Port PUSH Rr Push Register on Stack POP Rd Pop Register from Stack MCU CONTROL INSTRUCTIONS NOP No ...

Page 19

Ordering Information 7.1 ATmega640 (2) Speed (MHz) Power Supply 8 1.8 - 5.5V 16 2.7 - 5.5V Notes: 1. This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering information ...

Page 20

ATmega1281 (2) Speed (MHz) Power Supply 8 1.8 - 5.5V 16 2.7 - 5.5V Notes: 1. This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering information and minimum quantities. ...

Page 21

ATmega1280 (2) Speed (MHz) Power Supply 8 1.8 - 5.5V 16 2.7 - 5.5V Notes: 1. This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering information and minimum quantities. ...

Page 22

... Body, Quad Flat No-lead/Micro Lead Frame Package (QFN/MLF) 100A 100-lead, Thin (1.0 mm) Plastic Gull Wing Quad Flat Package (TQFP) 100C1 100-ball, Chip Ball Grid Array (CBGA) ATmega640/1280/1281/2560/2561 14 Ordering Code Package ATmega2561V-8AU ATmega2561V-8MU ATmega2561-16AU ATmega2561-16MU Package Type (1)(3) Operation Range 64A Industrial -40°C to 85°C) 64M2 ( 64A Industrial -40°C to 85°C) ...

Page 23

ATmega2560 (2) Speed (MHz) Power Supply 8 1.8 - 5.5V 16 4.5 - 5.5V Notes: 1. This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering information and minimum quantities. ...

Page 24

Packaging Information 8.1 100A PIN 0˚~7˚ L Notes: 1. This package conforms to JEDEC reference MS-026, Variation AED. 2. Dimensions D1 and E1 do not include mold protrusion. Allowable protrusion is 0.25 mm per side. Dimensions ...

Page 25

D e 0.90 TYP 0.90 TYP 2325 Orchard Parkway San Jose, CA 95131 R 2549LS–AVR–08/07 ATmega640/1280/1281/2560/2561 E Marked A1 Identifier TOP VIEW Øb A1 Corner ...

Page 26

PIN 0°~7° L Notes: 1.This package conforms to JEDEC reference MS-026, Variation AEB. 2. Dimensions D1 and E1 do not include mold protrusion. Allowable protrusion is 0.25 mm per side. Dimensions D1 and E1 are ...

Page 27

Marked Pin TOP VIEW BOTTOM VIEW Note: 1. JEDEC Standard MO-220, (SAW Singulation) Fig. 1, VMMD. 2. Dimension and tolerance conform to ASMEY14.5M-1994. 2325 Orchard Parkway San Jose, CA 95131 ...

Page 28

Errata 9.1 ATmega640 rev. A • Inaccurate ADC conversion in differential mode with 200x gain • High current consumption in sleep mode 1. Inaccurate ADC conversion in differential mode with 200x gain With AVCC < 3.6V, random conversions will ...

Page 29

High current consumption in sleep mode pending interrupt cannot wake the part up from the selected sleep mode, the current consumption will increase during sleep when executing the SLEEP instruction directly after a SEI instruction. Problem Fix/Workaround ...

Page 30

... When the Memory Lock Bits LB2 and LB1 are programmed to mode 3, EEPROM read does not work from the application code. Problem Fix/Workaround Do not set Lock Bit Protection Mode 3 when the application code needs to read from EEPROM. 9.9 ATmega2561 rev known errata. 9.10 ATmega2561 rev. D Not sampled. ATmega640/1280/1281/2560/2561 22 2549LS–AVR–08/07 ...

Page 31

... Problem Fix/Workaround Before entering sleep, interrupts not used to wake the part from the sleep mode should be disabled. 9.12 ATmega2561 rev. B Not sampled. 9.13 ATmega2561 rev. A • Non-Read-While-Write area of flash not functional • Part does not work under 2.4 Volts • Incorrect ADC reading in differential mode • ...

Page 32

Part does not work under 2.4 volts The part does not execute code correctly below 2.4 volts Problem Fix/Workaround Do not use the part at voltages below 2.4 volts. 3. Incorrect ADC reading in differential mode The ADC has ...

Page 33

Datasheet Revision History Please note that the referring page numbers in this section are referring to this document.The referring revision in this section are referring to the document revision. 10.1 Rev. 2549L-08/ ...

Page 34

Updated 5. Updated 6. Updated 10.4 Rev. 2549I-07/06 1. Added 2. Updated page page on page 3. Updated 10.5 Rev. 2549H-06/06 1. Updated 2. Updated 3. Added 10.6 Rev. 2549G-06/06 1. Updated 2. Added 3. Updated 4. Updated 5. ...

Page 35

Rev. 2549E-04/ 10.9 Rev. 2549D-12/ 10. 11. 12. 13. 14. 10.10 Rev. 2549C-09/ 2549LS–AVR–08/07 ATmega640/1280/1281/2560/2561 ...

Page 36

Rev. 2549B-05/05 1. JTAG ID/Signature for ATmega640 updated: 0x9608. 2. Updated 3. Updated 4. Updated 10.12 Rev. 2549A-03/05 1. Initial version. ATmega640/1280/1281/2560/2561 28 Table 13-7 on page 81. “Serial Programming Instruction set” on page “Errata” on page 28. 354. ...

Page 37

... Atmel products are not suitable for, and shall not be used in, automotive applications. Atmel’s products are not intended, authorized, or warranted for use as components in applications intended to support or sustain life. © 2007 Atmel Corporation. All rights reserved. Atmel marks of Atmel Corporation or its subsidiaries. Other terms and product names may be trademarks of others. International Atmel Asia ...

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