BS62LV256SC-70 Brilliance Semiconductor, Inc., BS62LV256SC-70 Datasheet

BS62LV256SC-70

Manufacturer Part Number

BS62LV256SC-70

Description

Manufacturer

Brilliance Semiconductor, Inc.

Datasheet

1.BS62LV256SC-70.pdf (10 pages)

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n FEATURES

Ÿ Wide V

Ÿ Very low power consumption :

Ÿ High speed access time :

Ÿ Automatic power down when chip is deselected

Ÿ Easy expansion with CE and OE options

Ÿ Three state outputs and TTL compatible

Ÿ Fully static operation

Ÿ Data retention supply voltage as low as 1.5V

n POWER CONSUMPTION

n PIN CONFIGURATIONS

R0201-BS62LV256

BS62LV256DC

BS62LV256PC

BS62LV256SC

BS62LV256TC

BS62LV256PI

BS62LV256SI

BS62LV256TI

Brilliance Semiconductor, Inc.

-55

-70

PRODUCT

FAMILY

= 3.0V

= 5.0V

operation voltage : 2.4V ~ 5.5V

VCC

A13

A14

A12

A11

GND

DQ0

DQ1

DQ2

A14

A12

Operation current : 25mA (Max.) at 70ns

Standby current :

Operation current : 40mA (Max.) at 55ns

Standby current :

55ns(Max.) at V

70ns(Max.) at V

TEMPERATURE

-40

OPERATING

•

BS62LV256TC

BS62LV256TI

Commercial

BS62LV256PC

BS62LV256PI

BS62LV256SC

BS62LV256SI

Industrial

C to +70

C to +85

Pb-Free and Green package materials are compliant to RoHS

Very Low Power CMOS SRAM

32K X 8 bit

: 4.5~5.5V

: 3.0~5.5V

0.01uA(Typ.) at 25

0.4uA (Typ.) at 25

1mA (Max.) at 1MHz

2mA (Max.) at 1MHz

VCC

A13

A11

A10

DQ7

DQ6

DQ5

DQ4

DQ3

4.0uA

5.0uA

=5.0V

STANDBY

A10

DQ7

DQ6

DQ5

DQ4

DQ3

GND

DQ2

DQ1

DQ0

CCSB1

, Max)

reserves the right to change products and specifications without notice.

0.4uA

0.7uA

=3.0V

1.5mA

1MHz

2mA

POWER DISSIPATION

n DESCRIPTION

The BS62LV256 is a high performance, very low power CMOS Static

Random Access Memory organized as 32,768 by 8 bits and

operates form a wide range of 2.4V to 5.5V supply voltage.

Advanced CMOS technology and circuit techniques provide both

high speed and low power features with typical CMOS standby

current of 0.01uA and maximum access time of 70ns in 3.0V

operation.

Easy memory expansion is provided by an active LOW chip enable

(CE), and active LOW output enable (OE) and three-state output

drivers.

The BS62LV256 has an automatic power down feature, reducing the

power consumption significantly when chip is deselected.

The BS62LV256 is available in DICE form, JEDEC standard 28 pin

330mil Plastic SOP, 600mil Plastic DIP, 8mmx13.4mm TSOP

(normal type).

n BLOCK DIAGRAM

10MHz

18mA

20mA

=5.0V

DQ0

DQ1

DQ2

DQ3

DQ4

DQ5

DQ6

DQ7

A12

A14

A13

A11

GND

35mA

40mA

Max.

Address

Operating

Buffer

Input

Control

, Max)

0.8mA

1MHz

1mA

Output

Buffer

Input

Data

Decoder

Row

10MHz

12mA

15mA

=3.0V

BS62LV256

512

20mA

25mA

Max.

Address Input Buffer

Column Decoder

A3 A2 A1 A0 A10

Memory Array

Write Driver

Column I/O

Sense Amp

Revision

Sep.

512X512

DICE

PDIP-28

SOP-28

TSOP-28

PDIP-28

SOP-28

TSOP-28

PKG TYPE

512

2006

2.6

Related parts for BS62LV256SC-70

BS62LV256SC-70 Summary of contents

Page 1

... Industrial BS62LV256SI +85 C BS62LV256TI n PIN CONFIGURATIONS • A14 1 28 A12 BS62LV256PC BS62LV256PI BS62LV256SC BS62LV256SI DQ0 11 18 DQ1 12 17 DQ2 13 16 GND A11 A13 5 ...

PIN DESCRIPTIONS Name A0-A14 Address Input CE Chip Enable Input WE Write Enable Input OE Output Enable Input DQ0-DQ7 Data Input/Output Ports V CC GND n TRUTH TABLE MODE CE Not selected H (Power Down) Output Disabled L Read ...

Page 3

DC ELECTRICAL CHARACTERISTICS (T PARAMETER PARAMETER NAME V Power Supply CC V Input Low Voltage IL V Input High Voltage IH I Input Leakage Current IL I Output Leakage Current LO V Output Low Voltage OL V Output High ...

Page 4

AC TEST CONDITIONS (Test Load and Input/Output Reference) Input Pulse Levels Input Rise and Fall Times Input and Output Timing Reference Level CLZ OLZ CHZ OHZ WHZ Output Load Others ...

Page 5

SWITCHING WAVEFORMS (READ CYCLE) (1,2,4) READ CYCLE 1 ADDRESS D OUT (1,3,4) READ CYCLE OUT (1, 4) READ CYCLE 3 ADDRESS OUT NOTES high in read Cycle. 2. Device is ...

Page 6

AC ELECTRICAL CHARACTERISTICS (T WRITE CYCLE JEDEC PARANETER PARAMETER NAME NAME t t AVAX AVWH E1LWH WLWH AVWL WHAX WLQZ WHZ ...

Page 7

WRITE CYCLE 2 ADDRESS OUT D IN NOTES must be high during address transitions. 2. The internal write time of the memory is defined by the overlap of CE and WE low. All signals ...

Page 8

ORDERING INFORMATION BS62LV256 Note: BSI (Brilliance Semiconductor Inc.) assumes no responsibility for the application or use of any product or circuit described herein. BSI does not authorize its products for use as critical components in any application in which ...

Page 9

PACKAGE DIMENSIONS (continued TSOP - 28 PDIP - 28 R0201-BS62LV256 12°(2x) 12°(2x Seating Plane 12°(2x) 15 ° "A" SEATING PLANE 15 ...

Page 10

Revision History Revision No. History 2.4 Add Icc1 characteristic parameter 2.5 Change I-grade operation temperature range - from –25 O 2.6 Revised I CCSB1 - from 1.0uA to 4.0uA for 5V C-grade - from 2.0uA to 5.0uA for 5V ...

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