CS4298-KQ Cirrus Logic, Inc., CS4298-KQ Datasheet
CS4298-KQ
Available stocks
Related parts for CS4298-KQ
CS4298-KQ Summary of contents
Page 1
... D/A and A/D conversion along with analog mixing and 3D processing. For multi- channel audio systems, the CS4298 can provide four audio channels. For combined audio/modem systems, the CS4298 can provide a modem AFE, voice codec, and stereo audio codec.. ® and PC 99 ...
Page 2
... Cirrus Logic, Inc. The names of products of Cirrus Logic, Inc. or other vendors and suppliers appearing in this document may be trademarks or service marks of their respective owners which may be registered in some jurisdictions. A list of Cirrus Logic, Inc. trade- marks and service marks can be found at http://www.cirrus.com. 2 CS4298 DS315PP2 ...
Page 3
... AC Mode Control (Index 5Eh) ..................................................................................... 35 6.1.36 S/PDIF Control (Index 68h) ......................................................................................... 35 6.1.37 Vendor ID1 (Index 7Ch)............................................................................................... 36 6.1.38 Vendor ID2 (Index 7Eh) ............................................................................................... 36 7. ANALOG HARDWARE DESCRIPTION ................................................................................. 37 7.1 Line-Level Inputs .............................................................................................................. 37 7.2 Microphone Level Inputs .................................................................................................. 38 7.3 Line Level Outputs............................................................................................................ 38 7.4 Consumer IEC-958 Digital Interface (S/PDIF) .................................................................. 39 7.5 Miscellaneous Analog Signals .......................................................................................... 39 7.6 Power Supplies................................................................................................................. 40 7.7 Hybrid Interface ................................................................................................................ 41 DS315PP2 ........................................................................... 29 CS4298 3 ...
Page 4
... Table 2. Alternate Line-Out and Master Mono Attenuation ........................................................... 24 Table 3. Analog Mixer Input Gain Values...................................................................................... 24 Table 4. Stereo Volume Register Index ........................................................................................ 25 Table 5. Input Mux Selection ......................................................................................................... 25 Table 6. 6 Channel Volume Attenuation........................................................................................ 30 Table 7. GPIO Input/Output Configuration .................................................................................... 33 Table 8. Misc. Modem Configuration............................................................................................. 34 Table 9. Slot Assignments............................................................................................................ 35 Table 10. Reg. 7Eh Defined Part ID’s ........................................................................................... 36 4 CS4298 DS315PP2 ...
Page 5
... Path refers to the signal path used to generate this data. These paths are defined in the Parameter and Term Definition section. 4. Typical measured with Z 5. This specification is guaranteed by silicon characterization not production tested. DS315PP2 (Standard test conditions unless otherwise noted: CS4298-KQ Path Symbol (Note 3) Min A-D ...
Page 6
... Applied) Symbol +3.3 V Digital DVdd1, DVdd2 +5 V Digital DVdd1, DVdd2 Analog AVdd1, AVdd2 +3.3 V Digital DVdd1, DVdd2 +5 V Digital DVdd1, DVdd2 Analog AVdd1, AVdd2 (for CS4298-KQ only) Line In, Aux, CD, Video, Mic1 Mic2, Line Out, Alternate Line Out All volume controls Min Typ Max -0.3 - 6.0 -0.3 - 6.0 -0 ...
Page 7
... C, AVdd = 5 V; (Note 5) (Note 5) (Note Gain = 0 20 Gain = 0 -5 Gain = 0 (Note 5) (Note 5) (Note 5) 40 CS4298 = 0° to 70° C, AVdd = 5.0 ambient Typical Max Units bits 100 dB FS 5000 Hz ±0.125 dB1K 5.6 TBD Volts 0.1 ...
Page 8
... Output Leakage Current (Tri-stated AC-link outputs) Output buffer drive current BIT_CLK SDATA_IN, EAPD S/PDIF_OUT 8 (AVss = DVss = 0 V) Symbol Min 2. 3 -10 -10 (Note 3. 4 -10 -10 (Note 5) CS4298 Typ Max Unit 0 3.25 V 0.03 . µ µ 12 4.95 V 0.03 . µ µ ...
Page 9
... T sync_high T sync_low isetup T ihold T irise T ifall (Note orise (Note ofall T s2_pdown T sync_pr4 T sync2clk (Note 5) T setup2rst (Note 5) T off series termination and pF. L CS4298 Min Typ Max Unit 1 120 - - 62 12.288 - MHz - 81 750 40.7 45 ...
Page 10
... BIT_CLK RESET# Vdd BIT_CLK SYNC CODEC_READY BIT_CLK T orise SYNC T irise Figure 3. Codec Ready from Startup or Fault Condition 10 T rst_low T vdd2rst# Figure 1. Power Up Timing T sync2crd Figure 2. Clocks clk_high clk_low clk_period T T ifall T sync_high sync_low T sync_period CS4298 T rst2clk T ifall DS315PP2 ...
Page 11
... SDATA_OUT, SYNC BIT_CLK Slot 1 SDATA_OUT Write to 0x20 SDATA_IN SYNC RESET# SDATA_OUT, SYNC SDATA_IN, BIT_CLK DS315PP2 isetup Figure 4. Data Setup and Hold Slot 2 Data PR4 Don’t Care T s2_pdown T sync_pr4 Figure 5. PR4 Powerdown T setup2rst T off Figure 6. Test Mode CS4298 T ihold T sync2clk Hi-Z 11 ...
Page 12
... Mode 0 This is the default operating mode for the CS4298. It supports the legacy AC ‘97 audio modes of op- eration including audio mixer, ADC’s, and DAC’s. The modem configuration supports a phone line for modem ADC/DAC1 and a handset interface for modem ADC/DAC2. ...
Page 13
... On the next rising edge of BIT_CLK, the first bit of Slot 0 is driven by the Controller on the SDATA_OUT pin. The CS4298 latches in this data, as the first bit of the frame, on the next falling edge of the BIT_CLK clock signal. ...
Page 14
... Input Mixer, 3D enhancement, and the PCM DAC output. The stereo output mix is sent to the LINE_OUT and ALT_LINE_OUT output pins of the CS4298. When the device is set to Mode 3 or Mode 0-2 and the EAM in AC Mode Control (Index 5Eh) is set, the modem DAC outputs are routed to ALT_LINE_OUT ...
Page 15
... STEREO TO MONO MIXER MUTE ADC INPUT MUX AC-Link Interface MRX- VOL ADC DAC VOL MRX+ HRX+ VOL ADC DAC VOL HRX- Figure 8. Mixer Diagram CS4298 MASTER VOLUME 2 OUTPUT VOL / BUFFER ALTERNATE VOLUME 2 OUTPUT VOL / BUFFER 2 / MAIN ADC GAIN VOL MUTE ADC 10 ...
Page 16
... Controller’s perspective, NOT from the Audio Codec’s perspective. 5.2 AC-Link Serial Data Output Frame In the serial data output frame, data is passed on the SDATA_OUT pin TO the CS4298 FROM the Controller. Figure 9 illustrates the serial port timing. Tag Phase SYNC 12 ...
Page 17
... If a Slot Valid bit is set, the named slot contains valid audio data. If the bit is clear, the slot will be ignored. The definition of each slot is determined by the basic operating mode selected for the CS4298. For more information, see the AC Mode Control (Index 5Eh) register. ...
Page 18
... GPIO Output Date. Output data is transferred to the GPIO pins every frame in Slot 12. 5.4 AC-Link Audio Input Frame In the serial data input frame, data is passed on the SDATA_IN pin FROM the CS4298 to the AC ’97 Controller. The data format for the input frame is very similar to the output frame. Figure 9 illustrates the serial port timing ...
Page 19
... The capture data in Slot [3:12] will only be valid when the respective slot valid bit is set in Slot 0. DS315PP2 RI1 RI0 GI9 GI8 GI7 GI6 GI5 GI4 CS4298 GI3 GI2 GI1 GI0 ...
Page 20
... Warm AC ’97 Reset The CS4298 may also be reactivated when the AC-link is powered down (refer to the PR4 bit de- scription in the Power Management section Warm Reset. A Warm Reset allows the AC-link to be reactivated without losing information in the Codec’s registers. Warm Reset is initiated when the SYNC signal is driven high for at least 1 µ ...
Page 21
... HDAC HADC PRF PRE PRD PRC PRB PRA PRD PRC PRB PRA HDAC PRC PRB PRA SR8 SR7 SR8 SR7 SR8 SR7 DAC3 DAC2 DAC1 DAC0 Mute Table 1. Mixer Registers CS4298 ID4 ID4 ID4 ...
Page 22
... EDM EAM DDM Fs L CC6 CC5 CC4 CC3 CC2 CC1 CC0 Table 1. Mixer Registers (cont.) CS4298 ADC3 ADC2 ADC3 ADC2 GC6 GC5 GC4 GC3 GC2 GC1 GC0 GP6 GP5 GP4 GP3 GP2 ...
Page 23
... SE1 SE0 0 ID8 ID7 SE1 SE0 0 ID8 ID7 SE1 SE0 0 ID8 ID7 SE1 SE0 0 ID8 ID7 D10 ML2 ML1 ML0 CS4298 ID4 ID4 ID4 MR5 MR4 ...
Page 24
... ML1 ML0 ML[5:0]/MR[5:0]/MM[5:0 Read 000000 000001 … 111111 D10 20dB Gain Level +12.0 dB +10.5 dB … +1.5 dB 0.0 dB -1.5 dB … -34.5 dB Table 3. Analog Mixer Input Gain Values CS4298 MR5 MR4 MR3 MR2 MR1 Gain Level 0 dB -1.5 dB ... -94 GN4 GN3 GN2 GN1 Mic Gain with 20dB = 1 +32 ...
Page 25
... Sx2 - Sx0 Record Source Video Input Not Available Table 5. Input Mux Selection GR4 GR3 GR2 Function SR2 MIC CD Input AUX Input Line Input Stereo Mix Mono Mix CS4298 D1 D0 GR1 GR0 D1 D0 SR1 SR0 25 ...
Page 26
... EAM is set. See the AC Mode Control (Index 5Eh) register for more detail. 26 D10 GL2 GL1 GL0 D10 D10 LPBK D10 CS4298 GR3 GR2 GR1 GM3 GM2 GM1 ...
Page 27
... ADC bits are status bits which, when set, indicate that a particular section of the Codec is ready. After the Controller receives the Codec Ready bit in Slot 0, these status bits must be checked before writing to any mixer registers. DS315PP2 D10 PR2 PR1 PR0 CS4298 REF ANL DAC D0 ADC 27 ...
Page 28
... CDAC, LDAC, SDAC, and MADC are read only bits. 28 D11 D10 LDAC SDAC CDAC D11 D10 MDAC 0 0 PRI 0 0 LDAC SDAC CDAC CS4298 D1 D0 VRA VRA VRA VRA D1 D0 DS315PP2 ...
Page 29
... D7 D6 SR10 SR9 SR8 SR7 SR6 D10 SR10 SR9 SR8 SR7 SR6 D10 SR10 SR9 SR8 SR7 SR6 CS4298 SR5 SR4 SR3 SR2 SR1 SR5 SR4 SR3 SR2 SR1 SR5 SR4 ...
Page 30
... CNT[5:0]/RSR[5:0] Read 000000 000001 … 111111 Table 6. 6 Channel Volume Attenuation D10 Mute D11 D10 CS4298 CNT5 CNT4 CNT3 CNT2 CNT1 CNT0 Gain Level 0 dB -1.5 dB ... -94 RSR5 RSR4 RSR3 RSR2 RSR1 RSR0 D6 D5 ...
Page 31
... HADC DAC1 ADC1 DAC2 ADC2 DAC1 ADC1 DAC1 ADC1 HADC ADC1 SR5 SR4 SR3 SR2 SR5 SR4 SR3 SR2 CS4298 D1 D0 MREF GPIO MREF GPIO MREF GPIO MREF GPIO D1 D0 SR1 SR0 D1 D0 SR1 SR0 31 ...
Page 32
... D10 SR10 SR9 SR8 SR7 SR6 D10 Mute D10 Mute D10 Mute CS4298 SR5 SR4 SR3 SR2 SR1 ADC3 ADC2 ADC3 ADC2 ADC3 ADC2 DS315PP2 ...
Page 33
... GP9 GP8 GP7 GP6 Function Output Output Input Input Table 7. GPIO Input/Output Configuration D10 GS9 GS8 GS7 GS6 CS4298 GC5 GC4 GC3 GC2 GC1 GP5 GP4 GP3 GP2 GP1 CMOS drive Open drain ...
Page 34
... Default 0000h The CS4298 has the ability to generate a “wake up” cycle by a transition of a GPIO pin when the AC-Link has been powered down mask bit is set, a one being set in the corresponding GPIO Pin Status (Index 54h) will initiate a wake up interrupt. Bit 0 of SDATA_IN Slot 12 will be set indicating a GPIO interrupt. GPIO pins must be defined as “ ...
Page 35
... Line Surrnd Left Right Center Right Table 9. Slot Assignments D10 CC6 CC5 CC4 CC3 CC2 CS4298 MD1 Modem Modem Modem DAC2 ADC1 ADC2 Handset Line 1 Handset Line 2 Line 1 Line Handset ...
Page 36
... S6 D10 PID2 PID3-PID0 Part Name 000 CS4297 001 CS4297A 010 CS4294 Rev C * 010 CS4298 011 CS4299 * D3 set Table 10. Reg. 7Eh Defined Part ID’s CS4298 PID1 PID0 RID2 RID1 DS315PP2 RID0 ...
Page 37
... The mono microphone input has one mute and one volume control. The inputs to the output mixer are: the input mixer output, the PC Beep mono input, and the Phone mono input. All analog inputs to the CS4298, including CD_GND, should be capacitively coupled to the input pins. Since many analog levels can be as large attenuate the analog input ( stereo line-level inputs: LINE_IN, AUX_IN, and VIDEO_IN ...
Page 38
... AGND 0.068 µF X7R 220 pF 220 pF 6 µF 2 CGND AGND Figure 12. PC ‘99 Microphone Pre-amplifier +5 VA U1A 47 k MC33078D µ AGND AGND +5 VA U1B MC33078D µ MIC1 X7R 4 AGND 220 CS4298 DS315PP2 ...
Page 39
... PC, for storing digital CD-ROM) or playing digital audio from digital speakers. Figure 14 illustrates the circuit necessary for implementation of the IEC-958 consumer in- terface. The CS4298 is capable of directly driving the voltage divider for the 75 tional current driver is shown when an increase of the transmission range of the coaxial circuitry is required ...
Page 40
... The pins AVdd1 and AVdd2 supply power to all the analog circuitry on the CS4298. This 5 Volt analog supply should be generated from a voltage regulator (7805 type) connected to a +12 Volt supply. This helps isolate the analog circuitry from noise typically found digital supplies which power many digital circuits envi- ronment ...
Page 41
... AC ’97 Controller continuously to the CS4298. 7.7 Hybrid Interface Figure 16 indicates the required components for the secondary side of the hybrid circuity required for the CS4298. The multiple configurations required for the line interface are beyond the scope of this document. Please contact Crystal applications engineering for additional information. . ...
Page 42
... AVss3 48 MTX MTX AVdd3 MRX MRX+ 43 ID0 ALT_LINE_OUT_R ALT_LINE_OUT_L 39 39 AVss2 38 38 AVdd2 LINE_OUT_R 35 36 LINE_OUT_L 34 35 ID1 AFLT2 33 AFLT1 32 Vrefout 31 REFFLT 30 AVss1 29 AVdd1 28 LINE_IN_R 27 LINE_IN_L 26 MIC2 25 MIC1 CS4298 DS315PP2 ...
Page 43
... SDATA_OUT - AC-link Serial Data Input Stream to AC ‘97, Input This input signal transmits the control information and digital audio output streams to be sent to the DACs. The data is clocked into the CS4298 on the falling edge of BIT_CLK. A series terminating resistor of 47 input. ...
Page 44
... ID1#, ID0# - Codec ID, Inputs These pins select the codec ID and mode of operation for the CS4298. They are sampled after the rising edge of RESET# and not used after. These inputs have internal 100 k should be left floating for a logic 0 or tied to analog ground for a logic 1. The pins utilize inverted logic, so the condition of both pins floating sets the codec to primary mode while any other combination sets the codec to a secondary mode ...
Page 45
... CD_L and CD_R - Analog CD Source, Inputs These inputs form a stereo input pair to the CS4298 intended to be used for the Red Book CD audio connection to the audio subsystem. The maximum allowable input (sinusoidal). These inputs are internally biased at the Vrefout voltage reference. AC coupling to external circuitry is required ...
Page 46
... VIDEO_L and VIDEO_R - Analog Video Audio Source, Inputs These inputs form a stereo input pair to the CS4298 intended to be used for the audio signal output of a video device. The maximum allowable input inputs are internally biased at the Vrefout voltage reference. AC coupling to external circuitry is required ...
Page 47
... DAA and is used to transmit over the analog phone line. The maximum full scale differential output is 5.6 Vp-p (HTX+ to HTX-). Each output pin is internally biased at the Vrefout voltage. These pins may be used in single ended fashion by using one leg of the differential output pair. The maximum output for each pin is 2.8 Vp-p or 1.0 Vrms. DS315PP2 CS4298 47 ...
Page 48
... DVdd1, DVdd2 - Digital Supply Voltage These pins provide the digital supply voltage for the AC-link section of the CS4298. These pins may be tied digital or to +3.3 V digital. The CS4298 and digital controller’s AC-link should share a common digital supply. DVss1, DVss2 - Digital Ground These pins are the digital ground connection for the AC-link section of the CS4298 ...
Page 49
... The number of bits in the output words to the DACs, and in the input words to the ADCs. Differential Nonlinearity The worst case deviation from the ideal code width. Units in LSB defined as dB relative to full-scale. The “A” indicates an A weighting filter was used. DS315PP2 CS4298 ® 49 ...
Page 50
... Units in dB. PATHS A-D: Analog in, through the ADC, onto the serial link. D-A: Serial interface inputs through the DAC to the analog output. A-A: Analog in to Analog out (analog mixer). 10. REFERENCES Intel, Audio Codec ‘97 Component Specification, Revision 2.1, May 22,1998. http://developer.intel.com/pc-supp /platform/ac97/ 50 CS4298 DS315PP2 ...
Page 51
... Controlling dimension is mm. JEDEC Designation: MS026 DS315PP2 INCHES MIN MAX --- 0.063 0.002 0.006 0.007 0.011 0.461 0.484 0.390 0.398 0.461 0.484 0.390 0.398 0.016 0.024 0.018 0.030 0.000° 7.000° CS4298 A A1 MILLIMETERS MIN MAX --- 1.60 0.05 0.15 0.17 0.27 11.70 12.30 9.90 10.10 11.70 12.30 9.90 10.10 0.40 0.60 0.45 0.75 0.00° 7.00° 51 ...
Page 52
...