CXA2060BS Sony, CXA2060BS Datasheet

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CXA2060BS

Manufacturer Part Number
CXA2060BS
Description
Y/C/RGB/D for PAL/NTSC/SECAM color TVs
Manufacturer
Sony
Datasheet

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Part Number:
CXA2060BS
Manufacturer:
PLX
Quantity:
101
For the availability of this product, please contact the sales office.
Description
the luminance signal processing, chroma signal
processing, RGB signal processing, and sync and
deflection signal processing functions for PAL/
NTSC/SECAM system color TVs onto a single chip.
This IC includes deflection processing functions for
wide-screen TVs. With a SECAM decoder and 1H
delay line built in for PAL/SECAM, this IC can be
used in configuring multi-color system TV set.
Features
• Supports the I
• 1H delay line and SECAM decoder
• Supports NTSC/PAL-N/PAL-M systems with three crystal pins
• Deflection compensation circuit for support of various wide modes
• Count down system eliminates need for V oscillation frequency adjustment
• Automatic identification of 50/60Hz vertical frequency (forced control possible)
• Supports non-interlace display (even/odd selectable)
• Automatic identification of PAL, NTSC and SECAM color systems (forced control possible)
• Automatic identification of 4.43MHz/3.58MHz for crystal (forced control possible)
• No adjustment of Y/C filter required
• Three CV inputs, two Y/C inputs (Y/C input shared with CV input), one Y/C input supporting external comb
• Dynamic picture/dynamic color circuit
• AKB and gamma correction circuits
• YS1 can be forcibly turned OFF
• FSC output (shared with PAL-N crystal pin)
Applications
Structure
Absolute Maximum Ratings (Ta = 25°C, GND1, 2 = 0V)
• Supply voltage
• Operating temperature
• Storage temperature
• Allowable power dissipation
• Voltage at each pin
Operating Conditions
The CXA2060BS is a bipolar IC which integrates
filter, two RGB inputs
Color TVs (4:3, 16:9)
Bipolar silicon monolithic IC
Supply voltage
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
Y/C/RGB/D for PAL/NTSC/SECAM Color TVs
2
C bus
(When mounted on a 50mm
V
Topr
Tstg
P
–0.3 to V
V
CC
D
CC
1
1
,
,
2
2
CC
–65 to +150
–0.3 to +12
–20 to +75
1
,
9 ± 0.5
2 + 0.3
1.5
50mm board)
– 1 –
°C
°C
W
V
V
V
CXA2060BS
48 pin SDIP (Plastic)
E98631-PS

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CXA2060BS Summary of contents

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... Y/C/RGB/D for PAL/NTSC/SECAM Color TVs For the availability of this product, please contact the sales office. Description The CXA2060BS is a bipolar IC which integrates the luminance signal processing, chroma signal processing, RGB signal processing, and sync and deflection signal processing functions for PAL/ NTSC/SECAM system color TVs onto a single chip ...

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... CC – 2 – CXA2060BS CC ...

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... VD– SCP – 3 – CXA2060BS X'TAL 1 X'TAL 2 X'TAL 3 APC FIL Vcc2 TV/C2 IN ABL FIL CVBS2/Y2 IN GND2 EB YUV SW SDA SCL Vcc1 YS2/ YS1 ...

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... The threshold voltage at which ABL activates can be switched to either depending on the bus. CVBS signal/luminance signal input. 147 Input a 1Vp-p (100% white including sync) CVBS signal via a 1µF capacitor. 50k Input the Y signal when a separated Y/C signal is input. 5.4V – 4 – CXA2060BS Description ...

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... Connects a capacitor for luminance signal 1.5k clamp. The 0.1µF capacitor is connected to GND. 4k 147 25k Luminance signal input from a comb filter. The signal is input via a 1µF capacitor and has a level of 2Vp-p. (100% white 25k including sync) 5.4V – 5 – CXA2060BS Description ...

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... V parabola wave output. This pin is used to set the reference current within the IC. 147 A 10k resistor (metallic film resistor) 7.2k having an error less than 1% is connected to GND sawtooth wave output. The polarity of Pin 13 output and Pin 14 output are reversed. 2k – 6 – CXA2060BS Description ...

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... If this occurs, 96k HD output goes high impedance, RGB output is blanked, and 1 is output to the 50µA 100µA status register HNG necessary to turn the IC's power OFF then ON again to cancel this status. – 7 – CXA2060BS Description ...

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... Since the beam current of the video section is large, be sure to attach a zener diode of about 4V to the pin to protect the IC. 200 RGB signal output. Outputs 3.0Vp-p during 100% white input. PICTURE: 3Fh 12k DRIVE: 3Fh BRIGHT: 1Fh 2mA – 8 – CXA2060BS Description ...

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... SCP burst timing just as RGB1 IN. 1.2k 100 This pin becomes the YUV output pin based on the YUV OUT register. Be sure to pull up this pin by 10k when 60k used for YUV output. Power pin for the signal block and deflection block. – 9 – CXA2060BS Description ...

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... This switch includes a function for forcibly turning OFF external Y input only using 20k Y SEL of the bus. 1.5k 40k External Y/R-Y/B-Y signal input. Input is via a 0.01µF capacitor. EY IN: 0.7Vp-p (no sync) ER-Y IN: 0.735Vp-p (75% color bar) EB-Y IN: 0.931Vp-p (75% color bar) 1.5k 65k GND pin for signal block circuits. – 10 – CXA2060BS Description ...

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... Input of CVBS signal from a TV tuner or 147 chroma signal. A 1Vp-p (including sync) CVBS signal or 50k 300mVp-p burst chroma signal is input via a 1µF capacitor. 5.4V Power pin for the signal block. 4. Connects a chroma APC lag lead filter connected to GND. – 11 – CXA2060BS Description ...

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... The crystals should be connected as follows. X'tal 3: PAL-N crystal (3.58205625MHz) X'tal 2: NTSC crystal (3.579545MHz) X'tal 1: PAL/SECAM crystal 2k 1.33k Pin 46 can be switched for use as FSC output using the FSCSW register. 2V DC, 0.7Vp-p signal is output 1.33k – 12 – CXA2060BS Description (4.43361875MHz) or PAL-M crystal (3.57561149MHz) ...

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... No signal = NTSC 0 FSC OFF 1Fh Center value 0 C signal ON 0 Cancels KILLER OFF forced OFF mode 1Fh Center value 0 F0 2.5MHz 0 NTSC JAPAN axis 1Fh Center value 0 100% 0 1:1 7h Center value 7h Center value 7h Center value 7h Center value – 20 – CXA2060BS ...

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... Center value 0 DC level standard mode 1Fh Center value 1Fh Center value 1Fh Center value 7h Center value Fh Max. correction level 7h Center value 7h Center value 7h Center value 7h Center value 2Fh Center value 0 H BLK width variability OFF 0 OFF – 21 – CXA2060BS ...

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... V ZOOM 1 UPPER VLIN 4 LOWER VLIN 4 V TIM SEL 2 ID STOP 2 ID START 2 BELL LEVEL 2 Description 1Fh Center value 0 Zoom OFF 0 Linearity 100% 0 Linearity 100 timing pulse output 1 Center value 2 Center value 1Fh Center value 1 Center value – 22 – CXA2060BS ...

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... CXA2060BS ...

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... TRAPEZIUM AFC BOW LEFT HBLK ASPECT SCROLL UPPER VLIN 0 VTIM SEL BELL F0 IKR APC LOCK NO VSYNC X'TAL ID – 24 – CXA2060BS Bit2 Bit1 Bit0 YUV OUT AGING SEL COL LOOP C BPF C TRAP OFF NO COLOR FSCSW C OFF KILLER OFF ...

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... APC LOCK and SECAM status are Trap filter Trap filter OFF SHP F0 (1) Switches sharpness 2.5MHz 1 = 3.0MHz SHARPNESS (4) Sharpness gain control 0h = –12dB 7h = +3.5dB Fh = +9dB DC TRAN (1) Switches the DC transmission rate 0 = 100 85% PRE/OVER (1) Sharpness preshoot/overshoot control 2:1 Description – 25 – CXA2060BS ...

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... Automatically identifies the four systems PAL, SECAM, NTSC and NTSC 4.43 (two crystals: 4.43 and 3.58 MHz Automatically identifies the three systems PAL-M, PAL-N, and NTSC (three crystals not use HUE (6) Hue control (Phase control for the chroma demodulation axis. Enabled for NTSC only –35 3Fh = +35 – 26 – CXA2060BS ...

Page 27

... R2 IN and B2 IN signal input mode 1 = Pin 30: B-Y output Pin 31: R-Y output Pin 32: Y output (At this time, connect each pin to Vcc via a 10k resistor.) KILLER OFF (1) Color killer ON/OFF switch 0 = Color killer standard mode 1 = Color killer forced OFF mode – 27 – CXA2060BS ...

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... Brightness control (RGB DC bias control –30 IRE to center 1Fh = –12 IRE to reference pulse 3Fh = +30 IRE to center (100 IRE = 2.4Vp-p) R DRIVE (6) R output drive control 0h = 1.5Vp-p 3Fh = 3.0Vp-p G DRIVE (6) G output drive control 0h = 1.5Vp-p 3Fh = 3.0Vp-p (PICTURE: MAX) (PICTURE: MAX) – 28 – CXA2060BS ...

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... Switch for blanking the R output signal not including the AKB reference pulse output blanking output (1) Switch for blanking the G output signal not including the AKB reference pulse output blanking output ON (PICTURE: MAX) (PICTURE: MAX) – 29 – CXA2060BS ...

Page 30

... This setting is recommended when shortening the lock time not use FIELD FREQ (2) Sets the V frequency mode 0 = Automatic identification mode (selects 50Hz when there is no signal Automatic identification mode (selects 60Hz when there is no signal Forced 50Hz 3 = Forced 60Hz – 30 – CXA2060BS ...

Page 31

... RIGHT HBLK (4) Controls the BLK width on the right side of the picture when HBLK = +1.2µs: HBLK max. width 7h = Center Fh = –1.2µs: HBLK min. width HBLK (1) HBLK width control switch when a 16:9 CRT is in 4:3 soft normal mode 0 = Control OFF 1 = Control ON – 31 – CXA2060BS ...

Page 32

... Fh = –5% (max. compensation (1) VD output ON/OFF switch (set power ON voltage 1 = Sawtooth wave H SIZE (6) Horizontal picture size adjustment (DC bias control for EW output) 0Fh = –0.5V (small horizontal picture size) 1Fh = 0V (center 4V DC) 3Fh = +0.5V (large horizontal picture size) – 32 – CXA2060BS ...

Page 33

... RGB vertical blanking is increased by 10H at both top and bottom at this time. V ZOOM (1) Zoom mode ON/OFF switch for 16:9 CRTs 0 = Zoom OFF 1 = Zoom ON (Top and bottom of picture are together cut 25% when ASPECT = 2Fh. RGB output also undergoes blanking during this interval.) 16:9 CRT Full 4:3 CRT Full – 33 – CXA2060BS ...

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... PAL identification status When NO COLOR = NTSC 1 = PAL or NO SIG (KILLER ID ON) When NO COLOR = NTSC or NO SIG (KILLER ID ON PAL SECAM (1) SECAM identification status 0 = Identified as not SECAM (Color killer when APC LOCK = 0 and SECAM = Identified as SECAM – 34 – CXA2060BS ...

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... NO VSYNC (1) VSS presence status Weak electromagnetic field detection can be performed according to RF LEVEL status VSS present 1 = VSS not present RF LEVEL (2) RF weak electromagnetic field level 0 = Strong electromagnetic field 1 = Medium electromagnetic field 2 = Weak electromagnetic field 3 = Very weak electromagnetic field – 35 – CXA2060BS ...

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... CXA2060BS Bit2 Bit1 Bit0 ...

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... Description of Operation 1. Power-On Sequence The CXA2060BS does not have an internal power-on sequence. Therefore, all power-on sequences are controlled by the set microcomputer (I (1) Power-on The IC is reset and the RGB outputs are all blanked. H drive starts to oscillate, but oscillation is at the maximum frequency (16kHz or more) and is not synchronized with the input signal in order to prevent FBT (flyback transformer for generating high voltage) H squealing ...

Page 38

... Sharpness Pre/Over ratio 1:1 Center (User Control) Center (Adjust) Center (Adjust) Center (Adjust) Center (Adjust) Picture ABL/Bright ABL combination mode Vth = 3V Center (Adjust) Dynamic Color OFF YS1 SW normal mode Center (Adjust) Gamma OFF Center (Adjust) Center (Adjust) AUTO Normal – 38 – CXA2060BS ...

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... Various Mode Settings The CXA2060BS contains bus registers for deflection compensation which can be set for various wide modes. Wide mode setting registers can be used separately from registers for normal picture distortion adjustment, and once picture distortion adjustment has been performed in full mode, wide mode settings can be made simply by changing the corresponding register. • ...

Page 40

... Wide zoom LO VLIN (S CORR 4:3 normal Standard value for 4:3 CRTs ASPECT V compression V UNDER SCAN = 1: V size 80% (Compressed to a total of 75%) – 40 – CXA2060BS bus register = 0h: V size 75 HBLK width adjustment ON = Adjustment = 1 = 2Fh: V size 100 Zoom ON (V size limited to 75%) = 0h: Zoom bottom of picture ...

Page 41

... In this mode, the H deflection size must be compressed by 25% compared to full mode. The CXA2060BS performs compression with a register (EW DC) that compresses the H size. Because excessive current flows to the horizontal deflection circuit in this case, adequate consideration must be given to the allowable power dissipation, etc., of the horizontal deflection coil in the design of the set. In addition, this concern can also be addressed through measures taken external to the IC, such as switching the horizontal deflection coil ...

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... Adjust the following three registers with respect to the 16:9 CRT standard values for the register settings. ASPECT = Adjustment value UPPER VLIN = Adjustment value LOWER VLIN = Adjustment value 7) 4:3 CRT normal mode This is the standard mode for 4:3 CRTs. The register settings are the 4:3 CRT standard values. – 42 – CXA2060BS ...

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... Setting V UNDER SCAN to ON compresses the V size to 75%. Fine adjustment of the V size is possible by adding the ASPECT adjustment. 4:3 CRT standard values are used with the ASPECT and V UNDER SCAN settings changed for the register settings. ASPECT = Adjustment V UNDER SCAN = 1 – 43 – CXA2060BS ...

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... COMBY COMBC 1 1 COMBY COMBC 1 1 COMBY COMBC 1 1 NOSIG NOSIG – 44 – CXA2060BS +6dB MON-OUT 2Vp-p –11dB TO-Y Sig 200mVp-p (without sync) +12dB TO-SSEP Sig 4Vp-p (with sync) TO-C Burst: 250mVp-p MON-OUT TV CVBS1 CVBS2 NOSIG CVBS1 CVBS2 NOSIG ...

Page 45

... Status] APC LOCK Input 3.58 1 NTSC 4.43 1 NTSC PAL 1 PAL60 1 SECAM 0 PAL-M 1 PAL color signal 0 PAL SECAM X'TAL – 45 – CXA2060BS FIELD ...

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... Signal Processing The CXA2060BS consists of separate blocks for sync signal processing, H deflection signal processing, V deflection signal processing and Y/C and RGB signal processing, all controlled Sync signal processing The Y signal selected by the video switch is sync separated by a horizontal/vertical sync separation circuit. ...

Page 47

... IC and CRT. This can compensate for temporal variations of the CRT bus (COL SYSTEM and X'TAL forcible modes. – 47 – CXA2060BS resistor to Vcc bus. In addition to ...

Page 48

... The IC can also handle up to 100µA cathode leak current flowing during blanking. Large current flows during the video interval, and this leads to destruction around IK IN, be absolutely sure to connect a zener diode of about 4V to the IK IN pin. – 48 – CXA2060BS 2 C bus and can be ...

Page 49

... Notes on Operation Because the R, G and B signals and deflection signals output from the CXA2060BS are DC direct connected, the pattern (set board) must be designed with consideration given to minimizing interference from around the power supply and GND. Do not separate the GND patterns for each pin; a solid earth is ideal. Locate the power supply side of the by-pass capacitor which is inserted between the power supply and GND as near to the pin as possible ...

Page 50

... V_ASPECT = 0 V_ASPECT = 2F V_ASPECT = 3F 2 Time [ms] 4.5 4 3.5 3 2.5 2 4.5 4 3 4.5 4 3 – 50 – CXA2060BS V_POSITION V_POSITION = 0 V_POSITION = 1F V_POSITION = Time [ms] V_LINE V_LINE = 0 V_LINE = 7 V_LINE = Time [ms] V_SCROLL V_SCROLL = 0 V_SCROLL = 1F V_SCROLL = Time [ms] ...

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... Time [ms] CO_PIN 4.5 4 3.5 3 CO_PIN = 0 CO_PIN = 1F CO_PIN = 3F 2 Time [ms] LO_VLIN 4.5 4 3.5 LO_VLIN = 0 3 LO_VLIN = 7 LO_VLIN = F 2 Time [ms] TRAPEZIUM 4.5 4 3.5 3 TRAPEZIUM = 0 TRAPEZIUM = 7 TRAPEZIUM = F 2 Time [ms] 5 4.5 4 3 Time [ms] – 51 – CXA2060BS H_SIZE H_SIZE = 0 H_SIZE = 1F H_SIZE = ...

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... TRAPOFF = 0 – –2 –4 – –5 –10 –15 –20 –25 – – 52 – CXA2060BS TRAP OFF DATA SHARPNESS SHP-f0 = 3.0MHz SHP-f0 = 2.5MHz 10 15 DATA COLOR DATA ...

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... DATA GAMMA 4.5 4 3.5 3 2.5 GAMMA = 0 GAMMA = 1 2 GAMMA = 2 GAMMA = 3 1 CVIN Input Amplitude [IRE] R-DRIVE, G-DRIVE, B-DRIVE –2 – CUT_OFF ( 100 0 5 – 53 – CXA2060BS DATA 10 15 DATA ...

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... This product uses S-PdPPF (Sony Spec.-Palladium Pre-Plated Lead Frame). 48PIN SDIP (PLASTIC) + 0.4 – 0 1.778 0.5 ± 0.1 0.9 ± 0.15 PACKAGE STRUCTURE PACKAGE MATERIAL LEAD TREATMENT SDIP-48P-02 SDIP048-P-0600 LEAD MATERIAL PACKAGE MASS – 54 – CXA2060BS 0° to 15° EPOXY RESIN SOLDER/PALLADIUM PLATING 42/COPPER ALLOY 5.1g ...

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