HSP48908JC-32 Intersil Corporation, HSP48908JC-32 Datasheet

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HSP48908JC-32

Manufacturer Part Number
HSP48908JC-32
Description
Manufacturer
Intersil Corporation
Datasheet

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Two Dimensional Convolver
The Intersil HSP48908 is a high speed Two Dimensional
Convolver which provides a single chip implementation of a
video data rate 3 x 3 kernel convolution on two dimensional
data. It eliminates the need for external data storage through
the use of the on-chip row buffers which are programmable
for row lengths up to 1024 pixels.
There are Internal Register banks for storing two
independent 3 x 3 filter kernels, thus facilitating the
implementation of adaptive filters and multiple filter
operations on the same data. The pixel data path also
includes an on-chip ALU for performing real-time arithmetic
and logical pixel point operations.
Data is provided to the HSP48908 in a raster scan
noninterlaced fashion, and is internally buffered on images
up to 1024 pixels wide for the 3 x 3 convolution operation.
Images with larger rows and convolution with larger kernel
sizes can be accommodated by using external row buffers
and/or multiple HSP48908s. Coefficient and pixel input data
are 8-bit signed or unsigned integers, and the 20-bit
convolver output guarantees no overflow for kernel sizes up
to 4 x 4. Larger kernel sizes can be implemented however,
since the filter coefficients will normally be less than their
maximum 8-bit values.
The HSP48908 is manufactured using an advanced CMOS
process, and is a low power fully static design. The
configuration of the device is controlled through a standard
microprocessor interface and all inputs/outputs are TTL
compatible.
1
Data Sheet
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
Features
• Single Chip 3 x 3 Kernel Convolution
• Programmable On-Chip Row Buffers
• DC to 32MHz Clock Rate
• Cascadable for Larger Kernels and Images
• On-Chip 8-Bit ALU
• Dual Coefficient Mask Registers, Switchable in a
• 8-Bit Signed or Unsigned Input and Coefficient Data
• 20-Bit Extended Precision Output
• Standard P Interface
• Low Power CMOS
Applications
• Image Filtering
• Edge Detection
• Adaptive Filtering
• Real Time Video Filter
Ordering Information
HSP48908VC-20
HSP48908VC-32
HSP48908JC-20
HSP48908JC-32
HSP48908GC-20
HSP48908GC-32
PART NUMBER
Single Clock Cycle
May 1999
RANGE (
TEMP.
0 to 70
0 to 70
0 to 70
0 to 70
0 to 70
0 to 0
o
C)
File Number 2456.5
100 Ld MQFP
100 Ld MQFP
84 Ld PLCC
84 Ld PLCC
84 Ld PGA
84 Ld PGA
PACKAGE
HSP48908
Q100x14x20
Q100x14x20
N84.1.15
N84.1.15
G84.A
G84.A
PKG. NO.

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HSP48908JC-32 Summary of contents

Page 1

... Adaptive Filtering • Real Time Video Filter Ordering Information PART NUMBER HSP48908VC-20 HSP48908VC-32 HSP48908JC-20 HSP48908JC-32 HSP48908GC-20 HSP48908GC-32 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999 HSP48908 File Number 2456.5 TEMP ...

Page 2

Pinouts 11 CAS06 DOUT0 10 CAS04 CAS06 9 CAS03 8 CAS01 CAS02 DIN1 CASO0 5 DIN2 4 DIN5 3 DIN7 2 CIN0 1 CIN2 A 2 HSP48908 84 PIN PGA TOP VIEW DOUT1 GND DOUT5 DOUT6 DOUT8 ...

Page 3

Pinouts (Continued) CIN3 12 CIN4 13 CIN5 14 CIN6 15 CIN7 16 CIN8 17 CIN9 18 GND 19 CLK HOLD EALU 28 CASI15 29 CASI14 ...

Page 4

Pinouts (Continued) CIN1 CIN2 NC NC CIN3 CIN4 CIN5 CIN6 CIN7 CIN8 CIN9 GND GND CLK HOLD EALU CASI15 CASI14 CASI13 CASI12 NC NC CASI11 4 HSP48908 100 LEAD MQFP TOP ...

Page 5

Block Diagram DATA DELAY - DIN0 - CIN0 - 9 REGISTER CONTROL FRAME RESET CASIO - ADDRESS DECODER LD CS CLK HOLD 5 ...

Page 6

Pin Descriptions NAME PLCC PIN TYPE V 21, 42, 63 GND 19, 48, 54, 61, 69, 76, 82 CLK 20 I DIN-07 1-8 I ClN0-9 9-18 I DOUT0-19 49-53, 55-60, 0 62, 64-68, 70-72 CASIO-15 29-41, 43-45 I ...

Page 7

Functional Description The HSP48908 two-dimensional convolver performs convolution filter kernels. It accepts the image data in raster scan, non-interlaced format, convolves it with the filter kernel and outputs the filtered image. The input and filter kernel ...

Page 8

TABLE 2. ALU PIXEL OPERATIONS (Continued) REGISTER BIT Logical (A AND Logical ( ...

Page 9

HSP48908 ADDRESS DECODE LD CS CIN0 - 9 ALU MICROCODE REGISTER LMC INITIALIZATION REGISTER CAS ROW LENGTH REGISTER EOR CRO ...

Page 10

Initialization Register The Initialization Register is used to appropriately configure the convolver for a particular application loaded through the use of the ClN0-7 bus along with the inputs. Bit 0 defines the type of cascade ...

Page 11

Therefore, care must be taken when modifying the convolver setup parameters during processing to avoid changing the contents of the registers near a rising edge of CLK. The required setup time relative ...

Page 12

A operation: output of ALU = A input (DIN0-7) output rounding and unsigned input data format The convolver can be reset at any time, but must be reset before updating the Row Length Register in order to provide proper operation. ...

Page 13

CASI0- the multiplier array. The inputs of one external row buffer (such as the HSP9500) are connected to the input data in parallel with the DlN0-7 lines of the convolver; and its outputs are ...

Page 14

IMAGE DATA DIN0 - 7 DIN0 - 7 DOUT0 - 19 DOUT0 - 19 HSP48908 HSP48908 #1 CASO0 - 7 CASI0 - 16 CASI0 - DIN0 - 7 DIN0 - 7 DOUT0 ...

Page 15

Absolute Maximum Ratings Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

Page 16

AC Electrical Specifications V PARAMETER Clock Period Clock Pulse Width High Clock Pulse Width Low Data Input Setup Time Data Input Hold Time Clock to Data Out Address Setup Time Address Hold Time Configuration Data Setup Time Configuration Data Hold ...

Page 17

Test Load Circuit (NOTE 9) C NOTES: 9. Includes stray and jig capacitance. 10. Switch S Open for I and I 1 CCSB CCOP Timing Waveforms CLK DIN0 - 7, CASI0 - 15 DOUT0 - 19, CASO0 - 7 CIN0 ...

Page 18

... All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with- out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use ...

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