HYB25L256160AC-7.5 Infineon Technologies AG, HYB25L256160AC-7.5 Datasheet

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HYB25L256160AC-7.5

Manufacturer Part Number
HYB25L256160AC-7.5
Description
Manufacturer
Infineon Technologies AG
Datasheet

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HYB25L256160AC-7.5 Summary of contents

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2. Memory Products D a ...

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... HYB25L256160AC Revision History: 2003-04-16 Previous Version: 2001-11-23 Page Subjects (major changes since last version) all applied new data sheet template Din-A4 Page 13f Temperature Compensated Self Refresh with On-Chip Temperature Sensor Page 15 Table Operation Definition extended by two rows “Clock Suspend Entry” and “Clock Suspend Exit” ...

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... Extended Mode Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 3.3.1 Partial Array Self Refresh . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 3.3.2 Temperature Compensated Self Refresh with On-Chip Temperature Sensor . . . . . . . . . . . . . . . . 13 3.4 Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 3.5 Simplified State Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 4 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 4.1 Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 4.2 Timing Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 4.3 Current Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 5 Timing Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 6 Package Outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 Data Sheet 256-Mbit Mobile-RAM 3 HYB25L256160AC Page V1.1, 2003-04-16 ...

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... In addition a “Deep Power Down Mode” is available. Operating the four memory banks in an Data Sheet @CL3 f CK3 t @CL3 CK3 t @CL3 AC3 t @CL2 CK2 t @CL2 AC2 for VDDQ dependent performance 4 HYB25L256160AC 2 ) –7.5 –8 133 125 7.5 8.0 6.0 6.0 9.5 9.5 6.0 6.0 V1.1, 2003-04-16 Unit MHz ns ns ...

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... HYB/E: designator for memory components for commercial/extended temperature range Mobile-RAM V 25L 2 256: 256-Mbit density 160: Product variation x16 A: Die revision A C: Package type FBGA – 7.5/8: speed grade - see Table 1 Data Sheet 256-Mbit Mobile-RAM Case Temperature Range commerical (0 ° °C) 5 HYB25L256160AC Overview Package P-TFBGA-54 V1.1, 2003-04-16 ...

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... Pin Configuration P-TFBGA-54 (16 Mb Data Sheet 3 VSSQ A VDDQ B VSSQ C VDDQ D VSS E CKE < Top-view > 16) 6 HYB25L256160AC 256-Mbit Mobile-RAM Pin Configuration VDDQ DQ0 VDD VSSQ DQ2 DQ1 VDDQ DQ4 DQ3 VSSQ DQ6 DQ5 VDD LDQM DQ7 CAS RAS WE ...

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... During a Precharge command cycle used in conjunction with BA1 and BA0 to control which bank(s) to precharge high, all four banks will be precharged regardless of the state of BA0 and BA1 low, then BA1 and BA0 are used to define which bank to precharge. 7 HYB25L256160AC 256-Mbit Mobile-RAM Pin Configuration V1.1, 2003-04-16 ...

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... DQM is high. UDQM controls the upper byte and LDQM controls the lower byte. Not Connected No internal electrical connection is present. DQ Power Supply DQ Ground Power Supply Ground 8 HYB25L256160AC 256-Mbit Mobile-RAM Pin Configuration V1.1, 2003-04-16 ...

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... BA0, BA1 BA0, BA1 Column Address Row Address Buffer Row Decoder Memory Array Bank 1 8192 x 512 x 16 Bit Output Buffer 16 Addressing) 9 HYB25L256160AC 256-Mbit Mobile-RAM Pin Configuration Refresh Counter Buffer Row Row Decoder Decoder Memory Memory Array Array Bank 2 Bank 3 ...

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... BA0 and BA1 have to be set to “0” to enter the Mode Register. Data Sheet V to the specified voltage when the input signals are held in the DDQ any of the input pins HYB25L256160AC 256-Mbit Mobile-RAM Functional Description DDQ V1.1, 2003-04-16 ...

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... A9 in Operating Mode also on Write bursts. Data Sheet (BA[1: A10 MODE w for internal address sequence of low order address bits; see 3.2.4. Burst Read/Burst Write Burst Read/Single Write 11 HYB25L256160AC 256-Mbit Mobile-RAM Functional Description Chapter Chapter Chapter V1 ...

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... All other combinations of values for A12-A7 are reserved for future use and/or test modes. Test modes and reserved states should not be used as unknown operation or incompatibility with future versions may result. Data Sheet Table 4. Order of Accesses Within a Burst A0 Type = Sequential 0 0-1 1 1-0 0 0-1-2-3 1 1-2-3-0 0 2-3-0-1 1 3-0-1-2 0 0-1-2-3-4-5-6-7 1 1-2-3-4-5-6-7-0 0 2-3-4-5-6-7-0-1 1 3-4-5-6-7-0-1-2 0 4-5-6-7-0-1-2-3 1 5-6-7-0-1-2-3-4 0 6-7-0-1-2-3-4-5 1 7-0-1-2-3-4-5-6 12 HYB25L256160AC 256-Mbit Mobile-RAM Functional Description Type = Interleaved 0-1 1-0 0-1-2-3 1-0-3-2 2-3-0-1 3-2-1-0 0-1-2-3-4-5-6-7 1-0-3-2-5-4-7-6 2-3-0-1-6-7-4-5 3-2-1-0-7-6-5-4 4-5-6-7-0-1-2-3 5-4-7-6-1-0-3-2 6-7-4-5-2-3-0-1 7-6-5-4-3-2-1-0 V1.1, 2003-04-16 ...

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... By default the on-chip temperature sensor is enabled (TCSR = 00, see temperature values to adjust the self refresh period to with the on-chip temperature sensor being disabled. Data Sheet Table "EMR" on Page 14); the other three TCSR settings use defined 13 HYB25L256160AC 256-Mbit Mobile-RAM Functional Description V1.1, 2003-04-16 ...

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... Temperature Compensated Self Refresh See Chapter 3.3.2. 00 on-chip temperature sensor enabled 01 Maximum case temperature: 45°C, on-chip temperature sensor disabled 10 Maximum case temperature: 15°C, on-chip temperature sensor disabled Operating Mode 00h Normal operation 14 HYB25L256160AC 256-Mbit Mobile-RAM Functional Description TCSR PASR ...

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... signal is input level one clock before the commands are n-1 15 HYB25L256160AC 256-Mbit Mobile-RAM Functional Description AP= Addr CS RAS CAS WE BA0 A10 ...

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... Read burst; if Auto Precharge is not selected, the row remains open for subsequent accesses. Data Sheet 256-Mbit Mobile-RAM Functional Description t is met. MRD t or the refresh interval time limits the RAS 16 HYB25L256160AC Chapter 3. from RCD V1.1, 2003-04-16 ...

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... Data that is presented on the DQ pins before the Burst Stop Command is registered will be written to the memory. Data Sheet Bank 0 Bank 1 Bank 2 Bank 3 all Banks completed. This is determined explicit Precharge RP 17 HYB25L256160AC 256-Mbit Mobile-RAM Functional Description t ) after the Precharge RP from the last data out to apply the t WR V1.1, 2003-04-16 ...

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... The Deep Power Down Mode is an unique function on Mobile RAMs with very low standby currents. All internal voltage generators inside the Mobile RAMs are stopped and all memory data is lost in this mode. To enter the Deep Power Down mode all banks must be precharged. Data Sheet = zero clocks). t DQW 18 HYB25L256160AC 256-Mbit Mobile-RAM Functional Description ). t DQZ ) t REF V1 ...

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... PRE WRITE A Precharge CKEL = Enter Power Down CKEH = Exit Power Down READ = Read w/o Auto Precharge READA = Read with Auto Precharge WRITE = Write w/o Auto Precharge WRITEA = Write with Auto Precharge 19 HYB25L256160AC 256-Mbit Mobile-RAM Functional Description Self Refresh REFS Auto REFA Refresh CKEL ...

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... SSQ 0 0.3 IH DDQ DDQ V –0.3 +0 – 0.2 — OH DDQ V — +0 – – HYB25L256160AC 256-Mbit Mobile-RAM Electrical Characteristics Values Unit Note/ Test Condition typ. max. V — + 0.5 V — DD — +3.6 V — — +3.6 V — — +3.6 V — — +70 C — — +150 C — ...

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... – RCD t 19 – 100000 45 RAS t 70 – – RRD t 1 – CCD 21 HYB25L256160AC 256-Mbit Mobile-RAM Electrical Characteristics Values Unit Note/ Test Condition typ. max. 1) – 3 – 3.8 pF – 5 2.5 V 0.2 V, DDQ DD –7.5 Unit Note/ Test Condition min ...

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... – DQW /2 - 0.5) ns has to be added to this parameter has to be added to this parameter and HYB25L256160AC 256-Mbit Mobile-RAM Electrical Characteristics –7.5 Unit Note/ Test Condition min. max. – – – – CK 4)7)8) 3 – ...

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... DD3P I 20 DD3N I 60 DD4 I 140 DD5 I see Table 12 DD6 I 5 DD7 . If the devices are operating at a frequency less than the maximum operation HYB25L256160AC 256-Mbit Mobile-RAM Electrical Characteristics –7.5 Unit Note/ Test Condition RC,MIN IH,MIN 3) CKE ...

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... A max. 70°C I t.b.d. A max. 15°C DD6 100 A max. 45°C 150 A max. 70°C “Temperature Compensated Self Refresh with On-Chip Temperature Sensor” 24 HYB25L256160AC 256-Mbit Mobile-RAM Electrical Characteristics Note/ Test Condition t =infinity CKE = 0 =infinity CKE = 0 =infinity CKE = 0 ...

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... Figure 33 CAS Latency = 2 – Figure 34 CAS Latency = 3 Precharge Termination of a Burst – Figure 35 CAS Latency = 2 Deep Power Down Mode – Figure 36 Deep Power Down Mode Entry – Figure 37 Deep Power Down Mode Exit Data Sheet 256-Mbit Mobile-RAM 25 HYB25L256160AC Timing Diagrams V1.1, 2003-04-16 ...

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... Bank B Col. Addr. t RCD Write B NOP with Auto Precharge NOP NOP NOP DOUT A0 DOUT A1 DOUT A2 DOUT A0 DOUT A1 26 HYB25L256160AC 256-Mbit Mobile-RAM Timing Diagrams Bank A Bank B Row Addr. Row Addr. t RRD Bank A Bank B NOP Activate Activate NOP ...

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... DOUT A0 DOUT B0 DOUT B1 DOUT B2 DOUT A0 DOUT Minimum delay between the Read and Write Commands = cycles t DQZ NOP NOP NOP DOUT A0 Must be Hi-Z before the Write Command 27 HYB25L256160AC 256-Mbit Mobile-RAM Timing Diagrams NOP NOP NOP NOP DOUT B3 DOUT B1 DOUT B2 DOUT B3 T5 ...

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... Figure 9 Minimum Read to Write Interval Data Sheet DQW t DQZ 1 Clk Interval Bank A NOP Read A Write A Activate Must be Hi-Z before the Write Command DIN A0 28 HYB25L256160AC 256-Mbit Mobile-RAM Timing Diagrams NOP NOP NOP DIN A1 DIN A2 DIN A3 SPT03939 V1.1, 2003-04-16 ...

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... Write Command DOUT A0 DOUT A1 DOUT NOP NOP NOP NOP don’t care DIN A1 DIN A2 DIN A3 Extra data is ignored after termination of a Burst. 29 HYB25L256160AC 256-Mbit Mobile-RAM Timing Diagrams DQW Write B NOP NOP DIN B0 DIN B1 DIN B2 DIN B0 DIN B1 DIN B2 SPT03940 T6 ...

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... DOUT B0 DOUT B1 don’t care don’t care DOUT B0 Input data must be removed from the DQ’s at least one clock cycle before the Read data appears on the outputs to avoid data contention. 30 HYB25L256160AC 256-Mbit Mobile-RAM Timing Diagrams NOP NOP NOP NOP ...

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... DOUT A0 DOUT A1 DOUT A2 DOUT A3 * DOUT A0 DOUT A1 DOUT cha ctivate d a fte r trp 31 HYB25L256160AC 256-Mbit Mobile-RAM Timing Diagrams ctiva ctiva ...

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... ank rite w ith cha rge ank B 32 HYB25L256160AC 256-Mbit Mobile-RAM Timing Diagrams B urst Len gth = tenc ...

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... HZ t AC2 RCD Ax0 Ax1 Activate Read with Read Command Command Auto Precharge Bank A Bank B Command Bank B 33 HYB25L256160AC 256-Mbit Mobile-RAM Timing Diagrams Burst Length = 2, CAS Latency = T10 T11 T12 t CKH Begin Auto Precharge Bank B RAy RBx RAy ...

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... Mode Register Set Data Sheet RSC HYB25L256160AC 256-Mbit Mobile-RAM Timing Diagrams aten SPT03912_2 V1.1, 2003-04-16 ...

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... Power on Sequence and Auto Refresh (CBR) Data Sheet T10 T11 T12 T13 Minimum of 8 Refresh Cycles are required 8th Auto Refresh Command 35 HYB25L256160AC 256-Mbit Mobile-RAM Timing Diagrams T14 T15 T16 T17 T18 T19 T20 T21 2 Clock min. Address Key t RC Mode Register ...

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... T9 T10 T11 T12 T13 t CSL t t CSL CSL Ax0 Ax1 Ax2 Ax3 Clock Clock Clock Suspend Suspend Suspend 1 Cycle 2 Cycles 3 Cycles 36 HYB25L256160AC 256-Mbit Mobile-RAM Timing Diagrams Burst Length = 4, CAS Latency = 2 T14 T15 T16 T17 T18 T19 T20 T21 T22 t HZ SPT03914 V1.1, 2003-04-16 ...

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... T9 T10 T11 T12 T13 t CSL t t CSL CSL Ax0 Ax1 Ax2 Clock Clock Suspend Suspend 1 Cycle 2 Cycles 37 HYB25L256160AC 256-Mbit Mobile-RAM Timing Diagrams Burst Length = 4, CAS Latency = 3 T14 T15 T16 T17 T18 T19 T20 T21 T22 t HZ Ax3 Clock Suspend 3 Cycles SPT03915 V1.1, 2003-04-16 ...

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... Clock Suspension During Burst Write CAS Latency = 2 Data Sheet T10 T11 T12 T13 DAx1 DAx2 DAx3 Clock Clock Suspend Suspend 2 Cycles 3 Cycles 38 HYB25L256160AC 256-Mbit Mobile-RAM Timing Diagrams Burst Length = 4, CAS Latency = 2 T14 T15 T16 T17 T18 T19 T20 T21 T22 SPT03916 V1.1, 2003-04-16 ...

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... Clock Suspension During Burst Write CAS Latency = 3 Data Sheet T10 T11 T12 T13 DAx1 DAx2 Clock Clock Clock Suspend Suspend 1 Cycle 2 Cycles 3 Cycles 39 HYB25L256160AC 256-Mbit Mobile-RAM Timing Diagrams Burst Length = 4, CAS Latency = 3 T14 T15 T16 T17 T18 T19 T20 T21 T22 DAx3 V1.1, 2003-04-16 SPT03917 ...

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... T8 T9 T10 T11 T12 T13 CKS CAx Ax0 Ax1 Ax2 Read Clock Mask Clock Mask Command Start End Bank A 40 HYB25L256160AC 256-Mbit Mobile-RAM Timing Diagrams Burst Length = 4, CAS Latency = 2 T14 T15 T16 T17 T18 T19 T20 T21 T22 t CKS t HZ Ax3 ...

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... Self Refresh (Entry and Exit) Data Sheet T10 T11 T12 T13 t CKS t SREX Begin Self Refresh Exit Command Self Refresh Exit Command issued (async.) 41 HYB25L256160AC 256-Mbit Mobile-RAM Timing Diagrams T14 T15 T16 T17 T18 T19 T20 T21 T22 t RC Any Command V1.1, 2003-04-16 SPT03919-4 ...

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... fre HYB25L256160AC 256-Mbit Mobile-RAM Timing Diagrams B urst ten RAx RAx ...

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... CAx CAy Aw0 Aw1 Aw2 Aw3 Ax0 Ax1 Ay0 Ay1 Read Read Command Command Bank A Bank A 43 HYB25L256160AC 256-Mbit Mobile-RAM Timing Diagrams Burst Length = 4, CAS Latency = 2 T14 T15 T16 T17 T18 T19 RAz RAz CAz Ay2 Ay3 Az0 Az1 Az2 Precharge ...

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... CAx CAy Aw0 Aw1 Aw2 Aw3 Ax0 Ax1 Ay0 Read Read Command Command Bank A Bank A 44 HYB25L256160AC 256-Mbit Mobile-RAM Timing Diagrams Burst Length = 4, CAS Latency = 3 T14 T15 T16 T17 T18 T19 T20 T21 T22 RAz RAz CAz Ay1 Ay2 Ay3 Precharge ...

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... W rite P re cha HYB25L256160AC 256-Mbit Mobile-RAM Timing Diagrams B u rst Le n gth = ten ...

Page 46

... CBx CBy DBw1 DBw2 DBw3 DBx0 DBx1 DBy0 DBy1 DBy2 Write Write Command Command Bank B Bank B 46 HYB25L256160AC 256-Mbit Mobile-RAM Timing Diagrams Burst Length = 4, CAS Latency = 3 T14 T15 T16 T17 T18 T19 T20 T21 T22 RBz RBz DBy3 Precharge Activate Command ...

Page 47

... HYB25L256160AC 256-Mbit Mobile-RAM Timing Diagrams B u rst ...

Page 48

... Bx1 Bx2 Bx3 Bx4 Bx5 Bx6 Bx7 Activate Read Precharge Command Command Command Bank A Bank A Bank B 48 HYB25L256160AC 256-Mbit Mobile-RAM Timing Diagrams Burst Length = 8, CAS Latency = 3 T14 T15 T16 T17 T18 T19 T20 T21 T22 RBy RBy CBy t RP Ax0 Ax1 ...

Page 49

... HYB25L256160AC 256-Mbit Mobile-RAM Timing Diagrams B u rst ate ...

Page 50

... WR DAx2 DAx3 DAx4 DAx5 DAx6 DAx7 DBx0 DBx1 Activate Write Precharge Command Command Command Bank B Bank B Bank A 50 HYB25L256160AC 256-Mbit Mobile-RAM Timing Diagrams Burst Length = 8, CAS Latency = 3 T15 T16 T17 T18 T19 T20 RAy RAy CAy DBx2 DBx3 DBx4 ...

Page 51

... DAx3 Ay0 Precharge Read Precharge Command Command Command Bank A Bank A Bank A Activate Command Bank A 51 HYB25L256160AC 256-Mbit Mobile-RAM Timing Diagrams Burst Length = 8 or Full Page, CAS Latency = 2 T13 T14 T15 T16 T17 T18 T19 T20 RAz RAz CAz t RP Ay1 Ay2 ...

Page 52

... Normal Mode Figure 36 Deep Power Down Mode Entry Note: The deep power down mode has to be maintained for a minimum of 100µs. Data Sheet High Precharge Command Deep Power Down Entry Deep Power Down Mode 52 HYB25L256160AC 256-Mbit Mobile-RAM Timing Diagrams DP1.vsd V1.1, 2003-04-16 ...

Page 53

... Issue a mode register set command to initialize the mode register 5. Issue an extended mode register set command to initialize the extende mode register Data Sheet tRP Au to Auto refresh refresh 53 HYB25L256160AC 256-Mbit Mobile-RAM Timing Diagrams tRC Mode Exte nded New Register Mode Com mand ...

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... Figure 38 Package Outline You can find all of our packages, sorts of packing and others in our Infineon Internet Page “Products”: http://www.infineon.com/products. SMD = Surface Mounted Device Data Sheet 256-Mbit Mobile-RAM 54 HYB25L256160AC Package Outline Dimensions in mm V1.1, 2003-04-16 ...

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... Published by Infineon Technologies AG ...

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