AT49BV008A-12TC ATMEL Corporation, AT49BV008A-12TC Datasheet

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AT49BV008A-12TC

Manufacturer Part Number
AT49BV008A-12TC
Description
357-036-542-201 CARDEDGE 36POS DL .156 BLK LOPRO
Manufacturer
ATMEL Corporation
Datasheet

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AT49BV008A-12TC
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Features
Description
The AT49BV/LV008A(T) and AT49BV/LV8192A(T) are 3-volt, 8-megabit Flash memo-
ries organized as 1,048,576 words of 8 bits each or 512K words of 16 bits each.
Manufactured with Atmel’s advanced nonvolatile CMOS technology, the devices offer
access times to 70 ns with power dissipation of just 67 mW at 2.7V read. When dese-
lected, the CMOS standby current is less than 50 µA.
Pin Configurations
Pin Name
A0 - A18
CE
OE
WE
RESET
RDY/BUSY
VPP
I/O0 - I/O14
I/O15 (A-1)
BYTE
NC
Single-voltage Read/Write Operation: 2.7V to 3.6V (BV), 3.0V to 3.6V (LV)
Fast Read Access Time – 70 ns
Internal Erase/Program Control
Sector Architecture
Fast Sector Erase Time – 10 seconds
Byte-by-byte or Word-by-word Programming – 30 µs Typical
Hardware Data Protection
Data Polling for End of Program Detection
Low Power Dissipation
Typical 10,000 Write Cycles
– One 8K Word (16K Bytes) Boot Block with Programming Lockout
– Two 4K Word (8K Bytes) Parameter Blocks
– One 496K Word (992K Bytes) Main Memory Array Block
– 25 mA Active Current
– 50 µA CMOS Standby Current
Function
Addresses
Chip Enable
Output Enable
Write Enable
Reset
Ready/Busy Output
VPP can be left unconnected or connected to VCC, GND, 5V or
12V. The input has no effect on the operation of the device.
Data Inputs/Outputs
I/O15 (Data Input/Output, Word Mode)
A-1 (LSB Address Input, Byte Mode)
Selects Byte or Word Mode
No Connect
8-megabit
(1M x 8/
512K x 16)
Flash Memory
AT49BV008A
AT49BV008AT
AT49LV008A
AT49LV008AT
AT49BV8192A
AT49BV8192AT
AT49LV8192A
AT49LV8192AT
Rev. 1049K–FLASH–11/02
1

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AT49BV008A-12TC Summary of contents

Page 1

... The input has no effect on the operation of the device. I/O0 - I/O14 Data Inputs/Outputs I/O15 (Data Input/Output, Word Mode) I/O15 (A-1) A-1 (LSB Address Input, Byte Mode) BYTE Selects Byte or Word Mode NC No Connect 8-megabit ( 512K x 16) Flash Memory AT49BV008A AT49BV008AT AT49LV008A AT49LV008AT AT49BV8192A AT49BV8192AT AT49LV8192A AT49LV8192AT Rev. 1049K–FLASH–11/02 1 ...

Page 2

AT49BV/LV8192A(T) TSOP Top View A15 1 A14 2 A13 3 A12 4 A11 5 A10 RESET 12 VPP A18 16 A17 ...

Page 3

AT49BV/LV008A(T) Block Diagram VCC VPP GND RESET ADDRESS INPUTS AT49BV/LV8192A(T) Block Diagram VCC VPP GND RESET ADDRESS INPUTS 1049K–FLASH–11/02 AT49BV/LV008A(T)/8192A(T) changed when input levels of 5.5 volts or less are used. The boot sector ...

Page 4

Device Operation AT49BV/LV008A(T)/8192A(T) 4 READ: The AT49BV/LV008A(T)/8192A(T) is accessed like an EPROM. When CE and OE are low and WE is high, the data stored at the memory location determined by the address pins is asserted on the outputs. The ...

Page 5

AT49BV/LV008A(T)/8192A(T) the internal device command register and is a four-bus cycle operation. The device will automatically generate the required internal program pulses. Any commands written to the chip during the embedded programming cycle will be ignored hardware ...

Page 6

AT49BV/LV008A(T)/8192A(T) 6 TOGGLE BIT: In addition to Data Polling, the AT49BV/LV008A(T)/8192A(T) provides another method for determining the end of a program or erase cycle. During a program or erase operation, successive attempts to read data from the device will result ...

Page 7

Command Definition in Hex Command Bus Sequence Cycles Addr Read 1 Addr Chip Erase 6 5555 Sector Erase 6 5555 Byte/Word Program 4 5555 (2) Boot Block Lockout 6 5555 Product ID Entry 3 5555 (3) Product ID Exit 3 ...

Page 8

Command Definition (in Hex) for Alternate Pin Definition of AT49BV/LV008A(T) Command Bus Sequence Cycles Addr Read 1 Addr Chip Erase 6 A555 Sector Erase 6 A555 Byte/Word Program 4 A555 (2) Boot Block Lockout 6 A555 Product ID Entry 3 ...

Page 9

... Condition MHz OUT -400 µA OH AT49BV008A(T)-90 AT49BV8192A(T)-90 N/A -40 ° ° C 2.7V to 3. OUT High-Z High-Z X High-Z ( A18 = Manufacturer Code (3) ...

Page 10

AC Read Characteristics Symbol Parameter t Address to Output Delay ACC ( Output Delay CE ( Output Delay OE (3)( Output Float DF Output Hold from OE ...

Page 11

Input Test Waveforms and Measurement Level Output Test Load Pin Capacitance MHz ° C (1) Symbol Typ OUT Note: 1. This parameter is characterized and is not 100% tested. ...

Page 12

AC Word Load Characteristics Symbol Parameter Address, OE Setup Time AS OES t Address Hold Time AH t Chip Select Setup Time CS t Chip Select Hold Time CH t Write Pulse Width (WE or CE) WP ...

Page 13

Program Cycle Characteristics Symbol Parameter t Byte/Word Programming Time BP t Address Setup Time AS t Address Hold Time AH t Data Setup Time DS t Data Hold Time DH t Write Pulse Width WP t Write Pulse Width High ...

Page 14

Data Polling Characteristics Symbol Parameter t Data Hold Time Hold Time OEH ( Output Delay OE t Write Recovery Time WR Notes: 1. These parameters are characterized and not 100% tested. 2. See t ...

Page 15

Software Product Identification Entry LOAD DATA AA TO ADDRESS 5555 LOAD DATA 55 TO ADDRESS 2AAA LOAD DATA 90 TO ADDRESS 5555 ENTER PRODUCT IDENTIFICATION (2)(3)(5) MODE Software Product Identification Exit LOAD DATA (7) ADDRESS 5555 LOAD ...

Page 16

... Plastic Thin Small Outline Package (TSOP) 48T 48-lead, Plastic Thin Small Outline Package (TSOP) AT49BV/LV008A(T)/8192A(T) 16 Ordering Code Package AT49LV008AT-70CI 48C1 AT49LV008A-70TI 40T AT49BV008AT-90CI 48C1 AT49BV008A-90TI 40T Ordering Code Package AT49LV8192A-70TI 48T AT49LV8192AT-70TI 48T AT49BV8192A-90TI 48T AT49BV8192AT-90TI 48T AT49BV8192AT-90CI 48C1 ...

Page 17

Packaging Information 48C1 – CBGA Dimensions in Millimeters and (Inches). Controlling dimension: millimeters. 0.875 (0.034) REF 0.75 (0.0295) BSC NON-ACCUMULATIVE 2325 Orchard Parkway San Jose, CA 95131 R 1049K–FLASH–11/02 AT49BV/LV008A(T)/8192A(T) 7.10(0.280) 6.90(0.272 7.10(0.280) 6.90(0.272) TOP VIEW 5.25 (0.207) ...

Page 18

TSOP, Type 1 Pin 1 Identifier e E Notes: 1. This package conforms to JEDEC reference MO-142, Variation CD. 2. Dimensions D1 and E do not include mold protrusion. Allowable protrusion 0.15 mm per side ...

Page 19

TSOP Pin 1 Identifier e E Notes: 1. This package conforms to JEDEC reference MO-142, Variation DD. 2. Dimensions D1 and E do not include mold protrusion. Allowable protrusion 0.15 mm per side and on ...

Page 20

... Atmel Corporation 2002. Atmel Corporation makes no warranty for the use of its products, other than those expressly contained in the Company’s standard warranty which is detailed in Atmel’s Terms and Conditions located on the Company’s web site. The Company assumes no responsibility for any errors which may appear in this document, reserves the right to change devices or specifications detailed herein at any time without notice, and does not make any commitment to update the information contained herein ...

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