W78E52BP-40 Winbond, W78E52BP-40 Datasheet

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W78E52BP-40

Manufacturer Part Number
W78E52BP-40
Description
8-bit MTP microcontroller
Manufacturer
Winbond
Datasheet

Specifications of W78E52BP-40

Dc
N/A

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GENERAL DESCRIPTION
The W78E52B is an 8-bit microcontroller which can accommodate a wider frequency range with low
power consumption. The instruction set for the W78E52B is fully compatible with the standard 8051.
The W78E52B contains an 8K bytes MTP ROM (Multiple-Time Programmable ROM); a 256 bytes
RAM; four 8-bit bi-directional and bit-addressable I/O ports; an additional 4-bit I/O port P4; three 16-
bit timer/counters; a hardware watchdog timer and a serial port. These peripherals are supported by
eight sources two-level interrupt capability. To facilitate programming and verification, the MTP-ROM
inside the W78E52B allows the program memory to be programmed and read electronically. Once
the code is confirmed, the user can protect the code for security.
The W78E52B microcontroller has two power reduction modes, idle mode and power-down mode,
both of which are software selectable. The idle mode turns off the processor clock but allows for
continued peripheral operation. The power-down mode stops the crystal oscillator for minimum power
consumption. The external clock can be stopped at any time and in any state without affecting the
processor.
FEATURES
Fully static design 8-bit CMOS microcontroller
Wide supply voltage of 4.5V to 5.5V
256 bytes of on-chip scratchpad RAM
8 KB electrically erasable/programmable MTP-ROM
64 KB program memory address space
64 KB data memory address space
Four 8-bit bi-directional ports
One extra 4-bit bit-addressable I/O port, additional INT2 / INT3
(available on 44-pin PLCC/QFP package)
Three 16-bit timer/counters
One full duplex serial port(UART)
Eight sources, two-level interrupt capability
Built-in power management
Code protection mechanism
Packages:
Watchdog Timer
EMI reduction mode
DIP 40: W78E52B-24/40
PLCC 44: W78E52BP-24/40
PQFP 44: W78E52BF-24/40
8-BIT MTP MICROCONTROLLER
- 1 -
Preliminary W78E52B
Publication Release Date: December 1998
Revision A1

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W78E52BP-40 Summary of contents

Page 1

... Three 16-bit timer/counters One full duplex serial port(UART) Watchdog Timer Eight sources, two-level interrupt capability EMI reduction mode Built-in power management Code protection mechanism Packages: DIP 40: W78E52B-24/40 PLCC 44: W78E52BP-24/40 PQFP 44: W78E52BF-24/40 Preliminary W78E52B 8-BIT MTP MICROCONTROLLER Publication Release Date: December 1998 - 1 - Revision A1 ...

Page 2

... PIN CONFIGURATIONS 40-Pin DIP (W78E52B) 44-Pin PLCC (W78E52BP P1.5 8 P1.6 9 P1.7 10 RST 11 RXD, P3.0 12 INT2, P4.3 13 TXD, P3.1 14 INT0, P3.2 15 INT1, P3.3 16 T0, P3.4 17 T1, P3.5 ...

Page 3

PIN DESCRIPTION SYMBOL EXTERNAL ACCESS ENABLE: This pin forces the processor to execute out of EA external ROM. It should be kept high to access internal ROM. The ROM address and data will not be presented on the bus if ...

Page 4

BLOCK DIAGRAM P1.0 ~ Port Port 1 1 P1.7 Latch INT2 Interrupt INT3 Timer 2 Timer 0 Timer 1 UART P3.0 Port 3 Port ~ 3 P3.7 Latch Port 4 P4.0 Latch Port ~ 4 P4.3 XTAL1 FUNCTIONAL DESCRIPTION The ...

Page 5

The operations of Timer 0 and Timer 1 are the same as in the W78C51. Timer special feature of the W78E54B 16-bit timer/counter that is configured and controlled by the T2CON register. Like Timers ...

Page 6

PORT4 Another bit-addressable port P4 is also available and only 4 bits (P4<3:0>) can be used. This port address is located at 0D8H with the same function as that of port P1, except the P4.3 and P4.2 are alternative ...

Page 7

The power-off flag is located at PCON.4. This bit is set when V be used to determine if a reset is a warm boot or a cold boot subsequently reset by software. Watchdog Timer The Watchdog timer ...

Page 8

Before Watchdog time-out occurs, the program must clear the 14-bit timer by writing 1 to WDTC.6 (CLRW). After 1 is written to this bit, the 14-bit timer, prescaler and this bit will be reset on the next instruction cycle. The ...

Page 9

Power-down Mode When the PD bit of the PCON register is set, the processor enters the power-down mode. In this mode all of the clocks are stopped, including the oscillator. The only way to exit power-down mode ...

Page 10

Program/Erase Inhibit Operation This operation allows parallel erasing or programming of multiple chips with different data. When P3. P3. except for the P3.6 and P3.7 pins, the individual chips may ...

Page 11

Reserved Lock bit, logic 0 : active B1 : MOVC inhibit, logic 0 : the MOVC instruction ...

Page 12

P3.7 IH X'tal1 X'tal2 Vss Programming Configuration ABSOLUTE MAXIMUM RATINGS PARAMETER DC Power Supply Input Voltage Operating Temperature Storage Temperature ...

Page 13

DC Characteristics, continued PARAMETER Input Leakage Current P0, EA Output Low Voltage P1, P2, P3 Output Low Voltage (*3) ALE, PSEN , P0 Output High Voltage P1, P2, P3 Output High Voltage (*3) ALE, PSEN , P0 Input Low Voltage ...

Page 14

AC CHARACTERISTICS The AC specifications are a function of the particular process used to manufacture the part, the ratings of the I/O buffers, the capacitive load, and the internal routing capacitance. Most of the specifications can be expressed in terms ...

Page 15

Data Read Cycle PARAMETER ALE Low to RD Low RD Low to Data Valid Data Hold from RD High Data Float from RD High RD Pulse Width Notes: 1. Data memory access time " ...

Page 16

Program Operation, continued PARAMETER CE Program Pulse Width for Program Operation OECTRL Setup Time OECTRL Hold Time OE Setup Time OE High to Output Float Data Valid from OE Note: Flash data can be accessed only in flash mode. The ...

Page 17

Timing Waveforms, continued Data Read Cycle S4 S5 XTAL1 ALE PSEN PORT 2 A0-A7 PORT 0 RD Data Write Cycle S4 XTAL1 ALE PSEN PORT 2 PORT 0 A0- A8-A15 DATA T T DAR ...

Page 18

Timing Waveforms, continued Port Access Cycle XTAL1 ALE T PDS PORT INPUT SAMPLE Program Operation V P2 (A15... A0 P3 (CE P3.3 IH (OECTRL P3 ...

Page 19

TYPICAL APPLICATION CIRCUITS Expanded External Program Memory and Crystal XTAL1 XTAL2 CRYSTAL 8 RST C1 C2 INT0 12 13 INT1 P1.0 2 P1.1 ...

Page 20

Typical Application Circuits, continued Expanded External Data Memory and Oscillator OSCILLATOR 8 W78E52B 39 AD0 3 P0.0 ...

Page 21

PACKAGE DIMENSIONS 40-pin DIP 44-pin PLCC Seating Plane ...

Page 22

... Dimension b does not include dambar protrusion/intrusion. 3. Controlling dimension: Millimeter 4. General appearance spec. should be based on final visual inspection spec. Winbond Electronics North America Corp. Winbond Memory Lab. Winbond Microelectronics Corp. Winbond Systems Lab. 2727 N. First Street, San Jose, CA 95134, U.S.A. TEL: 408-9436666 FAX: 408-5441798 Max ...

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