IC AMP AUDIO 150W AB 27FLEXIWATT

TDA7575

Manufacturer Part NumberTDA7575
DescriptionIC AMP AUDIO 150W AB 27FLEXIWATT
ManufacturerSTMicroelectronics
TypeClass AB
TDA7575 datasheets
 


Specifications of TDA7575

Output Type1-Channel (Mono) or 2-Channel (Stereo)Max Output Power X Channels @ Load150W x 1 @ 1 Ohm; 75W x 2 @ 2 Ohm
Voltage - Supply8 V ~ 18 VFeaturesDifferential Inputs, I²C, Mute, Short-Circuit and Thermal Protection, Standby
Mounting TypeThrough HolePackage / Case27-Flexiwatt (bent and staggered leads)
Operational ClassClass-ABOutput Power (typ)150x1@1Ohm/75x2@2OhmW
Audio Amplifier FunctionSpeakerTotal Harmonic Distortion0.02@1Ohm@30W%
Single Supply Voltage (typ)9/12/15VDual Supply Voltage (typ)Not RequiredV
Power Supply RequirementSinglePower Dissipation86W
Rail/rail I/o TypeNoSingle Supply Voltage (min)8V
Single Supply Voltage (max)18VDual Supply Voltage (min)Not RequiredV
Dual Supply Voltage (max)Not RequiredVOperating Temp Range-55C to 150C
Operating Temperature ClassificationMilitaryMountingSurface Mount
Pin Count36Package TypePSOP
Lead Free Status / RoHS StatusLead free / RoHS Compliant  
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TDA7575
ELECTRICAL CHARACTERISTCS: (continued)
Symbol
Parameter
V
Offset Detection
O
2
I
C BUS INTERFACE
f
Clock Frequency
SCL
V
Input Low Voltage
IL
V
Input High Voltage
IH
2
I
C BUS INTERFACE
Data transmission from microprocessor to the TDA7575 and viceversa takes place through the 2 wires I
face, consisting of the two lines SDA and SCL (pull-up resistors to positive supply voltage must be connected).
Data Validity
As shown by fig. 1, the data on the SDA line must be stable during the high period of the clock.
The HIGH and LOW state of the data line can only change when the clock signal on the SCL line is LOW.
Start and Stop Conditions
As shown by fig. 2 a start condition is a HIGH to LOW transition of the SDA line while SCL is HIGH.
The stop condition is a LOW to HIGH transition of the SDA line while SCL is HIGH.
Byte Format
Every byte transferred to the SDA line must contain 8 bits. Each byte must be followed by an acknowledge bit.
The MSB is transferred first.
Acknowledge
The transmitter* puts a resistive HIGH level on the SDA line during the acknowledge clock pulse (see fig.3). The
receiver** the acknowledges has to pull-down (LOW) the SDA line during the acknowledge clock pulse, so that
the SDAline is stable LOW during this clock pulse.
* Transmitter
= master ( P) when it writes an address to the TDA7575
= slave (TDA7575) when the P reads a data byte from TDA7575
** Receiver
= slave (TDA7575) when the P writes an address to the TDA7575
= master (mP) when it reads a data byte from TDA7575
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Test Condition
Power Amplifier in play condition
AC Input signals = 0
Min.
Typ.
Max.
Unit
±1.5
±2
±2.5
V
400
KHz
1.5
V
2.3
V
2
C BUS inter-