TDA7575 STMicroelectronics, TDA7575 Datasheet - Page 6

IC AMP AUDIO 150W AB 27FLEXIWATT

TDA7575

Manufacturer Part Number
TDA7575
Description
IC AMP AUDIO 150W AB 27FLEXIWATT
Manufacturer
STMicroelectronics
Type
Class ABr
Datasheets

Specifications of TDA7575

Output Type
1-Channel (Mono) or 2-Channel (Stereo)
Max Output Power X Channels @ Load
150W x 1 @ 1 Ohm; 75W x 2 @ 2 Ohm
Voltage - Supply
8 V ~ 18 V
Features
Differential Inputs, I²C, Mute, Short-Circuit and Thermal Protection, Standby
Mounting Type
Through Hole
Package / Case
27-Flexiwatt (bent and staggered leads)
Operational Class
Class-AB
Output Power (typ)
150x1@1Ohm/75x2@2OhmW
Audio Amplifier Function
Speaker
Total Harmonic Distortion
0.02@1Ohm@30W%
Single Supply Voltage (typ)
9/12/15V
Dual Supply Voltage (typ)
Not RequiredV
Power Supply Requirement
Single
Power Dissipation
86W
Rail/rail I/o Type
No
Single Supply Voltage (min)
8V
Single Supply Voltage (max)
18V
Dual Supply Voltage (min)
Not RequiredV
Dual Supply Voltage (max)
Not RequiredV
Operating Temp Range
-55C to 150C
Operating Temperature Classification
Military
Mounting
Surface Mount
Pin Count
36
Package Type
PSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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TDA7575
ELECTRICAL CHARACTERISTCS: (continued)
I
Data transmission from microprocessor to the TDA7575 and viceversa takes place through the 2 wires I
face, consisting of the two lines SDA and SCL (pull-up resistors to positive supply voltage must be connected).
Data Validity
As shown by fig. 1, the data on the SDA line must be stable during the high period of the clock.
The HIGH and LOW state of the data line can only change when the clock signal on the SCL line is LOW.
Start and Stop Conditions
As shown by fig. 2 a start condition is a HIGH to LOW transition of the SDA line while SCL is HIGH.
The stop condition is a LOW to HIGH transition of the SDA line while SCL is HIGH.
Byte Format
Every byte transferred to the SDA line must contain 8 bits. Each byte must be followed by an acknowledge bit.
The MSB is transferred first.
Acknowledge
The transmitter* puts a resistive HIGH level on the SDA line during the acknowledge clock pulse (see fig.3). The
receiver** the acknowledges has to pull-down (LOW) the SDA line during the acknowledge clock pulse, so that
the SDAline is stable LOW during this clock pulse.
* Transmitter
** Receiver
6/17
2
I
Symbol
2
C BUS INTERFACE
C BUS INTERFACE
f
V
V
V
SCL
IH
IL
O
= master ( P) when it writes an address to the TDA7575
= slave (TDA7575) when the P reads a data byte from TDA7575
= slave (TDA7575) when the P writes an address to the TDA7575
= master (mP) when it reads a data byte from TDA7575
Offset Detection
Clock Frequency
Input Low Voltage
Input High Voltage
Parameter
Power Amplifier in play condition
AC Input signals = 0
Test Condition
Min.
±1.5
2.3
Typ.
±2
Max.
±2.5
400
1.5
2
C BUS inter-
Unit
KHz
V
V
V

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