E28F020-150 Intel Corporation, E28F020-150 Datasheet
E28F020-150
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E28F020-150 Summary of contents
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... Intel products except as provided in Intel’s Terms and Conditions of Sale for such products Intel retains the right to make changes to these specifications at any time without notice Microcomputer Products may have minor variations to this specification known as errata COPYRIGHT INTEL CORPORATION 1995 28F020 Command Register Architecture for ...
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Figure 1 28F020 Block Diagram Symbol Type A –A INPUT ADDRESS INPUTS for memory addresses Addresses are internally 0 17 latched during a write cycle DQ –DQ INPUT OUTPUT DATA INPUT OUTPUT Inputs data during memory write cycles 0 ...
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Figure 2 28F020 Pin Configurations 28F020 290245 – 3 290245 –4 290245 –5 3 ...
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APPLICATIONS The 28F020 flash memory provides nonvolatility along with the capability to perform over 100 000 electrical chip-erasure reprogram cycles These fea- tures make the 28F020 an innovative alternative to disk EEPROM and battery-backed static RAM Where periodic updates ...
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Figure 3 TSOP Serpentine Layout 28F020 5 ...
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Figure 4 28F020 in a 80C186 System PRINCIPLES OF OPERATION Flash-memory augments EPROM functionality with in-circuit electrical erasure and reprogramming The 28F020 introduces a command register to manage this new functionality The command register allows for 100% TTL-level control ...
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Table 2 28F020 Bus Operations Mode Read Output Disable READ-ONLY Standby Intelligent Identifier (Mfr) Intelligent Identifier (Device) Read READ WRITE Output Disable (5) Standby Write NOTES 1 Refer to DC Characteristics When Manufacturer and device codes may ...
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Intelligent Identifier Operation The Intelligent Identifier operation outputs the manu- facturer code (89H) and device code (BDH) Pro- gramming equipment automatically matches the de- vice with its proper erase and programming algo- rithms With CE and ...
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Read Command While V is high for erasure and programming PP memory contents can be accessed via the read command The read operation is initiated by writing 00H into the command register Microprocessor read cycles retrieve array data The device ...
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Program-Verify Command The 28F020 is programmed on a byte-by-byte basis Byte programming may occur sequentially or at ran- dom Following each programming operation the byte just programmed must be verified The program-verify operation is initiated by writing C0H into ...
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NOTES 1 See DC Characteristics for the value PPL 2 Program Verify is only performed after byte program- ming A final read compare may be performed (option- al) after the register is written with the Read command ...
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See DC Characteristics for the value PPL 2 Erase Verify is performed only after chip-erasure A final read compare may be performed (optional) after the register is written with the read command Figure 6 28F020 ...
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DESIGN CONSIDERATIONS Two-Line Output Control Flash-memories are often used in larger memory ar- rays Intel provides two read-control inputs to ac- commodate multiple memory connections Two-line control provides for a the lowest possible memory power dissipation and b complete assurance ...
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ABSOLUTE MAXIMUM RATINGS Operating Temperature During Read During Erase Program Operating Temperature During Read During Erase Program Temperature Under Bias Temperature ...
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DC CHARACTERISTICS TTL NMOS COMPATIBLE Commercial Products (Continued) Symbol Parameter I V Standby Current CCS Active Read Current CC1 Programming Current CC2 Erase Current CC3 Program Verify Current ...
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DC CHARACTERISTICS CMOS COMPATIBLE Commercial Products Symbol Parameter Notes I Input Leakage Current LI I Output Leakage Current Standby Current CCS Active Read Current CC1 Programming Current CC2 CC I ...
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DC CHARACTERISTICS TTL NMOS COMPATIBLE Extended Temperature Products Symbol Parameter I Input Leakage Current LI I Output Leakage Current Standby Current CCS Active Read Current CC1 Programming Current CC2 CC I ...
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DC CHARACTERISTICS CMOS COMPATIBLE Extended Temperature Products Symbol Parameter Notes I Input Leakage Current LI I Output Leakage Current Standby Current CCS Active Read Current CC1 Programming Current CC2 CC ...
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NOTES 1 All currents are in RMS unless otherwise noted Typical values at V are valid for all product versions (packages and speeds) 2 Not 100% tested Characterization data available 3 ‘‘Typicals’’ are not guaranteed but based on a limited ...
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28F020 20 ...
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Figure 7 AC Waveforms for Read Operations 28F020 21 ...
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28F020 22 ...
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ERASE AND PROGRAMMING PERFORMANCE Parameter Notes Min Chip Erase Time Chip Program Time NOTES 1 ‘‘Typicals’’ are not guaranteed but based on a limited number of samples from production lots Data taken at 25 ...
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Figure 8 28F020 Typical Programming Capability NOTE Does not include Pre-Erase Program Figure 10 28F020 Typical Erase Capability 24 290245– 12 Figure 9 28F020 Typical Program Time at 12V 290245– 14 NOTE Does not include Pre-Erase Program Figure 11 ...
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Figure 12 AC Waveforms for Programming Operations 28F020 25 ...
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Figure 13 AC Waveforms for Erase Operations 26 ...
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28F020 27 ...
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NOTE Alternative CE-Controlled Write Timings also apply to erase operations Figure 14 Alternate AC Waveforms for Programming Operations 28 ...
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... VALID COMBINATIONS P28F020-70 N28F020-70 TN28F020-90 P28F020-90 N28F020-90 P28F020-150 N28F020-150 E28F020-70 F28F020-70 TE28F020-90 E28F020-90 F28F020-90 TF28F020-90 E28F020-150 F28F020-150 ADDITIONAL INFORMATION References ER-20 ‘‘ETOX Flash Memory Technology’’ TM ER-24 ‘‘Intel Flash Memory’’ ER-28 ‘‘ETOX III Flash Memory Technology’’ TM AP-316 ‘ ...