W78E51BP-24 Winbond, W78E51BP-24 Datasheet

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W78E51BP-24

Manufacturer Part Number
W78E51BP-24
Description
8-bit MTP microcontroller
Manufacturer
Winbond
Datasheet

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W78E51BP-24
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WINBON
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W78E51BP-24
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WINBOND/华邦
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20 000
GENERAL DESCRIPTION
The W78E51B is an 8-bit microcontroller which can accommodate a wider frequency range with low
power consumption. The instruction set for the W78E51B is fully compatible with the standard 8051.
The W78E51B contains an 4K bytes MTP ROM (Multiple-Time Programmable ROM); a 128 bytes
RAM; four 8-bit bi-directional and bit-addressable I/O ports; an additional 4-bit I/O port P4; two 16-bit
timer/counters; a hardware watchdog timer and a serial port. These peripherals are supported by
seven sources two-level interrupt capability. To facilitate programming and verification, the MTP-
ROM inside the W78E51B allows the program memory to be programmed and read electronically.
Once the code is confirmed, the user can protect the code for security.
The W78E51B microcontroller has two power reduction modes, idle mode and power-down mode,
both of which are software selectable. The idle mode turns off the processor clock but allows for
continued peripheral operation. The power-down mode stops the crystal oscillator for minimum power
consumption. The external clock can be stopped at any time and in any state without affecting the
processor.
FEATURES
Fully static design 8-bit CMOS microcontroller
Wide supply voltage of 4.5V to 5.5V
128 bytes of on-chip scratchpad RAM
4 KB electrically erasable/programmable MTP-ROM
64 KB program memory address space
64 KB data memory address space
Four 8-bit bi-directional ports
One extra 4-bit bit-addressable I/O port, additional INT2 / INT3
(available on 44-pin PLCC/QFP package)
Two 16-bit timer/counters
One full duplex serial port(UART)
seven sources, two-level interrupt capability
Built-in power management
Code protection mechanism
Packages:
Watchdog Timer
EMI reduction mode
DIP 40: W78E51B-24/40
PLCC 44: W78E51BP-24/40
PQFP 44: W78E51BF-24/40
8-BIT MTP MICROCONTROLLER
- 1 -
Preliminary W78E51B
Publication Release Date: December 1998
Revision A1

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W78E51BP-24 Summary of contents

Page 1

... Two 16-bit timer/counters One full duplex serial port(UART) Watchdog Timer seven sources, two-level interrupt capability EMI reduction mode Built-in power management Code protection mechanism Packages: DIP 40: W78E51B-24/40 PLCC 44: W78E51BP-24/40 PQFP 44: W78E51BF-24/40 Preliminary W78E51B 8-BIT MTP MICROCONTROLLER Publication Release Date: December 1998 - 1 - Revision A1 ...

Page 2

... PIN CONFIGURATIONS 40-Pin DIP (W78E51B) 44-Pin PLCC (W78E51BP P1.5 8 P1.6 9 P1.7 10 RST 11 RXD, P3.0 12 INT2, P4.3 TXD, P3.1 13 INT0, P3 INT1, P3.3 16 T0, P3.4 17 T1, P3 ...

Page 3

PIN DESCRIPTION SYMBOL EXTERNAL ACCESS ENABLE: This pin forces the processor to execute out of EA external ROM. It should be kept high to access internal ROM. The ROM address and data will not be presented on the bus if ...

Page 4

BLOCK DIAGRAM P1.0 ~ Port Port 1 1 P1.7 Latch INT2 Interrupt INT3 Timer 0 Timer 1 UART P3.0 Port 3 Port ~ 3 P3.7 Latch Port 4 P4.0 Latch Port ~ 4 P4.3 XTAL1 FUNCTIONAL DESCRIPTION The W78E51B architecture ...

Page 5

INT2 / INT3 Two additional external interrupts, INT2 and INT3 , whose functions are similar to those of external interrupt 0 and 1 in the standard 80C52. The functions/status of these interrupts are determined/shown by the bits in the ...

Page 6

Reduce EMI Emission Because of on-chip MTP-ROM, when a program is running in internal ROM space, the ALE will be unused. The transition of ALE will cause noise can be turned off to reduce the EMI emission ...

Page 7

Watchdog Timer Control Register Bit: ENW ENW : Enable watch-dog if set. CLRW: Clear watch-dog timer and prescaler if set. This flag will be cleared automatically WIDL : If this bit is set, watch-dog is enabled under IDLE mode. If ...

Page 8

Typical Watch-Dog time-out period when OSC = 20 MHz Clock The W78E51B is designed to be used with either a crystal oscillator or an external clock. Internally, the clock is divided by two before it is used. This makes the ...

Page 9

P1.7 P1.0) and the D7 D0(P0.7 P0.0) serve as the address and data bus respectively for these operations. Read Operation This operation is supported for customer to read their code and the Security bits. The data will not be valid ...

Page 10

Company/Device ID Read Operation This operation is supported for MTP ROM programmer to get the company ID or device ID on the W78E51B. OPERATIONS P3.0 P3.1 (A9 (A13 CTRL) CTRL) Read 0 0 Output Disable 0 0 Program 0 0 ...

Page 11

Reserved Lock bit, logic 0 : active B1 : MOVC inhibit, logic 0 : the ...

Page 12

ABSOLUTE MAXIMUM RATINGS PARAMETER DC Power Supply Input Voltage Operating Temperature Storage Temperature Note: Exposure to conditions beyond those listed under Absolute Maximum Ratings may adversely affect the life and reliability of the device. DC CHARACTERISTICS ...

Page 13

DC Characteristics, continued PARAMETER Input Low Voltage (Except RST) Input Low Voltage (*4) RST Input Low Voltage (*4) XTAL1 Input High Voltage (Except RST) Sink Current P1, P2, P3, P4 Input High Voltage (*4) RST Input High Voltage (*4) XTAL1 ...

Page 14

Clock Input Waveform XTAL1 PARAMETER Operating Speed Clock Period Clock High Clock Low Notes: 1. The clock may be stopped indefinitely in either state. 2. The T specification is used as a reference in other specifications There are ...

Page 15

Data Write Cycle PARAMETER ALE Low to WR Low Data Valid to WR Low Data Hold from WR High WR Pulse Width Note: " " (due to buffer driving delay and wire loading nS. Port Access Cycle PARAMETER ...

Page 16

TIMING WAVEFORMS Program Fetch Cycle S1 XTAL1 ALE PSEN PORT 2 T AAH PORT 0 Code Data Read Cycle S4 S5 XTAL1 ALE PSEN PORT 2 A0-A7 PORT ALW T APL ...

Page 17

Timing Waveforms, continued Data Write Cycle S4 XTAL1 ALE PSEN PORT 2 PORT 0 A0-A7 WR Port Access Cycle XTAL1 ALE T PDS PORT INPUT SAMPLE A8-A15 DATA OUT T DAD T T DAW ...

Page 18

Timing Waveforms, continued Program Operation V P2 (A15... A0 P3 (CE P3.3 IH (OECTRL P3 (OE (A7... A0 ...

Page 19

TYPICAL APPLICATION CIRCUITS Expanded External Program Memory and Crystal XTAL1 XTAL2 CRYSTAL 8 RST C1 C2 INT0 12 13 INT1 P1.0 2 ...

Page 20

Typical Application Circuits, continued Expanded External Data Memory and Oscillator OSCILLATOR 8 W78E51B 39 AD0 3 AD0 ...

Page 21

PACKAGE DIMENSIONS 40-pin DIP 44-pin PLCC Seating Plane ...

Page 22

Package Dimensions, continued 44-pin PQFP See Detail F Seating Plane 44-pin TQFP See Detail F Seating Plane 33 ...

Page 23

... No. 115, Sec. 3, Min-Sheng East Rd., Taipei, Taiwan TEL: 886-2-27190505 FAX: 886-2-27197502 Note: All data and specifications are subject to change without notice. Preliminary W78E51B Winbond Electronics North America Corp. Winbond Memory Lab. Winbond Microelectronics Corp. Winbond Systems Lab. 2727 N. First Street, San Jose, CA 95134, U.S.A. ...

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