LPC47N252-SG Standard Microsystems, LPC47N252-SG Datasheet

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LPC47N252-SG

Manufacturer Part Number
LPC47N252-SG
Description
Advance notebook I/O controller
Manufacturer
Standard Microsystems
Datasheet

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SMSC DB – LPC47N252
3.3V Operation with 5V Tolerant Buffers
ACPI 1.1, PC99/PC2001 Compliant
LPC Interface with Clock Run Support
Internal 64K Flash ROM
Three Power Planes
ACPI Embedded Controller Interface
Configuration Register Set Compatible with ISA
Plug-and-Play Standard (Version 1.0a)
High-Performance Embedded 8051 Keyboard
and System Controller
Serial IRQ Interface Compatible with
Serialized IRQ Support for PCI Systems
15 Direct IRQs
Four 8-Bit DMA Channels
ACPI SCI Interface
nSMI
Shadowed write only registers
Programmed From Direct Parallel Interface,
8051, or LPC Host
2k-Byte Lockable Boot Block
Can be Programmed Without 8051
Intervention
Low Standby Current in Sleep Mode
Intelligent Auto Power Management for
Super I/O
Provides System Power Management
System Watch Dog Timer (WDT)
8042 Style Host Interface
Supports Interrupt and Polling Access
256 Bytes Data RAM
On-Chip Memory-Mapped Control Registers
Access to RTC and CMOS Registers
Up to 16x8 Keyboard Scan Matrix
Two 16 Bit Timer/Counters
Integrated Full-Duplex Serial Port Interface
Eleven 8051 Interrupt Sources
Thirty-Two 8-Bit, Host/8051 Mailbox
Registers
Thirty-six Maskable Hardware Wake-Up
Events
Fast GATEA20
Advanced Notebook I/O Controller
with On-Board FLASH
FEATURES
Advanced Infrared Communications Controller
(IrCC 2.0)
Real-Time Clock
Two 8584-Style ACCESS.Bus Controllers
Four independent Hardware Driven PS/2 Ports
83 General Purpose I/O Pins
Three Programmable Pulse-Width Modulator
Outputs
Dual Fan Tachometer Inputs
Fast CPU_RESET
Multiple Clock Sources and Operating
Frequencies
IDLE and SLEEP Modes
Fail-Safe Ring Oscillator
IrDA V1.2 (4Mbps), HPSIR, ASKIR,
Consumer IR Support
Two IR Ports
Relocatable Base I/O Address
MC146818 and DS1287 Compatible
256 Bytes of Battery Backed CMOS in Two
128-Byte Banks
128 Bytes of CMOS RAM Lockable in 4x32
Byte Blocks
12 and 24 Hour Time Format
Binary and BCD Format
<2 A Standby Current (typ)
8051 Controlled Logic Allows ACCESS.Bus
Master or Slave Operation
ACCESS.Bus Controllers are Fully
Operational on Standby Power
2 Sets of Dedicated Pins per ACCESS.Bus
Controller
36 Maskable Hardware Wake-Event
Capable
18 Programmable Open-Drain/Push-Pull
Outputs
16 Mapped into 8051 SFR Space
24 LPC/8051-Addressable
Independent Clock Rates
6 Bit Duty Cycle Granularity
VCC1 and VCC2 operation mode
ADVANCE INFORMATION
LPC47N252
Rev. 10/27/2000

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LPC47N252-SG Summary of contents

Page 1

... Integrated Full-Duplex Serial Port Interface Eleven 8051 Interrupt Sources Thirty-Two 8-Bit, Host/8051 Mailbox Registers Thirty-six Maskable Hardware Wake-Up Events Fast GATEA20 SMSC DB – LPC47N252 ADVANCE INFORMATION FEATURES Fast CPU_RESET Multiple Clock Sources and Operating Frequencies IDLE and SLEEP Modes Fail-Safe Ring Oscillator Advanced Infrared Communications Controller (IrCC 2 ...

Page 2

... DMA Enable Logic Data Rate and Drive Control Registers Enhanced Digital Data Separator Low Cost Implementation LPC47N252-SG for 208 Pin FBGA Package LPC47N252-SD for 208 Pin TQFP Package SMSC DB – LPC47N252 No Filter Components Required 2 Mbps, 1 Mbps, 500 Kbps, 300 Kbps, 250 ...

Page 3

... There are 480 I/O address location options, 15 IRQ options, and four DMA channel options for each logical device. The LPC47N252 does not require any external filter components and is, therefore, easy to use and offers lower system cost and reduced board area. The LPC47N252 is software and register compatible with SMSC's proprietary 82077AA core. © ...

Page 4

... KSI2 42 KSI1 43 KSI0 44 GPIO20 45 GPIO21 46 IMCLK 47 IMDAT 48 VSS 49 KCLK 50 KDAT 51 EMCLK 52 FIGURE 1 - LPC47N252 PIN CONFIGURATION SMSC DB – LPC47N252 LPC47N252 208 PIN TQFP Page 4 156 VCC0 155 IN7 154 IN6 153 IN5 152 IN4 151 IN3 150 IN2 149 IN1 148 IN0 ...

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