PM7385-BI PMC-Sierra Inc, PM7385-BI Datasheet

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PM7385-BI

Manufacturer Part Number
PM7385-BI
Description
Frame engine and datalink manager 84A672
Manufacturer
PMC-Sierra Inc
Datasheet

Specifications of PM7385-BI

Case
BGA

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Part Number:
PM7385-BI
Quantity:
510
PM7385 FREEDM-84A672
DATA SHEET
PMC-1990114
ISSUE 6
84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER
WITH ANY-PHY PACKET INTERFACE
PM7385
FREEDM™-84A672
FRAME ENGINE AND DATALINK
MANAGER 84A672
DATA SHEET
PROPRIETARY AND CONFIDENTIAL
ISSUE 6: AUGUST 2001
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

Related parts for PM7385-BI

PM7385-BI Summary of contents

Page 1

... FRAME ENGINE AND DATALINK MANAGER 84A672 PROPRIETARY AND CONFIDENTIAL PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER PM7385 DATA SHEET ISSUE 6: AUGUST 2001 PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE ...

Page 2

... Re-issue to coincide with Issue 6 of the Eng Doc. DEFAULT_DRV register bit changed to PERM_DRV and description changed. (See PREP #4938.) Change bars have been kept to show both Issue 4 and Issue 5 changes. Patent information included. Change bars apply to previous issue. PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE i ...

Page 3

... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER Line Interface .................................................................43 Priority Encoder .............................................................44 Channel Assigner ..........................................................44 Loopback Controller.......................................................44 HDLC Processor............................................................45 Partial Packet Buffer Processor .....................................45 FIFO Storage and Control..............................................48 Polling Control and Management...................................49 PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE ii ...

Page 4

... LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER FIFO Storage and Control..............................................49 Polling Control and Management...................................50 Transmit HDLC Processor .............................................52 Transmit Partial Packet Buffer Processor ......................53 Line Interface .................................................................57 Priority Encoder .............................................................57 Channel Assigner ..........................................................58 Identification Register ..................................................183 Boundary Scan Register ..............................................184 PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE iii ...

Page 5

... FREEDM-84A672 TIMING CHARACTERISTICS .................................221 16 ORDERING AND THERMAL INFORMATION ......................................233 17 MECHANICAL INFORMATION.............................................................234 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE iv ...

Page 6

... FIGURE 21 – TRANSMIT APPI TIMING (SPECIAL CONDITIONS)................216 FIGURE 22 – TRANSMIT APPI TIMING (POLLING).......................................217 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE v ...

Page 7

... FIGURE 33 – JTAG PORT INTERFACE TIMING............................................232 FIGURE 34 – 352 PIN ENHANCED BALL GRID ARRAY (SBGA) ..................234 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE vi ...

Page 8

... TABLE 21 – FLAG[2:0] SETTINGS .................................................................131 TABLE 22 – LEVEL[3:0]/TRANS SETTINGS ..................................................133 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE vii ...

Page 9

... TABLE 42 – FREEDM-84A672 ORDERING INFORMATION..........................233 TABLE 43 – FREEDM-84A672 THERMAL INFORMATION ............................233 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE viii ...

Page 10

... For each channel, time-slots are selectable kbits/s format or 64 kbits/s clear channel format. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 51.84 MHz when SYSCLK 1 ...

Page 11

... Low power 2.5 Volt 0.25 mm CMOS technology. · 352 pin enhanced ball grid array (SBGA) package. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 2 ...

Page 12

... Packet-based DSLAM equipment. · Packet over SONET. · PPP over SONET. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 3 ...

Page 13

... PMC-1981125 – “High Density T1/E1 Framer with Integrated VT/TU Mapper and M13 Multiplexer (TEMUX) Data Sheet”, PMC-Sierra Inc. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 4 ...

Page 14

... SPE3_EN R EFC LK FASTCLK C1FP C 1FPOUT PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE STB IN TB RDB ...

Page 15

... DATA SHEET PMC-1990114 5 DESCRIPTION The PM7385 FREEDM-84A672 Frame Engine and Datalink Manager device is a monolithic integrated circuit that implements HDLC processing for a maximum of 672 bi-directional channels. The FREEDM-84A672 may be configured to support channelised T1/J1/E1 or unchannelised traffic links conveyed via a Scaleable Bandwidth Interconnect (SBI) interface ...

Page 16

... The FREEDM-84A672 reports the status of each packet on the receive APPI at the end of each packet transfer. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 7 ...

Page 17

... The FREEDM-84A672 is packaged in a 352 pin enhanced ball grid array (SBGA) package. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 8 ...

Page 18

... TDAT TDAT DDATA TDAT[8] N.C. N.C. VDD2V5 N.C. TDAT[2] TDAT[0] [12] [10] [7] ADETECT N.C. TDAT[9] N.C. N.C. TDAT[5] VSS VSS TDAT[1] N.C. [ PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE N.C. N.C. N.C. VDD2V5 N.C. N.C. N.C. VSS VSS TA[12]/ TWRB N.C. TA[10] TA[8] TA[6] VSS VDD3V3 VSS B TRS N.C. TRDB N.C. N.C. ...

Page 19

... SBI interface must be synchronised to a C1FP signal from a single source. C1FP is sampled on the rising edge of REFCLK. Note – If the SBI bus is being operated in synchronous mode [Ref. 3], C1FP must be asserted for 1 REFCLK cycle every multiples thereof. PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 10 ...

Page 20

... DDATA[7:0], DPL and DV5 signals. Multiple PHY devices can drive DDP at uniquely assigned tributary column positions. This parity signal is intended to detect accidental PHY source clashes in the column assignment. DDP is sampled on the rising edge of REFCLK. PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 11 ...

Page 21

... TDM bus structure. Multiple PHY devices can drive DV5 at uniquely assigned tributary column positions. All movements indicated by this signal must be accompanied by appropriate adjustments in the DPL signal. DV5 is sampled on the rising edge of REFCLK. PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 12 ...

Page 22

... ADP is tristated when the FREEDM-84A672 is not outputting data on a particular tributary column. This parity signal is intended to detect accidental link layer source clashes in the column assignment. ADP is updated on the rising edge of REFCLK. PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 13 ...

Page 23

... TDM bus structure. Multiple link layer devices can drive this signal at uniquely assigned tributary column positions. AV5 is tristated when the FREEDM-84A672 is not outputting data on a particular tributary column. AV5 is updated on the rising edge of REFCLK. PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 14 ...

Page 24

... All other Link Layer devices driving the SBI ADD bus should monitor this signal (to detect multiple sources accidentaly driving the bus) and should cease driving the bus whenever a conflict is detected. AACTIVE is updated on the rising edge of REFCLK. PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 15 ...

Page 25

... RD[2:0] may contain place holder bits or time- slots. RCLK[n] must be externally gapped during the place holder positions in the RD[n] stream. The FREEDM-84A672 supports a maximum data rate of link. RD[2:0] are sampled on the rising edge of the corresponding RCLK[2:0]. PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 51.84 MHz. 51.84 Mbit/s on each 16 ...

Page 26

... RCLK[n-1], RD[n-1], TCLK[n-1] and TD[n-1]) is enabled. When SPEn_EN is high, the corresponding Synchronous Payload Envelope conveyed on the SBI interface is enabled and the corresponding independently timed link is disabled. SPEn_EN are asynchronous inputs. PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 51.84 MHz. 51.84 Mbit/s on each 17 ...

Page 27

... H23 reserved as a null address.) The Tx APPI of F25 each FREEDM-84A672 device is identified by E26 the base address in the TAPI672 Control G23 register. F24 The TXADDR[12:0] signals are sampled on the E25 rising edge of TXCLK. PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 18 ...

Page 28

... TPAn[2:0] are tristate during reset and when a device address other than the FREEDM- 84A672’s base address is provided on TXADDR[12:10]. PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE when one or has underrun on the channel since it was ...

Page 29

... TRDY is always driven tristate one TXCLK cycle after it is driven high. TRDY is tristate during reset. TRDY is updated on the rising edge of TXCLK recommended that TRDY be connected externally to a weak pull-up, e.g. 10 kW. PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 20 ...

Page 30

... The TXDATA[15:0] signals are sampled on the rising edge of TXCLK. M23 The transmit parity signal (TXPRTY) reflects the odd parity calculated over the TXDATA[15:0] signals. TXPRTY is only valid when TXDATA[15:0] are valid. TXPRTY is sampled on the rising edge of TXCLK. PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 21 ...

Page 31

... TXDATA[15:8] signals contain valid data and the TXDATA[7:0] signals are invalid. When TMOD is sampled low and TEOP is sampled high, the complete word on TXDATA[15:0] contains valid data. TMOD must be set low when TEOP is set low. TMOD is sampled on the rising edge of TXCLK. PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 22 ...

Page 32

... Note that up to seven FREEDM-84A672 devices may share a single external controller (one address is reserved as a null address). The Rx APPI of each FREEDM-84A672 device is identified by the base address in the RAPI672 Control register. The RXADDR[2:0] signals are sampled on the rising edge of RXCLK. PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 23 ...

Page 33

... RAPI672 Control register, that FREEDM-84A672 device drives RPA one RXCLK cycle after sampling RXADDR[2:0]. RPA is tristate during reset and when a device address other than the FREEDM-84A672’s base address is provided on RXADDR[2:0]. RPA is updated on the rising edge of RXCLK. PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 24 ...

Page 34

... To commence data transfer, RENB must be sampled low following device selection the responsibility of the external controller to prevent overflow by providing each FREEDM- 84A672 device on an Any-PHY point to multi- point bus sufficient bandwidth through selection. RENB is sampled on the rising edge of RXCLK. PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 25 ...

Page 35

... RXDATA[3]=’1’ => non-octet aligned. RXDATA[4]=’1’ => HDLC packet abort. RXDATA[7:5]=”Xh” => Reserved. The RXDATA[15:0] signals are tristated when the FREEDM-84A672 device is not selected via the RENB signal. The RXDATA[15:0] signals are updated on the rising edge of RXCLK. PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 26 ...

Page 36

... RXDATA[15:0] contains the last data byte of a packet. When REOP is set low, RXDATA[15:0] does not contain the last data byte of a packet. REOP is tristated when the FREEDM-84A672 device is not selected via the RENB signal. REOP is updated on the rising edge of RXCLK. PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 27 ...

Page 37

... RXDATA[7:0] of the final word of each packet transfer (REOP set high) with the status of packet reception when that packet is errored (RERR is high). RERR is tristated when the FREEDM-84A672 device is not selected via the RENB signal. RERR is updated on the rising edge of RXCLK. PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 28 ...

Page 38

... RXDATA[15:0]. (E.g., when RSX is high and address/channel prepend is being output on RXDATA[15:0], RVAL is deasserted.) RVAL is tristated when the FREEDM-84A672 device is not selected via the RENB signal. RVAL is updated on the rising edge of RXCLK. PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 29 ...

Page 39

... The address latch enable signal (ALE) latches the A[11:2] signals during the address phase of a bus transaction. When ALE is set high, the address latches are transparent. When ALE is set low, the address latches hold the address provided on A[11:2]. ALE has an integral pull-up resistor. PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 30 ...

Page 40

... It is the responsibility of the external microprocessor to read the status registers in the FREEDM-84A672 device to determine the exact cause of the interrupt. INTB is an open drain output. PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 31 ...

Page 41

... TCK. TMS has an integral pull up resistor. V3 The test data input signal (TDI) carries test data into the FREEDM-84A672 via the IEEE P1149.1 test access port. TDI is sampled on the rising edge of TCK. TDI has an integral pull up resistor. PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 32 ...

Page 42

... FREEDM-84A672 test access port reset via the IEEE P1149.1 test access port. TRSTB is an asynchronous input with an integral pull up resistor. Note that when TRSTB is not being used, it must be connected to the RSTB input. These pins must be left unconnected. PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 33 ...

Page 43

... FREEDM-84A672 register write accesses during production test (PMCTEST set high). The contents of the test data bus (TDAT[15:0]) are clocked into the addressed register on the rising edge of TWRB. In normal operation (PMCTEST set low), this signal should be tied to logic 1. PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 34 ...

Page 44

... AE12 FREEDM-84A672 registers during production AD13 test (PMCTEST set high). In normal operation AD14 (PMCTEST set low), these signals should be left AF15 unconnected. AD15 AC15 AE17 AF18 AE18 AC17 AE19 AD19 AC19 AE21 PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 35 ...

Page 45

... AC13 AC18 AC23 AD3 AE2 AE25 B2 AD24 H4 The VDD2V5[12:1] DC power pins should be P4 connected to a well decoupled +2 supply. These power pins provide DC AF6 current to the digital core. AE14 AF21 AA26 N25 G24 A21 B13 A6 PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 36 ...

Page 46

... They provide a ground A13 reference for the 3.3 V rail. They also A14 provide a ground reference for the 2.5 V rail. A25 A26 B1 B3 B24 B26 C2 C25 N1 N26 P1 P26 AD2 AD25 AE1 AE3 AE24 AE26 AF1 AF2 AF13 AF14 AF25 AF26 PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 37 ...

Page 47

... Similarly, power to the VDD2V5 pins should be removed before power to the VDD3V3 pins is removed. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 38 ...

Page 48

... The SBI structure uses a locked SONET/SDH structure fixing the position of the TUG-3/TU-3 relative to the STS-3/STM-1 transport frame. The SBI is also of fixed PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 39 ...

Page 49

... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER FCS HDLC Packet PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE Flag Flag 2 n +… The 2 n ...

Page 50

... Processor / Partial Packet Buffer block (RHDL672) at SYSCLK rate. In the event PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER Parity Check Digits PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE g n-1 Message D n-1 MSB 51.84 ...

Page 51

... PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE SBI SBI RCAS SPE Trib. Link No. No. No ...

Page 52

... LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER SBI SBI RCAS SPE Trib. Link No. No. No PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE SBI SBI RCAS SPE Trib. Link No. No. No ...

Page 53

... HDLC data stream is passed to the partial packet buffer processor verbatim. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 44 ...

Page 54

... FIFOs. Figure 3 shows an example of three blocks (blocks 1, 3, and 200) linked together to form a 48 byte channel FIFO. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 45 ...

Page 55

... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER Block 0 Block 1 Block 2 Block 3 Block 200 Block 2047 PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE Block Pointer RAM XX 0x03 XX 0xC8 0x01 ...

Page 56

... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 47 ...

Page 57

... The RAPI672 provides packet status information on the Rx APPI at the end of every packet transfer. The RAPI672 asserts RERR at the end of packet PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 48 ...

Page 58

... TRDY output high before continuing to burst data across the Tx APPI. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 49 ...

Page 59

... TAPI672 uses the 3 most significant bits of the poll address for device recognition PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 50 ...

Page 60

... Channel 5 Channel 5 Channel 6 Channel 6 Channel 7 Channel 7 Channel 8 Channel 8 · · · · · · Channel Channel 671 671 PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE TPA2[0] TPA2[1] (Full/Space) (Space/Starving) Channel 1 Channel 1 Channel 1 Channel 2 Channel 2 Channel 2 Channel 3 Channel 3 Channel 3 Channel 4 Channel 4 Channel 4 Channel 5 ...

Page 61

... Writing new provisioning data to a channel resets the channel’s entire state vector. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 52 ...

Page 62

... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER Block 0 Block 1 Block 2 Block 3 Block 200 Block 2047 PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE Block Pointer RAM XX 0x03 XX 0xC8 0x01 ...

Page 63

... FIFO, and sets the block full flags. The writer reports back to the roamer the number of blocks and end-of-packets transferred. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 54 ...

Page 64

... SBI SBI TCAS SPE Trib. Link No. No. No PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 51.84 Mbps. Each link SBI SBI TCAS SPE Trib. Link No. No. No ...

Page 65

... PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE SBI SBI TCAS SPE Trib. Link No. No. No ...

Page 66

... The priority encoder selects the PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 57 ...

Page 67

... SBI ADD bus. Individual tributaries may also be configured to operate in framed or unframed mode. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 58 ...

Page 68

... FREEDM-84A672 Reserved 0x014 FREEDM-84A672 Master Line Loopback 0x018 – 0x020 FREEDM-84A672 Reserved PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 59 ...

Page 69

... RCAS Reserved 0x200 RHDL Indirect Channel Select 0x204 RHDL Indirect Channel Data Register #1 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 60 ...

Page 70

... TCAS SBI SPE1 Configuration Register #1 0x444 TCAS SBI SPE1 Configuration Register #2 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 61 ...

Page 71

... TAPI Indirect Channel Provisioning 0x608 TAPI Indirect Channel Data Register 0x60C – 0x63C TAPI Reserved PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 62 ...

Page 72

... SBI INSERT Tributary RAM Indirect Access Data 0x69C – 0x6FC SBI INSERT Reserved 0x700 – 0x7FC Reserved PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 63 ...

Page 73

... These registers are not byte addressable. Writing to any one of these registers modifies all 16 bits in the register. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 64 ...

Page 74

... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER Function Default Reset 0 Unused XH TYPE[3] 0 TYPE[2] 1 TYPE[1] 0 TYPE[0] 1 ID[7] 0 ID[7] 0 ID[5] 0 ID[4] 0 ID[3] 0 ID[2] 0 ID[1] 1 ID[0] 0 PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 65 ...

Page 75

... FREEDM-84A672 member of the FREEDM family of products. ID[7:0]: The Device ID bits (ID[7:0]) allow software to identify the version level of the FREEDM-84A672. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 66 ...

Page 76

... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER Function Default TFUDRE 0 TFOVRE 0 TUNPVE 0 TPRTYE 0 Unused XXH RFOVRE 0 RPFEE 0 RABRTE 0 RFCSEE 0 Unused X Unused X PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 67 ...

Page 77

... TFOVRE is set high, attempts to write data to the logical FIFO when it is already full will cause an interrupt to be generated on the INTB output. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 68 ...

Page 78

... FIFO underflow events. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 69 ...

Page 79

... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER Function Default TFUDRI X TFOVRI X TUNPVI X TPRTYI X Unused XXH RFOVRI X RPFEI X RABRTI X RFCSEI X Unused X Unused X PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 70 ...

Page 80

... FIFO when it is already PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 71 ...

Page 81

... TFUDRI remains valid when interrupts are disabled and may be polled to detect transmit FIFO underflow events. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 72 ...

Page 82

... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER Function Default Unused TXCLKA RXCLKA Unused C1FPA FASTCLKA REFCLKA SYSCLKA PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE ...

Page 83

... TXCLK input. TXCLKA is set high on a rising edge of TXCLK, and is set low when this register is read. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 74 ...

Page 84

... When LLBEN[n] is set low, TD[n] is processed normally. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER Function Default Reserved 0000H LLBEN[2] 0 LLBEN[1] 0 LLBEN[0] 0 PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 75 ...

Page 85

... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER Function Default Unused X TP2EN 0 TABRT2EN 0 RP2EN 0 RLENE2EN 0 RABRT2EN 0 RFCSE2EN 0 RSPE2EN 0 Unused X TP1EN 0 TABRT1EN 0 RP1EN 0 RLENE1EN 0 RABRT1EN 0 RFCSE1EN 0 RSPE1EN 0 PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 76 ...

Page 86

... PMON Configurable Accumulator #1 register to increment. Transmit error-free packets are ignored when TP1EN is set low. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 77 ...

Page 87

... HDLC abort events. When TABRT2EN is set high, insertion of an abort in the outgoing stream will cause the PMON Configurable Accumulator PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 78 ...

Page 88

... PMON Configurable Accumulator #2 register to increment. Transmit error-free packets are ignored when TP2EN is set low. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 79 ...

Page 89

... SBI Extract Block. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER Function Default Unused XXH SBIEXTE 0 PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 80 ...

Page 90

... Interrupt Reason register (0x5DC) may be read to obtain more detailed information concerning the error. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER Function Default Unused XXH SBIEXTI X PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 81 ...

Page 91

... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER Function Default SPE1_LBEN[16] 0 SPE1_LBEN[15] 0 SPE1_LBEN[14] 0 SPE1_LBEN[13] 0 SPE1_LBEN[12] 0 SPE1_LBEN[11] 0 SPE1_LBEN[10] 0 SPE1_LBEN[9] 0 SPE1_LBEN[8] 0 SPE1_LBEN[7] 0 SPE1_LBEN[6] 0 SPE1_LBEN[5] 0 SPE1_LBEN[4] 0 SPE1_LBEN[3] 0 SPE1_LBEN[2] 0 SPE1_LBEN[1] 0 PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 82 ...

Page 92

... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER Function Default SPE2_LBEN[4] 0 SPE2_LBEN[3] 0 SPE2_LBEN[2] 0 SPE2_LBEN[1] 0 SPE1_LBEN[28] 0 SPE1_LBEN[27] 0 SPE1_LBEN[26] 0 SPE1_LBEN[25] 0 SPE1_LBEN[24] 0 SPE1_LBEN[23] 0 SPE1_LBEN[22] 0 SPE1_LBEN[21] 0 SPE1_LBEN[20] 0 SPE1_LBEN[19] 0 SPE1_LBEN[18] 0 SPE1_LBEN[17] 0 PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 83 ...

Page 93

... TCAS block (i.e. processed normally). PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 84 ...

Page 94

... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER Function Default SPE2_LBEN[20] 0 SPE2_LBEN[19] 0 SPE2_LBEN[18] 0 SPE2_LBEN[17] 0 SPE2_LBEN[16] 0 SPE2_LBEN[15] 0 SPE2_LBEN[14] 0 SPE2_LBEN[13] 0 SPE2_LBEN[12] 0 SPE2_LBEN[11] 0 SPE2_LBEN[10] 0 SPE2_LBEN[9] 0 SPE2_LBEN[8] 0 SPE2_LBEN[7] 0 SPE2_LBEN[6] 0 SPE2_LBEN[5] 0 PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 85 ...

Page 95

... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER Function Default SPE3_LBEN[8] 0 SPE3_LBEN[7] 0 SPE3_LBEN[6] 0 SPE3_LBEN[5] 0 SPE3_LBEN[4] 0 SPE3_LBEN[3] 0 SPE3_LBEN[2] 0 SPE3_LBEN[1] 0 SPE2_LBEN[28] 0 SPE2_LBEN[27] 0 SPE2_LBEN[26] 0 SPE2_LBEN[25] 0 SPE2_LBEN[24] 0 SPE2_LBEN[23] 0 SPE2_LBEN[22] 0 SPE2_LBEN[21] 0 PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 86 ...

Page 96

... TCAS block (i.e. processed normally). PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 87 ...

Page 97

... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER Function Default SPE3_LBEN[24] 0 SPE3_LBEN[23] 0 SPE3_LBEN[22] 0 SPE3_LBEN[21] 0 SPE3_LBEN[20] 0 SPE3_LBEN[19] 0 SPE3_LBEN[18] 0 SPE3_LBEN[17] 0 SPE3_LBEN[16] 0 SPE3_LBEN[15] 0 SPE3_LBEN[14] 0 SPE3_LBEN[13] 0 SPE3_LBEN[12] 0 SPE3_LBEN[11] 0 SPE3_LBEN[10] 0 SPE3_LBEN[9] 0 PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 88 ...

Page 98

... SPE3_LBEN[n] is set low, transmit data for tributary #n is provided by the TCAS block (i.e. processed normally). PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER Function Default Unused X SPE3_LBEN[28] 0 SPE3_LBEN[27] 0 SPE3_LBEN[26] 0 SPE3_LBEN[25] 0 PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 89 ...

Page 99

... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER Function Default Unused X Reserved 0 Reserved 0 FCLK_FREQ[1] 0 FCLK_FREQ[0] 0 SPE3_TYP[1] 0 SPE3_TYP[0] 0 SPE2_TYP[1] 0 SPE2_TYP[0] 0 SPE1_TYP[1] 0 SPE1_TYP[ T1/J1 links 21 E1 links Single DS-3 link Reserved PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 90 ...

Page 100

... The reserved bits must be set low for correct operation of the FREEDM- 84A672 device. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER FASTCLK Frequency 00 51.84 MHz 01 44.928 MHz 10 Reserved 11 66 MHz PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 91 ...

Page 101

... ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER Function Default Unused X PERM_DRV 0 Reserved 0 Reserved 0 Reserved 0 Reserved 0 Reserved 0 FCLK_FREQ[1] 0 FCLK_FREQ[0] 0 SPE3_TYP[1] 0 SPE3_TYP[0] 0 SPE2_TYP[1] 0 SPE2_TYP[0] 0 SPE1_TYP[1] 0 SPE1_TYP[ T1/J1 links 21 E1 links Single DS-3 link Reserved PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 92 ...

Page 102

... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER FASTCLK Frequency 00 51.84 MHz 01 44.928 MHz 10 Reserved 11 66 MHz PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 93 ...

Page 103

... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER Function Default BUSY X RWB 0 Unused X LINK[6] 0 LINK[5] 0 LINK[4] 0 LINK[3] 0 LINK[2] 0 LINK[1] 0 LINK[0] 0 Unused X TSLOT[4] 0 TSLOT[3] 0 TSLOT[2] 0 TSLOT[1] 0 TSLOT[0] 0 PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 94 ...

Page 104

... RCAS Indirect Channel Data register or to determine when a new indirect write operation may commence. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 95 ...

Page 105

... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER Function Default CDLBEN 0 PROV 0 Unused XH CHAN[9] 0 CHAN[8] 0 CHAN[7] 0 CHAN[6] 0 CHAN[5] 0 CHAN[4] 0 CHAN[3] 0 CHAN[2] 0 CHAN[1] 0 CHAN[0] 0 PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 96 ...

Page 106

... CDLBEN reflects the value written until the completion of a subsequent indirect read operation. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 97 ...

Page 107

... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER Function Default CHDIS 0 Unused XXH DCHAN[9] 0 DCHAN[8] 0 DCHAN[7] 0 DCHAN[6] 0 DCHAN[5] 0 DCHAN[4] 0 DCHAN[3] 0 DCHAN[2] 0 DCHAN[1] 0 DCHAN[0] 0 PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 98 ...

Page 108

... LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER Function Default FEN[11] FEN[10] FEN[9] FEN[8] FEN[7] FEN[6] FEN[5] FEN[4] FEN[3] FEN[2] FEN[1] FEN[0] Unused SBI_MODE[2] SBI_MODE[1] SBI_MODE[0] PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE ...

Page 109

... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER SPE1 Configuration Single unchannelised DS-3 on link 0 28 T1/J1 links 21 E1 links (links 63, 66, 69, … are unused) Reserved Reserved Reserved Reserved Reserved PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 100 ...

Page 110

... LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER Function Default FEN[27] FEN[26] FEN[25] FEN[24] FEN[23] FEN[22] FEN[21] FEN[20] FEN[19] FEN[18] FEN[17] FEN[16] FEN[15] FEN[14] FEN[13] FEN[12] PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 101 ...

Page 111

... LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER Function Default FEN[11] FEN[10] FEN[9] FEN[8] FEN[7] FEN[6] FEN[5] FEN[4] FEN[3] FEN[2] FEN[1] FEN[0] Unused SBI_MODE[2] SBI_MODE[1] SBI_MODE[0] PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 102 ...

Page 112

... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER SPE2 Configuration Single unchannelised DS-3 on link 1 28 T1/J1 links 21 E1 links (links 64, 67, 70, … are unused) Reserved Reserved Reserved Reserved Reserved PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 103 ...

Page 113

... LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER Function Default FEN[27] FEN[26] FEN[25] FEN[24] FEN[23] FEN[22] FEN[21] FEN[20] FEN[19] FEN[18] FEN[17] FEN[16] FEN[15] FEN[14] FEN[13] FEN[12] PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 104 ...

Page 114

... LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER Function Default FEN[11] FEN[10] FEN[9] FEN[8] FEN[7] FEN[6] FEN[5] FEN[4] FEN[3] FEN[2] FEN[1] FEN[0] Unused SBI_MODE[2] SBI_MODE[1] SBI_MODE[0] PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 105 ...

Page 115

... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER SPE3 Configuration Single unchannelised DS-3 on link 2 28 T1/J1 links 21 E1 links (links 65, 68, 71, … are unused) Reserved Reserved Reserved Reserved Reserved PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 106 ...

Page 116

... LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER Function Default FEN[27] FEN[26] FEN[25] FEN[24] FEN[23] FEN[22] FEN[21] FEN[20] FEN[19] FEN[18] FEN[17] FEN[16] FEN[15] FEN[14] FEN[13] FEN[12] PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 107 ...

Page 117

... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER Function Default Unused XXXH Reserved Unused Reserved Reserved Reserved PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 108 ...

Page 118

... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER Function Default BUSY X CRWB 0 Unused XH CHAN[9] 0 CHAN[8] 0 CHAN[7] 0 CHAN[6] 0 CHAN[5] 0 CHAN[4] 0 CHAN[3] 0 CHAN[2] 0 CHAN[1] 0 CHAN[0] 0 PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 109 ...

Page 119

... RHDL Indirect Channel Data #1 and #2 registers or to determine when a new indirect write operation may commence. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 110 ...

Page 120

... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER Function Default PROV 0 STRIP 0 DELIN 0 TAVAIL X Reserved X FPTR[10] X FPTR[9] X FPTR[8] X FPTR[7] X FPTR[6] X FPTR[5] X FPTR[4] X FPTR[3] X FPTR[2] X FPTR[1] X FPTR[0] X PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 111 ...

Page 121

... RAM after an indirect channel read operation has completed. The provision enable flag to be written to the PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 112 ...

Page 122

... CHAN[9:0]. PROV reflects the value written until the completion of a subsequent indirect channel read operation. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 113 ...

Page 123

... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER Function Default 7BIT 0 PRIORITY 0 INVERT 0 Unused X CRC[1] 0 CRC[0] 0 OFFSET[1] 0 OFFSET[0] 0 Unused X Unused X Unused X Unused X XFER[3] 0 XFER[2] 0 XFER[1] 0 XFER[0] 0 PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 114 ...

Page 124

... When INVERT is set to zero, the HDLC PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER CRC[0] Operation 0 No Verification 1 CRC-CCITT 0 CRC-32 1 Reserved PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 115 ...

Page 125

... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 116 ...

Page 126

... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER Function Default BUSY X BRWB X Unused X Unused X Reserved X BLOCK[10] X BLOCK[9] X BLOCK[8] X BLOCK[7] X BLOCK[6] X BLOCK[5] X BLOCK[4] X BLOCK[3] X BLOCK[2] X BLOCK[1] X BLOCK[0] X PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 117 ...

Page 127

... RHDL Indirect Block Data register or to determine when a new indirect write operation may commence. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 118 ...

Page 128

... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER Function Default Unused XH Reserved X BPTR[10] 0 BPTR[9] 0 BPTR[8] 0 BPTR[7] 0 BPTR[6] 0 BPTR[5] 0 BPTR[4] 0 BPTR[3] 0 BPTR[2] 0 BPTR[1] 0 BPTR[0] 0 PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 119 ...

Page 129

... The reserved bit must be set low for correct operation of the FREEDM- 84A672 device. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 120 ...

Page 130

... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER Function Default Unused XXH LENCHK 0 TSTD 0 Unused X Unused X Unused X Unused X Unused X Unused X Unused X Unused X PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 121 ...

Page 131

... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER Function Default MAX[15] 1 MAX[14] 1 MAX[13] 1 MAX[12] 1 MAX[11] 1 MAX[10] 1 MAX[9] 1 MAX[8] 1 MAX[7] 1 MAX[6] 1 MAX[5] 1 MAX[4] 1 MAX[3] 1 MAX[2] 1 MAX[1] 1 MAX[0] 1 PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 122 ...

Page 132

... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER Function Default BUSY X CRWB 0 Unused XH CHAN[9] 0 CHAN[8] 0 CHAN[7] 0 CHAN[6] 0 CHAN[5] 0 CHAN[4] 0 CHAN[3] 0 CHAN[2] 0 CHAN[1] 0 CHAN[0] 0 PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 123 ...

Page 133

... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 124 ...

Page 134

... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER Function Default PROV 0 CRC[1] 0 CRC[0] 0 DELIN 0 Reserved X FPTR[10] 0 FPTR[9] 0 FPTR[8] 0 FPTR[7] 0 FPTR[6] 0 FPTR[5] 0 FPTR[4] 0 FPTR[3] 0 FPTR[2] 0 FPTR[1] 0 FPTR[0] 0 PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 125 ...

Page 135

... PROV is set low, the HDLC processor will ignore requests from the TCAS672 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER CRC[0] Operation 0 No CRC 1 CRC-CCITT 0 CRC-32 1 Reserved PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 126 ...

Page 136

... PROV reflects the value written until the completion of a subsequent indirect channel read operation. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 127 ...

Page 137

... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER Function Default 7BIT 0 Reserved 0 INVERT 0 DFCS 0 Reserved 0 FLEN[10] 0 FLEN[9] 0 FLEN[8] 0 FLEN[7] 0 FLEN[6] 0 FLEN[5] 0 FLEN[4] 0 FLEN[3] 0 FLEN[2] 0 FLEN[1] 0 FLEN[0] 0 PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 128 ...

Page 138

... BIT8 is ignored. 7BIT reflects the value written until the completion of a subsequent indirect channel read operation. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 129 ...

Page 139

... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER Function Default TRANS 0 IDLE 0 Unused X Unused X LEVEL[3] 0 LEVEL[2] 0 LEVEL[1] 0 LEVEL[0] 0 FLAG[2] 0 FLAG[1] 0 FLAG[0] 0 Unused X XFER[3] 0 XFER[2] 0 XFER[1] 0 XFER[0] 0 PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 130 ...

Page 140

... LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER Minimum Number of Flag/Idle Bytes 1 flag / 0 Idle byte 2 flags / 0 idle byte 4 flags / 2 idle bytes 8 flags / 6 idle bytes 16 flags / 14 idle bytes 32 flags / 30 idle bytes 64 flags / 62 idle bytes 128 flags / 126 idle bytes PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 131 ...

Page 141

... Starving Trigger Level column of the PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 132 ...

Page 142

... Blocks (192 bytes free) 24 Blocks 16 Blocks (256 bytes free) 32 Blocks 24 Blocks (384 bytes free) 48 Blocks 32 Blocks (512 bytes free) PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE Start Transmission Level (TRANS=1) 1 Block (16 bytes free) 1 Block (16 bytes free) 2 Blocks (32 bytes free) 3 Blocks (48 bytes free) ...

Page 143

... Blocks (2 Kbytes free) 384 Blocks 256 Blocks (4 Kbytes free) 768 Blocks 512 Blocks (8 Kbytes free) 1024 Blocks (16 Kbytes free) PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE Start Transmission Level (TRANS=1) 32 Blocks (512 bytes free) 48 Blocks (768 bytes free) 96 Blocks (1.5 Kbytes free) ...

Page 144

... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER Function Default BUSY X BRWB 0 Unused XH Reserved X BLOCK[10] 0 BLOCK[9] 0 BLOCK[8] 0 BLOCK[7] 0 BLOCK[6] 0 BLOCK[5] 0 BLOCK[4] 0 BLOCK[3] 0 BLOCK[2] 0 BLOCK[1] 0 BLOCK[0] 0 PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 135 ...

Page 145

... THDL Indirect Block Data register or to determine when a new indirect write operation may commence. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 136 ...

Page 146

... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER Function Default Reserved 0 Unused XH Reserved X BPTR[10] 0 BPTR[9] 0 BPTR[8] 0 BPTR[7] 0 BPTR[6] 0 BPTR[5] 0 BPTR[4] 0 BPTR[3] 0 BPTR[2] 0 BPTR[1] 0 BPTR[0] 0 PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 137 ...

Page 147

... The reserved bits (Reserved) must be set low for correct operation of the FREEDM-84A672 device. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 138 ...

Page 148

... BIT8 is ignored when 7BIT is set low. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER Function Default Unused XXH BIT8 0 TSTD 0 Reserved 0 Unused XH Reserved 0H PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 139 ...

Page 149

... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER Function Default BUSY X RWB 0 Unused X LINK[6] 0 LINK[5] 0 LINK[4] 0 LINK[3] 0 LINK[2] 0 LINK[1] 0 LINK[0] 0 Unused X TSLOT[4] 0 TSLOT[3] 0 TSLOT[2] 0 TSLOT[1] 0 TSLOT[0] 0 PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 140 ...

Page 150

... TCAS Indirect Channel Data register or to determine when a new indirect write operation may commence. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 141 ...

Page 151

... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER Function Default PROV 0 Unused XXH CHAN[9] 0 CHAN[8] 0 CHAN[7] 0 CHAN[6] 0 CHAN[5] 0 CHAN[4] 0 CHAN[3] 0 CHAN[2] 0 CHAN[1] 0 CHAN[0] 0 PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 142 ...

Page 152

... Idle Time-slot Fill Data register. PROV reflects the value written until the completion of a subsequent indirect read operation. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 143 ...

Page 153

... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER Function Default Unused XXH FDATA[7] 1 FDATA[6] 1 FDATA[5] 1 FDATA[4] 1 FDATA[3] 1 FDATA[2] 1 FDATA[1] 1 FDATA[0] 1 PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 144 ...

Page 154

... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER Function Default CHDIS 0 Unused XXH DCHAN[9] 0 DCHAN[8] 0 DCHAN[7] 0 DCHAN[6] 0 DCHAN[5] 0 DCHAN[4] 0 DCHAN[3] 0 DCHAN[2] 0 DCHAN[1] 0 DCHAN[0] 0 PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 145 ...

Page 155

... LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER Function Default FEN[11] FEN[10] FEN[9] FEN[8] FEN[7] FEN[6] FEN[5] FEN[4] FEN[3] FEN[2] FEN[1] FEN[0] Unused SBI_MODE[2] SBI_MODE[1] SBI_MODE[0] PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 146 ...

Page 156

... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER SPE1 Configuration Single unchannelised DS-3 on link 0 28 T1/J1 links 21 E1 links (links 63, 66, 69, … are unused) Reserved Reserved Reserved Reserved Reserved PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 147 ...

Page 157

... LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER Function Default FEN[27] FEN[26] FEN[25] FEN[24] FEN[23] FEN[22] FEN[21] FEN[20] FEN[19] FEN[18] FEN[17] FEN[16] FEN[15] FEN[14] FEN[13] FEN[12] PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 148 ...

Page 158

... LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER Function Default FEN[11] FEN[10] FEN[9] FEN[8] FEN[7] FEN[6] FEN[5] FEN[4] FEN[3] FEN[2] FEN[1] FEN[0] Unused SBI_MODE[2] SBI_MODE[1] SBI_MODE[0] PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 149 ...

Page 159

... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER SPE2 Configuration Single unchannelised DS-3 on link 1 28 T1/J1 links 21 E1 links (links 64, 67, 70, … are unused) Reserved Reserved Reserved Reserved Reserved PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 150 ...

Page 160

... LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER Function Default FEN[27] FEN[26] FEN[25] FEN[24] FEN[23] FEN[22] FEN[21] FEN[20] FEN[19] FEN[18] FEN[17] FEN[16] FEN[15] FEN[14] FEN[13] FEN[12] PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 151 ...

Page 161

... LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER Function Default FEN[11] FEN[10] FEN[9] FEN[8] FEN[7] FEN[6] FEN[5] FEN[4] FEN[3] FEN[2] FEN[1] FEN[0] Unused SBI_MODE[2] SBI_MODE[1] SBI_MODE[0] PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 152 ...

Page 162

... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER SPE3 Configuration Single unchannelised DS-3 on link 2 28 T1/J1 links 21 E1 links (links 65, 68, 71, … are unused) Reserved Reserved Reserved Reserved Reserved PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 153 ...

Page 163

... LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER Function Default FEN[27] FEN[26] FEN[25] FEN[24] FEN[23] FEN[22] FEN[21] FEN[20] FEN[19] FEN[18] FEN[17] FEN[16] FEN[15] FEN[14] FEN[13] FEN[12] PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 154 ...

Page 164

... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER Function Default Unused XXXH Reserved Unused Reserved Reserved Reserved PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 155 ...

Page 165

... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER Function Default Unused XXXH C2DET C1DET UFDET OFDET Unused Unused PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 156 ...

Page 166

... PMON accumulation interval. C2DET is set low if no selected events are detected. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 157 ...

Page 167

... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER Function Default OF[15] X OF[14] X OF[13] X OF[12] X OF[11] X OF[10] X OF[9] X OF[8] X OF[7] X OF[6] X OF[5] X OF[4] X OF[3] X OF[2] X OF[1] X OF[0] X PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 158 ...

Page 168

... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER Function Default UF[15] X UF[14] X UF[13] X UF[12] X UF[11] X UF[10] X UF[9] X UF[8] X UF[7] X UF[6] X UF[5] X UF[4] X UF[3] X UF[2] X UF[1] X UF[0] X PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 159 ...

Page 169

... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER Function Default C1[15] X C1[14] X C1[13] X C1[12] X C1[11] X C1[10] X C1[9] X C1[8] X C1[7] X C1[6] X C1[5] X C1[4] X C1[3] X C1[2] X C1[1] X C1[0] X PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 160 ...

Page 170

... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER Function Default C2[15] X C2[14] X C2[13] X C2[12] X C2[11] X C2[10] X C2[9] X C2[8] X C2[7] X C2[6] X C2[5] X C2[4] X C2[3] X C2[2] X C2[1] X C2[0] X PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 161 ...

Page 171

... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER Function Default ENABLE 0 STATEN 0 Reserved 0 Unused XXXH ALL1ENB 1 BADDR[2] 1 BADDR[1] 1 BADDR[0] 1 PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 162 ...

Page 172

... RHDL672 into its internal FIFOs. When ENABLE is set high, the RAPI672 operates normally. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 163 ...

Page 173

... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER Function Default Unused XXH Reserved 0 Unused X Unused X Reserved 0 Reserved 0 Reserved 0 SBI_PERR_EN 0 SBI_PAR_CTL 1 PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 164 ...

Page 174

... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER Function Default Unused XXH Reserved 0 SPE[1] 0 SPE[0] 0 TRIB[4] 0 TRIB[3] 0 TRIB[2] 0 TRIB[1] 0 TRIB[0] 0 PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 165 ...

Page 175

... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER Function Default Unused XXH BUSY X Unused XXH RWB 0 Reserved 0 PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 166 ...

Page 176

... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER Function Default Unused XXXH Reserved 0 Reserved 0 Reserved 0 TRIB_TYP[1] 0 TRIB_TYP[0] 0 Reserved 0 ENBL 0 PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 167 ...

Page 177

... Table 26 – TRIB_TYP Encoding TRIB_TYP[1:0] PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER Tributary type 00 Reserved 01 Framed 10 Unframed 11 Reserved PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 168 ...

Page 178

... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER Function Default Unused XXH SPE[1] 0 SPE[0] 1 TRIB[4] 0 TRIB[3] 0 TRIB[2] 0 TRIB[1] 0 TRIB[0] 1 PERRI 0 PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 169 ...

Page 179

... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER Function Default ENABLE 0 Reserved 0 Reserved 0 Unused XXXH ALL1ENB 1 BADDR[2] 1 BADDR[1] 1 BADDR[0] 1 PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 170 ...

Page 180

... TRDY high), but data provided will be ignored. When ENABLE is set high, the TAPI672 operates normally. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 171 ...

Page 181

... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER Function Default BUSY X RWB 0 Unused XH CHAN[9] 0 CHAN[8] 0 CHAN[7] 0 CHAN[6] 0 CHAN[5] 0 CHAN[4] 0 CHAN[3] 0 CHAN[2] 0 CHAN[1] 0 CHAN[0] 0 PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 172 ...

Page 182

... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 173 ...

Page 183

... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER Function Default PROV 0 Unused XH BLEN[7] 0 BLEN[6] 0 BLEN[5] 0 BLEN[4] 0 BLEN[3] 0 BLEN[2] 0 BLEN[1] 0 BLEN[0] 0 PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 174 ...

Page 184

... CHAN[9:0] is unprovisioned. PROV reflects the value written until the completion of a subsequent indirect read operation. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 175 ...

Page 185

... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER Function Default Unused XXH Reserved 0 Unused X Unused X Reserved 0 Reserved 0 Reserved 0 Unused X SBI_PAR_CTL 1 PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 176 ...

Page 186

... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER Function Default Unused XXH Reserved 0 SPE[1] 0 SPE[0] 0 TRIB[4] 0 TRIB[3] 0 TRIB[2] 0 TRIB[1] 0 TRIB[0] 0 PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 177 ...

Page 187

... PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER Function Default Unused XXH BUSY X Unused XXH RWB 0 Reserved 0 PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 178 ...

Page 188

... Table 27 below: PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER Function Default Unused XXXH CLK_MSTR 0 TRIB_TYP[1] 0 TRIB_TYP[0] 0 Reserved 0 ENBL 0 PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 179 ...

Page 189

... AJUST_REQ honoured). PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER Tributary type 00 Reserved 01 Framed 10 Unframed 11 Reserved PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 180 ...

Page 190

... TDAT[15:0] pins. Test mode registers (as opposed to normal mode registers) are selected when TA[12]/TRS is set high. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 181 ...

Page 191

... TAPI672 Test Registers Reserved SBI INSERT Test Registers Reserved SBI PISO#1 Test Registers SBI PISO#2 Test Registers SBI PISO#3 Test Registers SBI SIPO#1 Test Registers SBI SIPO#2 Test Registers SBI SIPO#3 Test Registers Reserved PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 182 ...

Page 192

... ISSUE 6 84 LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER Selected Register Instruction Code IR[2:0] Boundary Scan Identification Boundary Scan Bypass Bypass Boundary Scan Bypass Bypass PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE 000 001 010 011 100 101 110 111 183 ...

Page 193

... LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER Register Bit Cell Type 0 OUT_CELL 1 OUT_CELL 2 OUT_CELL 3 OUT_CELL 4 IN_CELL 5 IN_CELL 6 IN_CELL 7 IN_CELL 8 IN_CELL 9 OUT_CELL 10 OUT_CELL 11 IN_CELL 12 OUT_CELL 13 OUT_CELL 14 IN_CELL 15 OUT_CELL 16 OUT_CELL 17 IN_CELL 18 OUT_CELL 19 OUT_CELL 20 IN_CELL 21 OUT_CELL PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE Device I. 184 ...

Page 194

... LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER Register Bit Cell Type 22 OUT_CELL 23 IN_CELL 24 OUT_CELL 25 OUT_CELL 26 IN_CELL 27 OUT_CELL 28 OUT_CELL 29 IN_CELL 30 OUT_CELL 31 OUT_CELL 32 IN_CELL 33 IN_CELL 34 IN_CELL 35 OUT_CELL 36 OUT_CELL 37 IN_CELL 38 OUT_CELL 39 OUT_CELL 40 IN_CELL 41 OUT_CELL 42 OUT_CELL 43 IN_CELL 44 OUT_CELL 45 OUT_CELL 46 IN_CELL 47 OUT_CELL 48 OUT_CELL 49 IN_CELL PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE Device I. 185 ...

Page 195

... LINK, 672 CHANNEL FRAME ENGINE AND DATA LINK MANAGER Register Bit Cell Type 50 OUT_CELL 51 OUT_CELL 52 IN_CELL 53 OUT_CELL 54 OUT_CELL 55 IN_CELL 56 OUT_CELL 57 OUT_CELL 58 IN_CELL 59 IN_CELL 60 IN_CELL 61 OUT_CELL 62 IO_CELL 63 IN_CELL 64 OUT_CELL 65 IO_CELL 66 IN_CELL 67 OUT_CELL 68 IO_CELL 69 IN_CELL 70 OUT_CELL 71 IO_CELL 72 IN_CELL 73 OUT_CELL 74 IO_CELL 75 IN_CELL 76 OUT_CELL 77 IO_CELL PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE Device I. 186 ...

Page 196

... IO_CELL 92 IN_CELL 93 OUT_CELL 94 IO_CELL 95 IN_CELL 96 OUT_CELL 97 IO_CELL 98 IN_CELL 99 OUT_CELL 100 IO_CELL 101 IN_CELL 102 OUT_CELL 103 IO_CELL 104 IN_CELL 105 OUT_CELL PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE Device I. ...

Page 197

... IO_CELL 123 OUT_CELL 124 IO_CELL 125 OUT_CELL 126 IO_CELL 127 OUT_CELL 128 IO_CELL 129 OUT_CELL 130 IO_CELL 131 OUT_CELL 132 IO_CELL 133 OUT_CELL PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE Device I. ...

Page 198

... IO_CELL 151 OUT_CELL 152 IO_CELL 153 OUT_CELL 154 IO_CELL 155 OUT_CELL 156 IO_CELL 157 OUT_CELL 158 IO_CELL 159 OUT_CELL 160 IO_CELL 161 IN_CELL PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE Device I. ...

Page 199

... OUT_CELL 179 IO_CELL 180 OUT_CELL 181 IO_CELL 182 OUT_CELL 183 IO_CELL 184 OUT_CELL 185 IO_CELL 186 OUT_CELL 187 IO_CELL 188 OUT_CELL 189 IO_CELL PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE Device I. ...

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... IO_CELL 207 OUT_CELL 208 IO_CELL 209 OUT_CELL 210 IO_CELL 211 IN_CELL 212 IN_CELL 213 IN_CELL 214 IN_CELL 215 OUT_CELL 216 OUT_CELL 217 IN_CELL PM7385 FREEDM-84A672 WITH ANY-PHY PACKET INTERFACE Device I. ...

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