VSC7130RC Vitesse Semiconductor Corp., VSC7130RC Datasheet
VSC7130RC
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VSC7130RC Summary of contents
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Data Sheet VSC7130 Features • Used in Switches, Hubs, GBICs, MIAs and JBODs • ANSI T11 Fibre Channel Compliant at 1.0625Gb/s • IEEE 802.3z Gigabit Ethernet Compliant at 1.25Gb/s • Dual Clock and Data Recovery Units Configurable as Repeaters or ...
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Dual Repeater/Retimer for Fibre Channel and Gigabit Ethernet Applications Several Fibre Channel and Gigabit Ethernet applications can use the VSC7130. Configuration changes between different applications are accomplished with mode pins and the Two-Wire Interface. SI+/- and SO+/- are normally connected ...
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Data Sheet VSC7130 Fibre Channel Hub The VSC7130 may be used as a single node in a Fibre Channel Arbitrated Loop Hub. In this application, incoming data on RX goes through a repeater (CDR1) which reduces jitter. The data is ...
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Dual Repeater/Retimer for Fibre Channel and Gigabit Ethernet +TX_DAT -TX_DAT TX_DISABLE TX_FAULT +RX_DAT -RX_DAT RX_LOS MOD_DEF0 MOD_DEF1 MOD_DEF2 Functionality Note this datasheet does not completely describe the VSC7130. A companion document, the VSC7130 User’s Manual describes additional applications issues and ...
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Data Sheet VSC7130 Implementing reference clock distribution in multi-node systems can be difficult and expensive if optimal signal quality achieved. In order to reduce this burden, the VSC7130 has a flexible reference input buffer which can be ...
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Dual Repeater/Retimer for Fibre Channel and Gigabit Ethernet Input and Output Buffers, Analog Signal Detection, Cable Equalization The RX0+/-, RX1+/- and SI+/- differential inputs are high performance input buffers which amplify the incoming signal. Furthermore, a cable equalization circuit is ...
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Data Sheet VSC7130 Clock and Data Recovery (CDR) Two Clock and Data Recovery Units (CDR) are included in the VSC7130 in order to improve signal quality of serial data by amplification and jitter attenuation. Figure 7 shows a block diagram ...
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Dual Repeater/Retimer for Fibre Channel and Gigabit Ethernet Table 2: CDRx Repeater/Retimer Configuration MODE1 Pin MODE0 Pin The SELRT signal determines whether the repeater or retimer output is selected, as shown in ...
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Data Sheet VSC7130 Clock Recovery Unit INPUT D DATA CLKI 1.0625GHz Internal Baud Rate Clock The internally generated baud rate clock (nominally 1.0625GHz) is used by the Retimer for several func- tions. First, it provides the timing reference for the ...
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Dual Repeater/Retimer for Fibre Channel and Gigabit Ethernet Channel primitives containing K28.5- characters are received. Once Signal Detect is asserted, there are several conditions which can result in the deassertion of Signal Detect: (1) An RLL error (a violation of ...
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Data Sheet VSC7130 Hub Support Several functions are provided in the CDRx/SDUx circuitry to support FC-AL Hubs. Two programmable 40-bit registers are available to generate data SO, allowing simple 40-bit patterns to be generated eas- ily. Monitoring ...
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Dual Repeater/Retimer for Fibre Channel and Gigabit Ethernet The Verilog code for the Master Controller in proprietary mode will be made available to customers in order to ensure compatibility. This Master Controller core is designed to use either a 25MHz ...
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Data Sheet VSC7130 Programmable Registers A list of the programmable registers accessible by the Two-Wire Interface is shown in Table 4. This list includes the address of the register, whether it is Readable and/or Writable source ...
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Dual Repeater/Retimer for Fibre Channel and Gigabit Ethernet Read/ Address Interrupt Write (Hex) (or Clear) 86/96 R/W 87/97 R/W 88/98 R/W 89/99 R/W A0/B0 R/W A1/B1 R/W A2/B2 R/W A3/B3 R/W A4/B4 R/W A5/B5 R/W A6/B6 R/W A7/B7 R/W A8/B8 ...
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Data Sheet VSC7130 AC Characteristics (Over Recommended Operating Conditions) RX0+/- RX1+/- SI1+/- TX+/- SO+/- REFI T T Table 5: AC Characteristics Parameters Description Latency from any Serial Input to any Serial T P Output T Differential Output Rise/Fall time S ...
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Dual Repeater/Retimer for Fibre Channel and Gigabit Ethernet DC Characteristics (Over recommended operating conditions). Parameters Description V Input HIGH voltage (TTL Input LOW voltage (TTL Input HIGH current (TTL Input LOW current (TTL) IL ...
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Data Sheet VSC7130 Package Pin Descriptions 1 TWO VSS 7 VDDP REFO+ 9 REFO- 11 VDDP VDD SDET 13 TEST2 15 VSSA CAP0 17 NOTE: Exposed pad on bottom must be connected to ...
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Dual Repeater/Retimer for Fibre Channel and Gigabit Ethernet Table 6: Pin Identification Pin # Name 61, 60 RX0+, RX0- 50, 51 RX1+, RX1- 48 R1/0 26, 27 SI+, SI- 57, 56 TX+, TX- 22, 23 SO+, SO- 31 TXDIS 40 ...
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Data Sheet VSC7130 Pin # Name 1 TWO 30 INT# 37 TEST0 33 TEST1 14 TEST2 12, 29, 38 VDD 41 21, 24 VDDP 55 VDDA 15 VSSA 7, 19, 25 28, 45, 49, 52 ...
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Dual Repeater/Retimer for Fibre Channel and Gigabit Ethernet Package Information: 64-pin TQFP Exposed Pad o (Bottom Side) 11/13 8 PLACES A 0.08/0.20 R 0.08 R MIN Page 20 © VITESSE SEMICONDUCTOR CORPORATION • ...
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Data Sheet VSC7130 Package Thermal Characteristics The VSC7130 is packaged in an exposed pad, thin quad flatpack (TQFP) which adheres to industry-stan- dard EIAJ footprints for a 10x10x1.0mm body, 64-lead TQFP. The package construction is shown in Figure 13. The ...
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... Tel: (800) VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com VITESSE SEMICONDUCTOR CORPORATION VSC7130 XX Package RC: 64-Pin Exposed Pad TQFP, 10x10x1.0mm Figure 14: Package Marking Information VSC7130RC ####AAAAA VITESSE Internet: www.vitesse.com Data Sheet VSC7130 Package Suffix Lot Tracking Code ( characters) G52297-0, Rev 4.0 ...