UDA1350AH Philips Semiconductors, UDA1350AH Datasheet
UDA1350AH
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UDA1350AH Summary of contents
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... DATA SHEET UDA1350AH IEC 958 audio DAC Preliminary specification File under Integrated Circuits, IC01 INTEGRATED CIRCUITS 1999 Dec 16 ...
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... LIMITING VALUES 10 THERMAL CHARACTERISTICS 11 CHARACTERISTICS 12 TIMING CHARACTERISTICS 13 APPLICATION INFORMATION 14 PACKAGE OUTLINE 15 SOLDERING 15.1 Introduction to soldering surface mount packages 15.2 Reflow soldering 15.3 Wave soldering 15.4 Manual soldering 15.5 Suitability of surface mount IC packages for wave and reflow soldering methods 16 DEFINITIONS 17 LIFE SUPPORT APPLICATIONS 2 Preliminary specification UDA1350AH ...
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... Available in two versions: UDA1350AH: – Full featured version in QFP44 package. UDA1350ATS: – Only IEC 958 input to DAC in SSOP28 package. The UDA1350AH is a single chip IEC 958 audio decoder with an integrated stereo digital-to-analog converter employing bitstream conversion techniques. 3 Preliminary specification ...
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... Philips Semiconductors IEC 958 audio DAC The UDA1350AH can operate in various operating modes: IEC 958 input to the DAC including on-chip signal processing IEC 958 input via the digital data output interface to the external Digital Signal Processor (DSP) IEC 958 input to the DAC and a DSP ...
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... DATA IEC 958 OUTPUT DECODER INTERFACE PREEM1 BCKO WSO DATAO DATAI PREEM0 Fig.1 Block diagram. 5 Preliminary specification UDA1350AH V DDA(DAC) V ref V DDA VOUTL V SSA(DAC) VOUTR DAC DAC NOISE SHAPER INTERPOLATOR AUDIO FEATURE PROCESSOR DATA INPUT ...
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... DIU static pin control selection input S-bus data output S-bus word select output not connected DISD test pin 2; must be connected to digital ground (V not connected 6 Preliminary specification UDA1350AH DESCRIPTION ) SSD ) SSD ) DDD ) ...
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... Schmitt-triggered input and output A analog reference voltage AI analog input AO analog output 1999 Dec 16 (1) TYPE not connected DO IEC 958 input pre-emphasis output 0 DS digital supply voltage DID test pin; must be connected to digital ground (V DESCRIPTION 7 Preliminary specification UDA1350AH DESCRIPTION ) SSD ...
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... V DDD(C) V SSD V SSD(C) L3DATA L3CLOCK DATAI BCKI WSI L3MODE n.c. 1999 Dec UDA1350AH Fig.2 Pin configuration. 8 Preliminary specification UDA1350AH 33 BCKO V DDA(PLL SSA(PLL PREEM1 29 CLKOUT 28 n.c. V DDA 27 V SSA 26 V SSA(DAC ref TC 23 MGS751 ...
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... The UDA1350AH is a low cost multi-purpose IEC 958 decoder DAC with a variety of operating modes. In modes and 4 the UDA1350AH is clock master; it generates the clock for both the outgoing and incoming digital data streams. Consequently, any device providing data for the UDA1350AH via the data input interface in mode 4 will be slave to the clock generated by the UDA1350AH ...
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... The lock indication output can be used, for example, for muting purposes. 8.3 Mute The UDA1350AH is equipped with a cosine roll-off mute in the DSP data path of the DAC part. Muting the DAC, by pin MUTE (in static mode) or via bit MT (in L3 mode) will result in a soft mute as presented in Fig.3. The cosine ...
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... Philips Semiconductors IEC 958 audio DAC 8.5 Data path The UDA1350AH data path consists of the slicer and the IEC 958 decoder, the digital data output and input interfaces, the audio feature processor, digital interpolator and noise shaper and the digital-to-analog converters. ...
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... Soft mute control with raised cosine roll-off De-emphasis selection of the incoming data stream for f = 32.0, 44.1 and 48.0 kHz. s 8.5.4 I NTERPOLATOR The UDA1350AH includes an on-board interpolating filter which converts the incoming data stream from 1f by cascading a recursive filter and a FIR filter. Table 2 Interpolator characteristics PARAMETER CONDITIONS Pass-band ripple 0 to 0.45f Stop band > ...
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Acrobat reader. white to force landscape pages to be ... WS LEFT BCK DATA MSB B2 MSB 2 ...
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... IEC 958 audio DAC 8.6 Control The UDA1350AH can be controlled by means of static pins or via the L3 interface. For optimum use of the features of the UDA1350AH the L3 control mode is recommended since only basic functions are available in the static pin control mode. It should be noted that the static pin control mode and L3 control mode are mutual exclusive. In the static pin control mode pins L3MODE and L3DATA are used to select the format for the data output and input interface ...
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... L3 CONTROL MODE The L3 control mode allows maximum flexibility in controlling the UDA1350AH. It should be noted that in the L3 control mode several base-line functions are still controlled by pins on the device and that on start-up in the L3 control mode the output is explicitly muted by bit MT via the L3 interface. Also it should be noted that in using the L3 control mode, an initialisation string is needed after power-up of the device for reliable operation ...
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... IEC 958 audio DAC 8.7 L3 interface 8.7.1 G ENERAL The UDA1350AH has an L3 microcontroller interface and all the digital sound processing features and various system settings can be controlled by a microcontroller. The controllable settings are: Restoring L3 defaults Power-on Selection of input channel, clock source, DAC input and ...
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Acrobat reader. white to force landscape pages to be ... L3 wake-up pulse after power-up L3CLOCK L3MODE device address L3DATA 0 1 DOM bits ...
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... Table 6): 1. One byte starting with ‘01’ for signalling the write action to the device, followed by the device address (‘011000’ for the UDA1350AH). 2. One byte starting with a ‘0’ for signalling the write action, followed by 7 bits indicating the destination address in binary format with A6 being the MSB and A0 being the LSB ...
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... I NITIALISATION STRING For proper and reliable operation it is needed that the UDA1350AH is initialized in the L3 control mode. This is needed to have the PLL start up after power-up of the device under all conditions. The initialisation string is given in Table 8. Table 8 L3 init string and set defaults after power-up. ...
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... Acrobat reader. white to force landscape pages to be ... 8.7 VERVIEW OF INTERFACE REGISTERS Table 9 UDA1350AH register map ADDR FUNCTION D15 D14 D13 D12 D11 Writable settings 00H system PON parameters ...
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... A 1-bit value to select the source for clock regeneration, either from the IEC 958 input or digital data input interface. In the event that the IEC 958 input is used as a clock source the UDA1350AH is clock master on the digital data output and input interfaces. Table 12 Clock source selection ...
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... A 1-bit value to activate mute during out-of-lock. In normal operation the output is automatically hard muted when an out-of-lock situation is detected. Setting this bit to logic 0 will disable that function. Table 21 Auto mute setting Auto MT 22 Preliminary specification UDA1350AH Soft mute FUNCTION 0 no muting 1 muting (default setting) Volume control dB in steps ...
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... Table 28 Pre-emphasis detection FUNCTION 8.7.9.7 A 2-bit value indicating the timing accuracy of the IEC 958 input signal is conforming to the IEC 958 specification. Table 29 Input signal accuracy detection ACC1 FUNCTION 23 Preliminary specification UDA1350AH Audio sample frequency detection ASF0 FUNCTION 0 0 44.1 kHz 0 1 undefined ...
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... Machine Model (MM) note 3 note 4 output short-circuited to V output short-circuited to V which can withstand ESD pulses of 1600 to +1600 V. SSA(PLL DAC operation after short-circuiting cannot be warranted. DD CONDITIONS in free air 24 Preliminary specification UDA1350AH MIN. MAX. 2.7 5.0 25 +150 65 +125 40 +85 2000 +2000 200 +200 ...
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... DAC in playback mode DAC in Power-down mode measured with respect to V SSA note 1.0 kHz tone dB; A-weighted f = 1.0 kHz tone; code = 0; i A-weighted f = 1.0 kHz tone 1.0 kHz tone i 25 Preliminary specification UDA1350AH MIN. TYP. MAX. 2.7 3.0 3.6 2.7 3.0 3.6 2.7 3.0 3.6 2.7 3.0 3.6 2.7 3.0 3.6 8.0 750 0.7 2 0.5 V ...
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... all voltages measured with respect to ground; unless L CONDITIONS f = 32.0 kHz 44.1 kHz 48.0 kHz cycle time of sample s frequency 26 Preliminary specification UDA1350AH MIN. TYP. MAX. 0.2 0.5 3 must be used in MIN. TYP. MAX. 250 97.0 91.0 90 ...
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... BCKH t r BCK T cy(BCK) DATAO DATAI 1999 Dec 16 CONDITIONS t h(WS su(WS) t BCKL t d(DATAO-WS) 2 Fig.8 I S-bus timing of output and input interface. 27 Preliminary specification UDA1350AH MIN. TYP. MAX. 500 250 250 190 190 190 190 190 190 30 t d(DATAO-BCK) t h(DATAO) t su(DATAI) t h(DATAI) ...
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... L3MODE t su(L3)D L3CLOCK L3DATA WRITE 1999 Dec 16 t CLK(L3)L t CLK(L3)H t su(L3)A t su(L3)DA t h(L3)DA BIT 0 Fig.9 Timing for address mode. t CLK(L3)L T cy(CLK)L3 t CLK(L3)H t h(L3)DA t su(L3)DA BIT 0 Fig.10 Timing for data transfer mode. 28 Preliminary specification UDA1350AH t su(L3)A t h(L3)A T cy(CLK)(L3) BIT 7 MGL723 t stp(L3) t h(L3)D BIT 7 MGL882 ...
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... J2 V DDD V DDD 100 F 100 F 100 F (16 V) (16 V) (16 V) AGND DGND C42 UDA1350AH R39 C9 C28 pre- I S-bus I S-bus 100 nF emphasis output input (50 V) ...
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... 2.5 scale (1) ( 0.40 0.25 10.1 10.1 12.9 0.8 0.20 0.14 9.9 9.9 12.3 REFERENCES JEDEC EIAJ 30 Preliminary specification detail 12.9 0.95 1.3 0.15 0.15 0.1 12.3 0.55 EUROPEAN PROJECTION UDA1350AH SOT307 (1) ( 1.2 1 0.8 0.8 0 ISSUE DATE 95-02-04 97-08-01 ...
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... Use a low voltage ( less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds 300 C. When using a dedicated tool, all other leads can be soldered in one operation within seconds between 270 and 320 C. 31 Preliminary specification UDA1350AH ...
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... Philips for any damages resulting from such improper use or sale. 1999 Dec 16 SOLDERING METHOD WAVE not suitable (2) not suitable suitable (3)(4) not recommended (5) not recommended 32 Preliminary specification UDA1350AH (1) REFLOW suitable suitable suitable suitable suitable ...
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... Philips Semiconductors IEC 958 audio DAC 1999 Dec 16 NOTES 33 Preliminary specification UDA1350AH ...
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... Philips Semiconductors IEC 958 audio DAC 1999 Dec 16 NOTES 34 Preliminary specification UDA1350AH ...
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... Philips Semiconductors IEC 958 audio DAC 1999 Dec 16 NOTES 35 Preliminary specification UDA1350AH ...
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... Tel. +46 8 5985 2000, Fax. +46 8 5985 2745 Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH, Tel. +41 1 488 2741 Fax. +41 1 488 3263 Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1, TAIPEI, Taiwan Tel. +886 2 2134 2886, Fax. +886 2 2134 2874 Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd., 209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260, Tel ...