UPD75P308GF-3B9 NEC, UPD75P308GF-3B9 Datasheet
UPD75P308GF-3B9
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UPD75P308GF-3B9 Summary of contents
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... PD75P308GF-001-3B9 PD75P308K Please refer to "Quality Grade on NEC Semiconductor Devices" (Document number IEI-1209) published by NEC Corporation to know the specification of quality grade on the devices and its recommended applications. The function common to the one-time PROM and EPROM types of product is referred to as PROM throughout this document. ...
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PIN CONFIGURATION S12 1 S13 2 S14 3 S15 4 S16 5 S17 6 S18 7 S19 8 S20 9 S21 10 S22 11 ...
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BASIC INTERVAL TIMER INTBT PROGRAM COUNTER(13) TI0/P13 TIMER/EVENT COUNTER PTO0/P20 #0 INTT0 WATCH BUZ/P23 TIMER PROGRAM MEMORY f INTW LCD SI/SBI/P03 SERIAL SO/SB0/P02 INTERFACE SCK/P01 8064 x 8 BITS INTCSI INT0/P10 INT1/P11 INTERRUPT INT2/P12 CONTROL INT4/P00 8 KR0/P60- KR3/P63, KR4/P70- ...
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PIN FUNCTIONS ................................................................................................................................. 1.1 PORT PINS ................................................................................................................................................. 5 1.2 NON PORT PINS ....................................................................................................................................... 6 1.3 PIN INPUT/OUTPUT CIRCUITS ................................................................................................................ 7 1.4 NOTES ON USING P00/INT4 AND RESET PINS ..................................................................................... 9 2. DIFFERENCES BETWEEN PD75P308 AND PD75308 .................................................................. 3. WRITING ...
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PIN FUNCTIONS 1.1 PORT PINS Also Served Pin Name Input/Output As P00 Input INT4 4-bit input port (PORT0) P01 Input/Output SCK Pull-up resistors can be specified in 3-bit P02 Input/Output SO/SB0 units for the P01 to P03 pins by ...
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... X1, X2 Input — When inputting the external clock, input the external clock to pin X1, and the reverse phase of the external clock to pin X2. To connect the crystal oscillator to the subsystem XT1 Input — clock generator. When the external clock is used, in XT1 inputs the external clock ...
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PIN INPUT/OUTPUT CIRCUITS The following shows a simplified input/output circuit diagram for each pin of the PD75P308. TYPE A (for TYPE E– P–ch IN N–ch Input buffer of CMOS standard TYPE B IN Schmitt trigger input with ...
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TYPE F– A P.U.R. enable data Type D output disable Type B P.U.R. : Pull–Up Resistor TYPE F–B P.U.R. enable output disable (P) data output disable output disable (N) P.U.R. : Pull–Up Resistor TYPE G–A V LC0 P-ch V LC1 ...
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... Therefore, keep the wiring length of these pins as short as possible to suppress the noise; otherwise, take noise preventive measures as shown below by using external components. • Connect diode with low V between V F and P00/INT4, RESET pin ...
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... Pull-up Resistor Ports 4, 5 Dividing Resistor for LCD Driving Power Supply Pins 50-53 Pin Connection Pin 57 Current dissipations and operating temperature ranges differ between PD75P308 and Electrical Specifications PD75308. For detail, refer to the specification documents of each mode. Operating Voltage Range ...
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WRITING AND VERIFYING PROM (PROGRAM MEMORY) The program memory of the PD75P308 is a PROM of 8064 x 8 bits. To write data to or verify the contents of this PROM, the pins listed in the table below are ...
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... Write data in 1-millisecond write mode. (8) Set program inhibit mode. (9) Set verify mode. If data has been written connectly, proceed to step (10). If data has not yet been written, repeat steps (7) to (9). (10) Write additional data for (the number of times data was written (X) in steps (7) to (9)) times 1 milliseconds ...
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PROGRAM MEMORY READ PROCEDURE The contents of the program memory can be read in the following procedure. (1) Ground the unused pins through pull-down resistors. The X1 pin must be low. (2) Supply the V and ...
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... The contents of the data programmed to the PD75P308 can be erased by exposing the window of the program memory to ultraviolet rays. The wavelength of the ultraviolet rays used to erase the contents is about 250 nm, and the quantity of the ultraviolet rays necessary for complete erasure is 15 W.s/cm When a commercially available ultraviolet ray lamp (wavelength: 254 nm, intensity: 12 mW/cm about minutes is required. ...
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ELECTRICAL SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS (T Parameter Symbol Supply Voltage V DD Supply Voltage Input Voltage * Output Voltage V O High-Level Output Current I OH Low-Level Output Current * Operating ...
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... Always keep the ground point of the capacitor of the oscillator circuit at the same potential not connect the power source pattern through which a high current flows. DD • Do not extract signals from the oscillation circuit. ...
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... Always keep the ground point of the capacitor of the oscillator circuit at the same potential not connect the power source pattern through which a high current flows. DD • Do not extract signals from the oscillation circuit. ...
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DC CHARACTERISTICS (T = - Parameter High-Level Input Voltage Low-Level Input Voltage High-Level Output Voltage Low-Level Output Voltage High-Level Input Leakage Current Low-Level Input Leakage Current High-Level Output Leakage Current Low-Level Output Leakage Current Internal ...
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... INTH, t Widths INTL RESET Low-Level Width t RSL * 1: The CPU clock ( ) cycle time is determined by the oscillation frequency of the connected oscillator, system clock control register (SCC), and processor clock control register (PCC). The figure on the right is cycle time t supply voltage V characteristics at the DD main system clock. ...
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SERIAL TRANSFER OPERATION TWO-LINE AND THREE-LINE SERIAL I/O MODES (SCK: internal clock output) Parameter Symbol SCK Cycle Time t KCY1 SCK High-, Low-Level Widths t t KH1, KL1 SI Set-Up Time (vs. SCK ) t SIK1 SI Hold Time (vs. ...
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SBI MODE (SCK: internal clock output (master)) Parameter Symbol SCK Cycle Time t KCY3 t KL3 SCK High-, Low-Level Widths t KH3 t SB0, 1 Set-Up Time (vs. SCK ) SIK3 t SB0, 1 Hold Time (vs. SCK ) KSI3 ...
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AC TIMING TEST POINT (excluding X1 and XT1 inputs CLOCK TIMING X1 input XT1 input TI0 TIMING TI0 22 0 Test points 0 1 ...
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SERIAL TRANSFER TIMING THREE-LINE SERIAL I/O MODE: SCK SI t KSO1 SO TWO-LINE SERIAL I/O MODE: SCK t KSO SB0,1 t KCY1 t t KL1 KH1 t t SIK1 KSI1 Input data Output data t KCY ...
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SERIAL TRANSFER TIMING BUS RELEASE SIGNAL TRANSFER SCK t t KSB SBL SB0,1 COMMAND SIGNAL TRANSFER SCK t KSB SB0,1 INTERRUPT INPUT TIMING INT0 KR0-7 RESET INPUT TIMING RESET 24 t KCY3 KL3,4 KH3,4 t ...
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LOW-VOLTAGE DATA RETENTION CHARACTERISTICS OF DATA MEMORY IN STOP MODE (T = - Parameter Symbol Data Retention Supply V DDDR Voltage Data Retention Supply I DDDR 1 Current* t Release Signal Set Time SREL Oscillation Stabilization ...
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... Data Output Hold Time MD3 Hold Time (vs. MD0 ) MD3 Data Output Float Delay Time *1: These symbols are the corresponding PD27C256 symbols. 2: The internal address signal is incremented the fourth rising edge of X1 input. The internal address is not connected to any pin 6.0 0.25V ...
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PROGRAM MEMORY WRITE TIMING t VPS VDS P40-P43 Data input P50-P53 MD0 t PW MD1 PCR ...
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PACKAGE DRAWINGS 80 PIN PLASTIC QFP (14 20 NOTE Each lead centerline is located within 0.15 mm (0.006 inch) of its true position (T.P.) at maximum material condition ...
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PIN CERAMIC WQFN NOTE Each lead centerline is located within 0.08 mm (0.003 inch) of its true position (T.P.) at maximum material condition X80KW-80A-1 ITEM MILLIMETERS INCHES 20.0 ± 0.4 A 0.787 B ...
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... It is recommended that PD75P308 be soldered under the following conditions. For details on the recommended soldering conditions, refer to Information Document "Semiconductor Devices Mounting Manual" (IEI-616). The soldering methods and conditions are not listed here, consult NEC. Table 6-1 Soldering Conditions PD75P308GF-3B9: 80-pin plastic QFP ( mm) ...
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... EV-9200G-80 EV-9200G-80. PG-1500 PROM programmer PA-75P308GF PROM programmer adapter solely used for PD75P308GF connected to PG-1500. PA-75P308K PROM programmer adapter solely used for PD75P308K connected to PG-1500. Software IE Control Program Host machine PG-1500 Controller • PC-9800 series (MS-DOS RA75X Relocatable • IBM PC/AT ...
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APPENDIX B. RELATED DOCUMENTS 32 PD75P308 ...
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... The insulation of the gates of the MOS device may be destroyed by a strong static charge. Therefore, when transporting or storing the MOS device, use a conductive tray, magazine case, or conductive buffer materials, or the metal case NEC uses for packaging and shipment, and use grounding when assembling the MOS device system. Do not leave the MOS device on a plastic plate and do not touch the pins of the device ...
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... The devices listed in this document are not suitable for uses in aerospace equipment, submarine cables, nuclear reactor control systems and life support systems. If customers intend to use NEC devices for above applications or they intend to use "Standard" quality grade NEC devices for the applications not intended by NEC, please contact our sales people in advance. ...