TDA8841

Manufacturer Part NumberTDA8841
DescriptionI2C-bus controlled PAL/NTSC TV processor
ManufacturerPhilips Semiconductors
TDA8841 datasheet
 


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Philips Semiconductors
2
I
C-bus controlled PAL/NTSC/SECAM TV
processors
Table 50 Bypass of chroma base-band delay line
BPS
DELAY LINE MODE
0
active
1
bypassed
Table 51 Automatic colour limiting
ACL
COLOUR LIMITING
0
not active
1
active
Table 52 Enable external comb filter
CMB
COMB FILTER
0
disabled
1
enabled
Table 53 Start-up mode of black current loop; note 1
AST
MODE
0
automatic mode;
1
switch-on under control of -processor
Note
1. When the circuit is in the automatic mode the RGB
drive is switched-on as soon as the black current loop
has stabilised. Under control of the -processor the
condition of the black current loop is indicated via the
BCF bit. When this bit changes to 0 the RGB drive can
be switched-on by setting the AST bit to 0.
December 16, 1997
Tentative Device Specification
TDA884X/5X-N2 series
Table 54 Cathode drive level
SETTING CATHODE DRIVE
CL2
CL1
CL0
AMPLITUDE; NOTE 1
0
0
0
57V
BL-WH
0
0
1
63 V
BL-WH
0
1
0
70 V
BL-WH
0
1
1
77 V
BL-WH
1
0
0
84 V
BL-WH
1
0
1
91 V
BL-WH
1
1
0
99 V
BL-WH
1
1
1
107 V
BL-WH
Note
1. The given values are valid for the following conditions:
- Nominal CVBS input signal
- Settings for contrast, WPA and peaking nominal
- Black- and blue-stretch switched-off
- Gain of output stage such that no clipping occurs
- Beam current limiting not active
The tolerance on these values is about
Table 55 Y-delay adjustment; note 1
YD0 to YD3
YD3
YD3
160 ns +
YD2
YD2
80 ns +
YD1
YD1
40 ns +
YD0
YD0
40 ns
Note
1. For an equal delay of the luminance and chrominance
signal the delay must be set at a value of 160 ns. This
is only valid for a CVBS signal without group
delay distortions.
Table 56 Dynamic skin control on/off
DS
0
off
1
on
Table 57 Dynamic skin control angle
DSA
ANGLE OF CORRECTION
0
correction angle 123 degrees
1
correction angle 117 degrees
23
3 V.
Y-DELAY
MODE